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IntelSiliconPkg/IgdOpRegion: Add definition for Intel IGD OpRegion.
Add IGD OpRegion definition from Intel Integrated Graphics Device OpRegion Specification. at https://01.org/sites/default/files/documentation/acpi_igd_opregion_spec_0.pdf Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
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/** @file
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IGD OpRegion definition from Intel Integrated Graphics Device OpRegion
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Specification.
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https://01.org/sites/default/files/documentation/acpi_igd_opregion_spec_0.pdf
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There are some mismatch between the specification and the implementation.
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The definition follows the latest implementation.
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1) INTEL_IGD_OPREGION_HEADER.RSV1[0xA0]
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2) INTEL_IGD_OPREGION_MBOX1.RSV3[0x3C]
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3) INTEL_IGD_OPREGION_MBOX3.RSV5[0x62]
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4) INTEL_IGD_OPREGION_VBT.RVBT[0x1C00]
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Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#ifndef _IGD_OPREGION_H_
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#define _IGD_OPREGION_H_
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/**
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OpRegion structures:
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Sub-structures define the different parts of the OpRegion followed by the
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main structure representing the entire OpRegion.
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Note: These structures are packed to 1 byte offsets because the exact
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data location is requred by the supporting design specification due to
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the fact that the data is used by ASL and Graphics driver code compiled
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separatly.
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**/
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#pragma pack(1)
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///
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/// OpRegion header (mailbox 0) structure and defines.
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///
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typedef struct {
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CHAR8 SIGN[0x10]; ///< Offset 0 OpRegion Signature
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UINT32 SIZE; ///< Offset 16 OpRegion Size
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UINT32 OVER; ///< Offset 20 OpRegion Structure Version
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UINT8 SVER[0x20]; ///< Offset 24 System BIOS Build Version
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UINT8 VVER[0x10]; ///< Offset 56 Video BIOS Build Version
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UINT8 GVER[0x10]; ///< Offset 72 Graphic Driver Build Version
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UINT32 MBOX; ///< Offset 88 Supported Mailboxes
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UINT32 DMOD; ///< Offset 92 Driver Model
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UINT8 RSV1[0xA0]; ///< Offset 96 Reserved
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} INTEL_IGD_OPREGION_HEADER;
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///
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/// OpRegion mailbox 1 (public ACPI Methods).
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///
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typedef struct {
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UINT32 DRDY; ///< Offset 0 Driver Readiness
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UINT32 CSTS; ///< Offset 4 Status
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UINT32 CEVT; ///< Offset 8 Current Event
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UINT8 RSV2[0x14]; ///< Offset 12 Reserved
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UINT32 DIDL[8]; ///< Offset 32 Supported Display Devices ID List
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UINT32 CPDL[8]; ///< Offset 64 Currently Attached Display Devices List
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UINT32 CADL[8]; ///< Offset 96 Currently Active Display Devices List
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UINT32 NADL[8]; ///< Offset 128 Next Active Devices List
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UINT32 ASLP; ///< Offset 160 ASL Sleep Time Out
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UINT32 TIDX; ///< Offset 164 Toggle Table Index
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UINT32 CHPD; ///< Offset 168 Current Hotplug Enable Indicator
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UINT32 CLID; ///< Offset 172 Current Lid State Indicator
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UINT32 CDCK; ///< Offset 176 Current Docking State Indicator
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UINT32 SXSW; ///< Offset 180 Display Switch Notification on Sx State Resume
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UINT32 EVTS; ///< Offset 184 Events supported by ASL
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UINT32 CNOT; ///< Offset 188 Current OS Notification
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UINT32 NRDY; ///< Offset 192 Driver Status
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UINT8 RSV3[0x3C]; ///< Offset 196 Reserved
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} INTEL_IGD_OPREGION_MBOX1;
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///
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/// OpRegion mailbox 2 (Software SCI Interface).
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///
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typedef struct {
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UINT32 SCIC; ///< Offset 0 Software SCI Command / Status / Data
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UINT32 PARM; ///< Offset 4 Software SCI Parameters
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UINT32 DSLP; ///< Offset 8 Driver Sleep Time Out
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UINT8 RSV4[0xF4]; ///< Offset 12 Reserved
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} INTEL_IGD_OPREGION_MBOX2;
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///
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/// OpRegion mailbox 3 (BIOS/Driver Communication - ASLE Support).
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///
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typedef struct {
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UINT32 ARDY; ///< Offset 0 Driver Readiness
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UINT32 ASLC; ///< Offset 4 ASLE Interrupt Command / Status
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UINT32 TCHE; ///< Offset 8 Technology Enabled Indicator
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UINT32 ALSI; ///< Offset 12 Current ALS Luminance Reading
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UINT32 BCLP; ///< Offset 16 Requested Backlight Britness
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UINT32 PFIT; ///< Offset 20 Panel Fitting State or Request
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UINT32 CBLV; ///< Offset 24 Current Brightness Level
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UINT16 BCLM[0x14]; ///< Offset 28 Backlight Brightness Levels Duty Cycle Mapping Table
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UINT32 CPFM; ///< Offset 68 Current Panel Fitting Mode
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UINT32 EPFM; ///< Offset 72 Enabled Panel Fitting Modes
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UINT8 PLUT[0x4A]; ///< Offset 76 Panel Look Up Table & Identifier
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UINT32 PFMB; ///< Offset 150 PWM Frequency and Minimum Brightness
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UINT32 CCDV; ///< Offset 154 Color Correction Default Values
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UINT8 RSV5[0x62]; ///< Offset 158 Reserved
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} INTEL_IGD_OPREGION_MBOX3;
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///
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/// OpRegion mailbox 4 (VBT).
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///
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typedef struct {
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UINT8 RVBT[0x1C00]; ///< Offset 0 Raw VBT Data
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} INTEL_IGD_OPREGION_VBT;
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///
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/// IGD OpRegion Structure
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///
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typedef struct {
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INTEL_IGD_OPREGION_HEADER Header; ///< OpRegion header
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INTEL_IGD_OPREGION_MBOX1 MBox1; ///< Mailbox 1: Public ACPI Methods
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