mirror of https://github.com/acidanthera/audk.git
ArmPlatformPkg: Enable support for flash in 64-bit address space
The existing NOR Flash DXE and StandaloneMm driver supports NOR flash devices connected in the 32-bit address space. Extend these drivers to allow NOR flash devices connected to 64-bit address space to be usable as well. Also, convert the base address and size sanity check from ASSERT() to if condition so that even if the firmware is build in release mode, it can return error if the parameter(s) is/are invalid. Signed-off-by: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com> Tested-by: Masahisa Kojima <masahisa.kojima@linaro.org> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
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8015f3f6d4
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@ -1,6 +1,6 @@
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/** @file NorFlashDxe.c
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Copyright (c) 2011 - 2020, Arm Limited. All rights reserved.<BR>
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Copyright (c) 2011 - 2021, Arm Limited. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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@ -343,9 +343,18 @@ NorFlashInitialise (
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for (Index = 0; Index < mNorFlashDeviceCount; Index++) {
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// Check if this NOR Flash device contain the variable storage region
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ContainVariableStorage =
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(NorFlashDevices[Index].RegionBaseAddress <= PcdGet32 (PcdFlashNvStorageVariableBase)) &&
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(PcdGet32 (PcdFlashNvStorageVariableBase) + PcdGet32 (PcdFlashNvStorageVariableSize) <= NorFlashDevices[Index].RegionBaseAddress + NorFlashDevices[Index].Size);
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if (PcdGet64 (PcdFlashNvStorageVariableBase64) != 0) {
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ContainVariableStorage =
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(NorFlashDevices[Index].RegionBaseAddress <= PcdGet64 (PcdFlashNvStorageVariableBase64)) &&
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(PcdGet64 (PcdFlashNvStorageVariableBase64) + PcdGet32 (PcdFlashNvStorageVariableSize) <=
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NorFlashDevices[Index].RegionBaseAddress + NorFlashDevices[Index].Size);
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} else {
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ContainVariableStorage =
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(NorFlashDevices[Index].RegionBaseAddress <= PcdGet32 (PcdFlashNvStorageVariableBase)) &&
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(PcdGet32 (PcdFlashNvStorageVariableBase) + PcdGet32 (PcdFlashNvStorageVariableSize) <=
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NorFlashDevices[Index].RegionBaseAddress + NorFlashDevices[Index].Size);
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}
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Status = NorFlashCreateInstance (
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NorFlashDevices[Index].DeviceBaseAddress,
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@ -413,10 +422,11 @@ NorFlashFvbInitialize (
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EFI_MEMORY_UC | EFI_MEMORY_RUNTIME);
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ASSERT_EFI_ERROR (Status);
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mFlashNvStorageVariableBase = PcdGet32 (PcdFlashNvStorageVariableBase);
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mFlashNvStorageVariableBase = (FixedPcdGet64 (PcdFlashNvStorageVariableBase64) != 0) ?
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FixedPcdGet64 (PcdFlashNvStorageVariableBase64) : FixedPcdGet32 (PcdFlashNvStorageVariableBase);
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// Set the index of the first LBA for the FVB
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Instance->StartLba = (PcdGet32 (PcdFlashNvStorageVariableBase) - Instance->RegionBaseAddress) / Instance->Media.BlockSize;
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Instance->StartLba = (mFlashNvStorageVariableBase - Instance->RegionBaseAddress) / Instance->Media.BlockSize;
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BootMode = GetBootModeHob ();
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if (BootMode == BOOT_WITH_DEFAULT_SETTINGS) {
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@ -2,7 +2,7 @@
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#
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# Component description file for NorFlashDxe module
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#
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# Copyright (c) 2011 - 2014, ARM Ltd. All rights reserved.<BR>
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# Copyright (c) 2011 - 2021, Arm Limited. All rights reserved.<BR>
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#
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# SPDX-License-Identifier: BSD-2-Clause-Patent
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#
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@ -55,10 +55,13 @@
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gEfiDiskIoProtocolGuid
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[Pcd.common]
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gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase64
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gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase
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gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize
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gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase64
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gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase
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gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize
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gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase64
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gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase
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gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize
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@ -1,6 +1,6 @@
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/*++ @file NorFlashFvbDxe.c
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Copyright (c) 2011 - 2020, ARM Ltd. All rights reserved.<BR>
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Copyright (c) 2011 - 2021, Arm Limited. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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@ -48,23 +48,66 @@ InitializeFvAndVariableStoreHeaders (
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UINTN HeadersLength;
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EFI_FIRMWARE_VOLUME_HEADER *FirmwareVolumeHeader;
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VARIABLE_STORE_HEADER *VariableStoreHeader;
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UINT32 NvStorageFtwSpareSize;
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UINT32 NvStorageFtwWorkingSize;
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UINT32 NvStorageVariableSize;
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UINT64 NvStorageFtwSpareBase;
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UINT64 NvStorageFtwWorkingBase;
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UINT64 NvStorageVariableBase;
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HeadersLength = sizeof(EFI_FIRMWARE_VOLUME_HEADER) + sizeof(EFI_FV_BLOCK_MAP_ENTRY) + sizeof(VARIABLE_STORE_HEADER);
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Headers = AllocateZeroPool(HeadersLength);
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NvStorageFtwWorkingSize = PcdGet32 (PcdFlashNvStorageFtwWorkingSize);
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NvStorageFtwSpareSize = PcdGet32 (PcdFlashNvStorageFtwSpareSize);
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NvStorageVariableSize = PcdGet32 (PcdFlashNvStorageVariableSize);
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NvStorageFtwSpareBase = (PcdGet64 (PcdFlashNvStorageFtwSpareBase64) != 0) ?
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PcdGet64 (PcdFlashNvStorageFtwSpareBase64) : PcdGet32 (PcdFlashNvStorageFtwSpareBase);
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NvStorageFtwWorkingBase = (PcdGet64 (PcdFlashNvStorageFtwWorkingBase64) != 0) ?
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PcdGet64 (PcdFlashNvStorageFtwWorkingBase64) : PcdGet32 (PcdFlashNvStorageFtwWorkingBase);
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NvStorageVariableBase = (PcdGet64 (PcdFlashNvStorageVariableBase64) != 0) ?
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PcdGet64 (PcdFlashNvStorageVariableBase64) : PcdGet32 (PcdFlashNvStorageVariableBase);
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// FirmwareVolumeHeader->FvLength is declared to have the Variable area AND the FTW working area AND the FTW Spare contiguous.
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ASSERT(PcdGet32(PcdFlashNvStorageVariableBase) + PcdGet32(PcdFlashNvStorageVariableSize) == PcdGet32(PcdFlashNvStorageFtwWorkingBase));
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ASSERT(PcdGet32(PcdFlashNvStorageFtwWorkingBase) + PcdGet32(PcdFlashNvStorageFtwWorkingSize) == PcdGet32(PcdFlashNvStorageFtwSpareBase));
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if ((NvStorageVariableBase + NvStorageVariableSize) != NvStorageFtwWorkingBase) {
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DEBUG ((DEBUG_ERROR, "%a: NvStorageFtwWorkingBase is not contiguous with NvStorageVariableBase region\n",
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__FUNCTION__));
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return EFI_INVALID_PARAMETER;
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}
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if ((NvStorageFtwWorkingBase + NvStorageFtwWorkingSize) != NvStorageFtwSpareBase) {
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DEBUG ((DEBUG_ERROR, "%a: NvStorageFtwSpareBase is not contiguous with NvStorageFtwWorkingBase region\n",
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__FUNCTION__));
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return EFI_INVALID_PARAMETER;
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}
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// Check if the size of the area is at least one block size
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ASSERT((PcdGet32(PcdFlashNvStorageVariableSize) > 0) && (PcdGet32(PcdFlashNvStorageVariableSize) / Instance->Media.BlockSize > 0));
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ASSERT((PcdGet32(PcdFlashNvStorageFtwWorkingSize) > 0) && (PcdGet32(PcdFlashNvStorageFtwWorkingSize) / Instance->Media.BlockSize > 0));
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ASSERT((PcdGet32(PcdFlashNvStorageFtwSpareSize) > 0) && (PcdGet32(PcdFlashNvStorageFtwSpareSize) / Instance->Media.BlockSize > 0));
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if ((NvStorageVariableSize <= 0) || (NvStorageVariableSize / Instance->Media.BlockSize <= 0)) {
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DEBUG ((DEBUG_ERROR, "%a: NvStorageVariableSize is 0x%x, should be atleast one block size\n", __FUNCTION__,
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NvStorageVariableSize));
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return EFI_INVALID_PARAMETER;
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}
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if ((NvStorageFtwWorkingSize <= 0) || (NvStorageFtwWorkingSize / Instance->Media.BlockSize <= 0)) {
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DEBUG ((DEBUG_ERROR, "%a: NvStorageFtwWorkingSize is 0x%x, should be atleast one block size\n", __FUNCTION__,
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NvStorageFtwWorkingSize));
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return EFI_INVALID_PARAMETER;
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}
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if ((NvStorageFtwSpareSize <= 0) || (NvStorageFtwSpareSize / Instance->Media.BlockSize <= 0)) {
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DEBUG ((DEBUG_ERROR, "%a: NvStorageFtwSpareSize is 0x%x, should be atleast one block size\n", __FUNCTION__,
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NvStorageFtwSpareSize));
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return EFI_INVALID_PARAMETER;
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}
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// Ensure the Variable area Base Addresses are aligned on a block size boundaries
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ASSERT(PcdGet32(PcdFlashNvStorageVariableBase) % Instance->Media.BlockSize == 0);
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ASSERT(PcdGet32(PcdFlashNvStorageFtwWorkingBase) % Instance->Media.BlockSize == 0);
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ASSERT(PcdGet32(PcdFlashNvStorageFtwSpareBase) % Instance->Media.BlockSize == 0);
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if ((NvStorageVariableBase % Instance->Media.BlockSize != 0) ||
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(NvStorageFtwWorkingBase % Instance->Media.BlockSize != 0) ||
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(NvStorageFtwSpareBase % Instance->Media.BlockSize != 0)) {
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DEBUG ((DEBUG_ERROR, "%a: NvStorage Base addresses must be aligned to block size boundaries", __FUNCTION__));
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return EFI_INVALID_PARAMETER;
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}
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//
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// EFI_FIRMWARE_VOLUME_HEADER
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@ -1,6 +1,6 @@
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/** @file NorFlashStandaloneMm.c
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Copyright (c) 2011 - 2020, Arm Limited. All rights reserved.<BR>
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Copyright (c) 2011 - 2021, Arm Limited. All rights reserved.<BR>
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Copyright (c) 2020, Linaro, Ltd. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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@ -298,9 +298,18 @@ NorFlashInitialise (
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for (Index = 0; Index < mNorFlashDeviceCount; Index++) {
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// Check if this NOR Flash device contain the variable storage region
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ContainVariableStorage =
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(NorFlashDevices[Index].RegionBaseAddress <= PcdGet32 (PcdFlashNvStorageVariableBase)) &&
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(PcdGet32 (PcdFlashNvStorageVariableBase) + PcdGet32 (PcdFlashNvStorageVariableSize) <= NorFlashDevices[Index].RegionBaseAddress + NorFlashDevices[Index].Size);
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if (PcdGet64 (PcdFlashNvStorageVariableBase64) != 0) {
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ContainVariableStorage =
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(NorFlashDevices[Index].RegionBaseAddress <= PcdGet64 (PcdFlashNvStorageVariableBase64)) &&
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(PcdGet64 (PcdFlashNvStorageVariableBase64) + PcdGet32 (PcdFlashNvStorageVariableSize) <=
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NorFlashDevices[Index].RegionBaseAddress + NorFlashDevices[Index].Size);
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} else {
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ContainVariableStorage =
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(NorFlashDevices[Index].RegionBaseAddress <= PcdGet32 (PcdFlashNvStorageVariableBase)) &&
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(PcdGet32 (PcdFlashNvStorageVariableBase) + PcdGet32 (PcdFlashNvStorageVariableSize) <=
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NorFlashDevices[Index].RegionBaseAddress + NorFlashDevices[Index].Size);
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}
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Status = NorFlashCreateInstance (
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NorFlashDevices[Index].DeviceBaseAddress,
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@ -330,10 +339,11 @@ NorFlashFvbInitialize (
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ASSERT((Instance != NULL));
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mFlashNvStorageVariableBase = PcdGet32 (PcdFlashNvStorageVariableBase);
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mFlashNvStorageVariableBase = (FixedPcdGet64 (PcdFlashNvStorageVariableBase64) != 0) ?
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FixedPcdGet64 (PcdFlashNvStorageVariableBase64) : FixedPcdGet32 (PcdFlashNvStorageVariableBase);
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// Set the index of the first LBA for the FVB
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Instance->StartLba = (PcdGet32 (PcdFlashNvStorageVariableBase) - Instance->RegionBaseAddress) / Instance->Media.BlockSize;
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Instance->StartLba = (mFlashNvStorageVariableBase - Instance->RegionBaseAddress) / Instance->Media.BlockSize;
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// Determine if there is a valid header at the beginning of the NorFlash
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Status = ValidateFvHeader (Instance);
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@ -2,7 +2,7 @@
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#
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# Component description file for NorFlashStandaloneMm module
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#
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# Copyright (c) 2011 - 2014, ARM Ltd. All rights reserved.<BR>
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# Copyright (c) 2011 - 2021, Arm Limited. All rights reserved.<BR>
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# Copyright (c) 2020, Linaro, Ltd. All rights reserved.<BR>
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#
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# SPDX-License-Identifier: BSD-2-Clause-Patent
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@ -50,10 +50,13 @@
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gEfiSmmFirmwareVolumeBlockProtocolGuid
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[Pcd.common]
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gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase64
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gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase
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gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize
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gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase64
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gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase
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gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize
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gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase64
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gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase
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gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize
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