mirror of https://github.com/acidanthera/audk.git
ArmVirtPkg/PrePiRelocatable: add ARM support
This adds support to the self relocating PrePi instance that is built as a PIE ET_DYN executable. It primarily involves porting the relocation routine to use ELF32 REL entries instead of ELF64 RELA entries which is what AArch64 uses. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Acked-by: Laszlo Ersek <lersek@redhat.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19331 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
Ard Biesheuvel
abiesheuvel
parent
03b6bed17e
commit
809a639ee2
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/** @file
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*
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* Copyright (c) 2011-2013, ARM Limited. All rights reserved.
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*
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* This program and the accompanying materials
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* are licensed and made available under the terms and conditions of the BSD License
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* which accompanies this distribution. The full text of the license may be found at
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* http://opensource.org/licenses/bsd-license.php
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*
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* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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*
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**/
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#include "PrePi.h"
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VOID
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ArchInitialize (
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VOID
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)
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{
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// Enable Floating Point
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if (FixedPcdGet32 (PcdVFPEnabled)) {
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ArmEnableVFP ();
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}
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}
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//
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// Copyright (c) 2011-2013, ARM Limited. All rights reserved.
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// Copyright (c) 2015, Linaro Limited. All rights reserved.
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//
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// This program and the accompanying materials
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// are licensed and made available under the terms and conditions of the BSD License
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// which accompanies this distribution. The full text of the license may be found at
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// http://opensource.org/licenses/bsd-license.php
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//
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// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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//
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//
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#include <AsmMacroIoLib.h>
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#include <Base.h>
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#include <Library/PcdLib.h>
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#include <AutoGen.h>
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.text
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.align 3
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GCC_ASM_IMPORT(ArmPlatformIsPrimaryCore)
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GCC_ASM_IMPORT(ArmReadMpidr)
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GCC_ASM_IMPORT(ArmPlatformPeiBootAction)
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GCC_ASM_IMPORT(ArmPlatformStackSet)
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GCC_ASM_EXPORT(_ModuleEntryPoint)
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ASM_GLOBAL ASM_PFX(mSystemMemoryEnd)
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StartupAddr: .long ASM_PFX(CEntryPoint)
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ASM_PFX(mSystemMemoryEnd): .quad 0
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__relocs:
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.long __reloc_base - __relocs
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.long __reloc_start - __relocs
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.long __reloc_end - __relocs
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ASM_PFX(_ModuleEntryPoint):
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//
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// We are built as a ET_DYN PIE executable, so we need to process all
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// relative relocations if we are executing from a different offset than we
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// were linked at. This is only possible if we are running from RAM.
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//
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adr r12, __relocs
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ldrd r4, r5, [r12]
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ldr r6, [r12, #8]
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add r4, r4, r12
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add r5, r5, r12
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add r6, r6, r12
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.Lreloc_loop:
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cmp r5, r6
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bhs .Lreloc_done
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//
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// AArch32 uses the ELF32 REL format, which means each entry in the
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// relocation table consists of
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//
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// UINT32 offset : the relative offset of the value that needs to
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// be relocated
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// UINT32 info : relocation type and symbol index (the latter is
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// not used for R_ARM_RELATIVE relocations)
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//
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ldrd r8, r9, [r5], #8 // read offset into r8 and info into r9
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cmp r9, #23 // check info == R_ARM_RELATIVE?
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bne .Lreloc_loop // not a relative relocation? then skip
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ldr r9, [r8, r4] // read addend into r9
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add r9, r9, r1 // add image base to addend to get relocated value
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str r9, [r8, r4] // write relocated value at offset
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b .Lreloc_loop
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.Lreloc_done:
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// Do early platform specific actions
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bl ASM_PFX(ArmPlatformPeiBootAction)
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// Get ID of this CPU in Multicore system
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bl ASM_PFX(ArmReadMpidr)
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// Keep a copy of the MpId register value
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mov r10, r0
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// Check if we can install the stack at the top of the System Memory or if we need
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// to install the stacks at the bottom of the Firmware Device (case the FD is located
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// at the top of the DRAM)
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_SetupStackPosition:
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// Compute Top of System Memory
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ldr r12, =PcdGet64 (PcdSystemMemoryBase)
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ldr r1, [r12]
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ldr r12, =PcdGet64 (PcdSystemMemorySize)
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ldrd r2, r3, [r12]
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// calculate the top of memory, and record it in mSystemMemoryEnd
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adds r2, r2, r1
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sub r2, r2, #1
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addcs r3, r3, #1
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adr r12, mSystemMemoryEnd
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strd r2, r3, [r12]
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// truncate the memory used by UEFI to 4 GB range
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teq r3, #0
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movne r1, #-1
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moveq r1, r2
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// Calculate Top of the Firmware Device
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ldr r12, =PcdGet64 (PcdFdBaseAddress)
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ldr r2, [r12]
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ldr r3, =FixedPcdGet32 (PcdFdSize)
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sub r3, r3, #1
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add r3, r3, r2 // r3 = FdTop = PcdFdBaseAddress + PcdFdSize
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// UEFI Memory Size (stacks are allocated in this region)
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LoadConstantToReg (FixedPcdGet32(PcdSystemMemoryUefiRegionSize), r4)
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//
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// Reserve the memory for the UEFI region (contain stacks on its top)
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//
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// Calculate how much space there is between the top of the Firmware and the Top of the System Memory
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subs r0, r1, r3 // r0 = SystemMemoryTop - FdTop
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bmi _SetupStack // Jump if negative (FdTop > SystemMemoryTop). Case when the PrePi is in XIP memory outside of the DRAM
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cmp r0, r4
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bge _SetupStack
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// Case the top of stacks is the FdBaseAddress
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mov r1, r2
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_SetupStack:
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// r1 contains the top of the stack (and the UEFI Memory)
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// Because the 'push' instruction is equivalent to 'stmdb' (decrement before), we need to increment
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// one to the top of the stack. We check if incrementing one does not overflow (case of DRAM at the
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// top of the memory space)
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adds r11, r1, #1
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bcs _SetupOverflowStack
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_SetupAlignedStack:
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mov r1, r11
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b _GetBaseUefiMemory
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_SetupOverflowStack:
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// Case memory at the top of the address space. Ensure the top of the stack is EFI_PAGE_SIZE
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// aligned (4KB)
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LoadConstantToReg (EFI_PAGE_MASK, r11)
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and r11, r11, r1
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sub r1, r1, r11
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_GetBaseUefiMemory:
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// Calculate the Base of the UEFI Memory
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sub r11, r1, r4
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_GetStackBase:
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// r1 = The top of the Mpcore Stacks
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// Stack for the primary core = PrimaryCoreStack
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LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)
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sub r12, r1, r2
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// Stack for the secondary core = Number of Cores - 1
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LoadConstantToReg (FixedPcdGet32(PcdCoreCount), r0)
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sub r0, r0, #1
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LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r1)
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mul r1, r1, r0
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sub r12, r12, r1
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// r12 = The base of the MpCore Stacks (primary stack & secondary stacks)
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mov r0, r12
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mov r1, r10
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//ArmPlatformStackSet(StackBase, MpId, PrimaryStackSize, SecondaryStackSize)
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LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)
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LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r3)
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bl ASM_PFX(ArmPlatformStackSet)
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// Is it the Primary Core ?
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mov r0, r10
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bl ASM_PFX(ArmPlatformIsPrimaryCore)
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cmp r0, #1
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bne _PrepareArguments
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_PrepareArguments:
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mov r0, r10
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mov r1, r11
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mov r2, r12
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// Move sec startup address into a data register
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// Ensure we're jumping to FV version of the code (not boot remapped alias)
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ldr r4, StartupAddr
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// Jump to PrePiCore C code
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// r0 = MpId
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// r1 = UefiMemoryBase
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// r2 = StacksBase
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blx r4
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_NeverReturn:
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b _NeverReturn
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@ -28,6 +28,10 @@
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AArch64/ArchPrePi.c
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AArch64/ModuleEntryPoint.S
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[Sources.ARM]
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Arm/ArchPrePi.c
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Arm/ModuleEntryPoint.S
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[Packages]
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MdePkg/MdePkg.dec
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MdeModulePkg/MdeModulePkg.dec
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gArmTokenSpaceGuid.PcdFvBaseAddress
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[BuildOptions]
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GCC:*_*_AARCH64_DLINK_FLAGS = -pie -T $(MODULE_DIR)/Scripts/PrePi-PIE.lds
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GCC:*_*_*_DLINK_FLAGS = -pie -T $(MODULE_DIR)/Scripts/PrePi-PIE.lds
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@ -1,16 +1,16 @@
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#/** @file
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#
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# Copyright (c) 2015, Linaro Ltd. All rights reserved.<BR>
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#
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# This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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# which accompanies this distribution. The full text of the license may be found at
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# http://opensource.org/licenses/bsd-license.php
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#
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# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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#
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#**/
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/** @file
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Copyright (c) 2015, Linaro Ltd. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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SECTIONS
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{
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@ -25,7 +25,8 @@ SECTIONS
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. = ALIGN(0x20);
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PROVIDE(__reloc_start = .);
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*(.rela .rela*)
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*(.rel .rel.*)
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*(.rela .rela.*)
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PROVIDE(__reloc_end = .);
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}
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