mirror of https://github.com/acidanthera/audk.git
MdePkg: Introduce basic Tdx functions in BaseLib
RFC: https://bugzilla.tianocore.org/show_bug.cgi?id=3429 Introduce basic Tdx functions in BaseLib: - TdCall () - TdVmCall () - TdIsEnabled () Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Brijesh Singh <brijesh.singh@amd.com> Cc: Erdem Aktas <erdemaktas@google.com> Cc: James Bottomley <jejb@linux.ibm.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Tom Lendacky <thomas.lendacky@amd.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Acked-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Signed-off-by: Min Xu <min.m.xu@intel.com>
This commit is contained in:
Min Xu
mergify[bot]
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818bc9596d
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@ -4759,6 +4759,72 @@ SpeculationBarrier (
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VOID
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);
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#if defined (MDE_CPU_X64) || defined (MDE_CPU_IA32)
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/**
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The TDCALL instruction causes a VM exit to the Intel TDX module. It is
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used to call guest-side Intel TDX functions, either local or a TD exit
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to the host VMM, as selected by Leaf.
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@param[in] Leaf Leaf number of TDCALL instruction
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@param[in] Arg1 Arg1
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@param[in] Arg2 Arg2
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@param[in] Arg3 Arg3
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@param[in,out] Results Returned result of the Leaf function
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@return 0 A successful call
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@return Other See individual leaf functions
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**/
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UINTN
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EFIAPI
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TdCall (
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IN UINT64 Leaf,
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IN UINT64 Arg1,
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IN UINT64 Arg2,
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IN UINT64 Arg3,
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IN OUT VOID *Results
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);
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/**
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TDVMALL is a leaf function 0 for TDCALL. It helps invoke services from the
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host VMM to pass/receive information.
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@param[in] Leaf Number of sub-functions
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@param[in] Arg1 Arg1
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@param[in] Arg2 Arg2
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@param[in] Arg3 Arg3
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@param[in] Arg4 Arg4
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@param[in,out] Results Returned result of the sub-function
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@return 0 A successful call
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@return Other See individual sub-functions
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**/
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UINTN
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EFIAPI
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TdVmCall (
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IN UINT64 Leaf,
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IN UINT64 Arg1,
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IN UINT64 Arg2,
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IN UINT64 Arg3,
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IN UINT64 Arg4,
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IN OUT VOID *Results
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);
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/**
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Probe if TD is enabled.
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@return TRUE TD is enabled.
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@return FALSE TD is not enabled.
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**/
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BOOLEAN
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EFIAPI
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TdIsEnabled (
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VOID
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);
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#endif
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#if defined (MDE_CPU_X64)
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//
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// The page size for the PVALIDATE instruction
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@ -210,6 +210,7 @@
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X86RdRand.c
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X86PatchInstruction.c
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X86SpeculationBarrier.c
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IntelTdxNull.c
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[Sources.X64]
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X64/Thunk16.nasm
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@ -293,6 +294,9 @@
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X64/ReadCr0.nasm| MSFT
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X64/ReadEflags.nasm| MSFT
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X64/TdCall.nasm
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X64/TdVmcall.nasm
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X64/TdProbe.c
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X64/Non-existing.c
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Math64.c
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@ -0,0 +1,83 @@
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/** @file
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Null stub of TdxLib
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Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#include <Library/BaseLib.h>
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#include <Uefi/UefiBaseType.h>
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/**
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The TDCALL instruction causes a VM exit to the Intel TDX module. It is
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used to call guest-side Intel TDX functions, either local or a TD exit
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to the host VMM, as selected by Leaf.
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Leaf functions are described at <https://software.intel.com/content/
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www/us/en/develop/articles/intel-trust-domain-extensions.html>
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@param[in] Leaf Leaf number of TDCALL instruction
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@param[in] Arg1 Arg1
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@param[in] Arg2 Arg2
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@param[in] Arg3 Arg3
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@param[in,out] Results Returned result of the Leaf function
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@return EFI_SUCCESS
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@return Other See individual leaf functions
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**/
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UINTN
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EFIAPI
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TdCall (
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IN UINT64 Leaf,
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IN UINT64 Arg1,
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IN UINT64 Arg2,
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IN UINT64 Arg3,
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IN OUT VOID *Results
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)
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{
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return EFI_UNSUPPORTED;
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}
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/**
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TDVMALL is a leaf function 0 for TDCALL. It helps invoke services from the
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host VMM to pass/receive information.
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@param[in] Leaf Number of sub-functions
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@param[in] Arg1 Arg1
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@param[in] Arg2 Arg2
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@param[in] Arg3 Arg3
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@param[in] Arg4 Arg4
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@param[in,out] Results Returned result of the sub-function
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@return EFI_SUCCESS
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@return Other See individual sub-functions
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**/
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UINTN
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EFIAPI
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TdVmCall (
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IN UINT64 Leaf,
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IN UINT64 Arg1,
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IN UINT64 Arg2,
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IN UINT64 Arg3,
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IN UINT64 Arg4,
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IN OUT VOID *Results
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)
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{
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return EFI_UNSUPPORTED;
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}
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/**
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Probe if TD is enabled.
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@return TRUE TD is enabled.
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@return FALSE TD is not enabled.
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**/
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BOOLEAN
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EFIAPI
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TdIsEnabled (
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)
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{
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return FALSE;
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}
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@ -0,0 +1,85 @@
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;------------------------------------------------------------------------------
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;*
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;* Copyright (c) 2020 - 2021, Intel Corporation. All rights reserved.<BR>
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;* SPDX-License-Identifier: BSD-2-Clause-Patent
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;*
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;*
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;------------------------------------------------------------------------------
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DEFAULT REL
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SECTION .text
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%macro tdcall 0
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db 0x66,0x0f,0x01,0xcc
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%endmacro
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%macro tdcall_push_regs 0
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push rbp
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mov rbp, rsp
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push r15
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push r14
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push r13
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push r12
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push rbx
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push rsi
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push rdi
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%endmacro
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%macro tdcall_pop_regs 0
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pop rdi
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pop rsi
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pop rbx
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pop r12
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pop r13
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pop r14
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pop r15
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pop rbp
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%endmacro
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%define number_of_regs_pushed 8
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%define number_of_parameters 4
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;
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; Keep these in sync for push_regs/pop_regs, code below
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; uses them to find 5th or greater parameters
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;
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%define first_variable_on_stack_offset \
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((number_of_regs_pushed * 8) + (number_of_parameters * 8) + 8)
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%define second_variable_on_stack_offset \
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((first_variable_on_stack_offset) + 8)
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; TdCall (
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; UINT64 Leaf, // Rcx
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; UINT64 P1, // Rdx
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; UINT64 P2, // R8
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; UINT64 P3, // R9
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; UINT64 Results, // rsp + 0x28
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; )
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global ASM_PFX(TdCall)
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ASM_PFX(TdCall):
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tdcall_push_regs
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mov rax, rcx
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mov rcx, rdx
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mov rdx, r8
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mov r8, r9
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tdcall
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; exit if tdcall reports failure.
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test rax, rax
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jnz .exit
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; test if caller wanted results
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mov r12, [rsp + first_variable_on_stack_offset ]
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test r12, r12
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jz .exit
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mov [r12 + 0 ], rcx
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mov [r12 + 8 ], rdx
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mov [r12 + 16], r8
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mov [r12 + 24], r9
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mov [r12 + 32], r10
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mov [r12 + 40], r11
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.exit:
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tdcall_pop_regs
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ret
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@ -0,0 +1,63 @@
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/** @file
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Copyright (c) 2020-2021, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#include <Library/BaseLib.h>
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#include <Register/Intel/Cpuid.h>
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/**
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Probe if TD is enabled.
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@return TRUE TD is enabled.
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@return FALSE TD is not enabled.
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**/
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BOOLEAN
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EFIAPI
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TdIsEnabled (
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)
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{
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UINT32 Eax;
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UINT32 Ebx;
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UINT32 Ecx;
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UINT32 Edx;
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UINT32 LargestEax;
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BOOLEAN TdEnabled;
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CPUID_VERSION_INFO_ECX CpuIdVersionInfoEcx;
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TdEnabled = FALSE;
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do {
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AsmCpuid (CPUID_SIGNATURE, &LargestEax, &Ebx, &Ecx, &Edx);
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if ( (Ebx != CPUID_SIGNATURE_GENUINE_INTEL_EBX)
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|| (Edx != CPUID_SIGNATURE_GENUINE_INTEL_EDX)
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|| (Ecx != CPUID_SIGNATURE_GENUINE_INTEL_ECX))
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{
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break;
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}
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AsmCpuid (CPUID_VERSION_INFO, NULL, NULL, &CpuIdVersionInfoEcx.Uint32, NULL);
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if (CpuIdVersionInfoEcx.Bits.ParaVirtualized == 0) {
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break;
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}
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if (LargestEax < CPUID_GUESTTD_RUNTIME_ENVIRONMENT) {
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break;
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}
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AsmCpuidEx (CPUID_GUESTTD_RUNTIME_ENVIRONMENT, 0, &Eax, &Ebx, &Ecx, &Edx);
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if ( (Ebx != CPUID_GUESTTD_SIGNATURE_GENUINE_INTEL_EBX)
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|| (Edx != CPUID_GUESTTD_SIGNATURE_GENUINE_INTEL_EDX)
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|| (Ecx != CPUID_GUESTTD_SIGNATURE_GENUINE_INTEL_ECX))
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{
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break;
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}
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TdEnabled = TRUE;
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} while (FALSE);
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return TdEnabled;
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}
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@ -0,0 +1,145 @@
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;------------------------------------------------------------------------------
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;*
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;* Copyright (c) 2020 - 2021, Intel Corporation. All rights reserved.<BR>
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;* SPDX-License-Identifier: BSD-2-Clause-Patent
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;*
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;*
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;------------------------------------------------------------------------------
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DEFAULT REL
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SECTION .text
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%define TDVMCALL_EXPOSE_REGS_MASK 0xffec
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%define TDVMCALL 0x0
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%macro tdcall 0
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db 0x66,0x0f,0x01,0xcc
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%endmacro
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%macro tdcall_push_regs 0
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push rbp
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mov rbp, rsp
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push r15
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push r14
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push r13
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push r12
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push rbx
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push rsi
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push rdi
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%endmacro
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%macro tdcall_pop_regs 0
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pop rdi
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pop rsi
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pop rbx
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pop r12
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pop r13
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pop r14
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pop r15
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pop rbp
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%endmacro
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%define number_of_regs_pushed 8
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%define number_of_parameters 4
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;
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; Keep these in sync for push_regs/pop_regs, code below
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; uses them to find 5th or greater parameters
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;
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%define first_variable_on_stack_offset \
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((number_of_regs_pushed * 8) + (number_of_parameters * 8) + 8)
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%define second_variable_on_stack_offset \
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((first_variable_on_stack_offset) + 8)
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%macro tdcall_regs_preamble 2
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mov rax, %1
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xor rcx, rcx
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mov ecx, %2
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; R10 = 0 (standard TDVMCALL)
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xor r10d, r10d
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; Zero out unused (for standard TDVMCALL) registers to avoid leaking
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; secrets to the VMM.
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xor ebx, ebx
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xor esi, esi
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xor edi, edi
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xor edx, edx
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xor ebp, ebp
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xor r8d, r8d
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xor r9d, r9d
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%endmacro
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%macro tdcall_regs_postamble 0
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xor ebx, ebx
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xor esi, esi
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xor edi, edi
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xor ecx, ecx
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xor edx, edx
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xor r8d, r8d
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xor r9d, r9d
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xor r10d, r10d
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xor r11d, r11d
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%endmacro
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;------------------------------------------------------------------------------
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; 0 => RAX = TDCALL leaf
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; M => RCX = TDVMCALL register behavior
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; 1 => R10 = standard vs. vendor
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; RDI => R11 = TDVMCALL function / nr
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; RSI = R12 = p1
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; RDX => R13 = p2
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; RCX => R14 = p3
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; R8 => R15 = p4
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; UINT64
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; EFIAPI
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; TdVmCall (
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; UINT64 Leaf, // Rcx
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; UINT64 P1, // Rdx
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; UINT64 P2, // R8
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; UINT64 P3, // R9
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; UINT64 P4, // rsp + 0x28
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; UINT64 *Val // rsp + 0x30
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; )
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global ASM_PFX(TdVmCall)
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ASM_PFX(TdVmCall):
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tdcall_push_regs
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mov r11, rcx
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mov r12, rdx
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mov r13, r8
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mov r14, r9
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mov r15, [rsp + first_variable_on_stack_offset ]
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tdcall_regs_preamble TDVMCALL, TDVMCALL_EXPOSE_REGS_MASK
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tdcall
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; ignore return dataif TDCALL reports failure.
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test rax, rax
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jnz .no_return_data
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; Propagate TDVMCALL success/failure to return value.
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mov rax, r10
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; Retrieve the Val pointer.
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mov r9, [rsp + second_variable_on_stack_offset ]
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test r9, r9
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jz .no_return_data
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; On success, propagate TDVMCALL output value to output param
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test rax, rax
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jnz .no_return_data
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mov [r9], r11
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.no_return_data:
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tdcall_regs_postamble
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tdcall_pop_regs
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ret
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