ArmPkg/ArmCpuLib: Fix GCC/XCode builds

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12626 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
oliviermartin 2011-11-01 23:32:04 +00:00
parent 793275a858
commit 81be6e070f
8 changed files with 32 additions and 7 deletions

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@ -34,7 +34,11 @@ ASM_PFX(ArmCpuSynchronizeWait):
cmp r0, #ARM_CPU_EVENT_BOOT_MEM_INIT
// The SCU enabled is the event to tell us the Init Boot Memory is initialized
beq ArmWaitGicDistributorEnabled
bx ASM_PFX(CArmCpuSynchronizeWait)
push {r1,lr}
LoadConstantToReg (ASM_PFX(CArmCpuSynchronizeWait), r1)
blx r1
pop {r1,lr}
bx lr
// IN None
ArmWaitGicDistributorEnabled:

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@ -35,7 +35,13 @@ ArmCpuSynchronizeWait
cmp r0, #ARM_CPU_EVENT_BOOT_MEM_INIT
// The SCU enabled is the event to tell us the Init Boot Memory is initialized
beq ArmWaitGicDistributorEnabled
b CArmCpuSynchronizeWait
// Case when the stack has been set up
push {r1,lr}
LoadConstantToReg (CArmCpuSynchronizeWait, r1)
blx r1
pop {r1,lr}
bx lr
// IN None
ArmWaitGicDistributorEnabled

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@ -11,6 +11,7 @@
//
//
#include <AsmMacroIoLib.h>
#include <Library/ArmCpuLib.h>
#include <Chipset/ArmCortexA9.h>
@ -29,7 +30,12 @@ ASM_PFX(ArmCpuSynchronizeWait):
cmp r0, #ARM_CPU_EVENT_BOOT_MEM_INIT
// The SCU enabled is the event to tell us the Init Boot Memory is initialized
beq ASM_PFX(ArmWaitScuEnabled)
b ASM_PFX(CArmCpuSynchronizeWait)
// Case when the stack has been set up
push {r1,lr}
LoadConstantToReg (ASM_PFX(CArmCpuSynchronizeWait), r1)
blx r1
pop {r1,lr}
bx lr
// IN None
// OUT r0 = SCU Base Address

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@ -11,9 +11,12 @@
//
//
#include <AsmMacroIoLib.h>
#include <Library/ArmCpuLib.h>
#include <Chipset/ArmCortexA9.h>
INCLUDE AsmMacroIoLib.inc
EXPORT ArmCpuSynchronizeWait
EXPORT ArmGetScuBaseAddress
IMPORT CArmCpuSynchronizeWait
@ -29,7 +32,12 @@ ArmCpuSynchronizeWait
cmp r0, #ARM_CPU_EVENT_BOOT_MEM_INIT
// The SCU enabled is the event to tell us the Init Boot Memory is initialized
beq ArmWaitScuEnabled
b CArmCpuSynchronizeWait
// Case when the stack has been set up
push {r1,lr}
LoadConstantToReg (CArmCpuSynchronizeWait, r1)
blx r1
pop {r1,lr}
bx lr
// IN None
// OUT r0 = SCU Base Address

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@ -16,6 +16,7 @@
#include <PiDxe.h>
#include <Library/ArmLib.h>
#include <Library/BaseLib.h>
#include <Library/DebugLib.h>
#include <Library/BaseMemoryLib.h>

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@ -22,6 +22,7 @@
**/
#include <Base.h>
#include <Library/BaseLib.h>
#include <Library/BaseMemoryLib.h>
#include <Library/MemoryAllocationLib.h>

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@ -37,5 +37,4 @@
DebugLib
PeCoffGetEntryPointLib
ArmDisassemblerLib
SerialPortLib

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@ -68,7 +68,7 @@
GCC:*_*_ARM_PLATFORM_FLAGS == -mcpu=cortex-a9 -mfpu=neon -I$(WORKSPACE)/ArmPlatformPkg/ArmVExpressPkg/Include -I$(WORKSPACE)/ArmPlatformPkg/ArmVExpressPkg/Include/Platform/CTA9x4
XCODE:*_*_ARM_PLATFORM_FLAGS == -march=armv7-a -mfpu=neon -I$(WORKSPACE)/ArmPlatformPkg/ArmVExpressPkg/Include -I$(WORKSPACE)/ArmPlatformPkg/ArmVExpressPkg/Include/Platform/CTA9x4
XCODE:*_*_ARM_PLATFORM_FLAGS == -mcpu=cortex-a9 -mfpu=neon -I$(WORKSPACE)/ArmPlatformPkg/ArmVExpressPkg/Include -I$(WORKSPACE)/ArmPlatformPkg/ArmVExpressPkg/Include/Platform/CTA9x4
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