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ArmPkg: Expand AArch64 address width to 48 bits 

The VA address space has a maximum address width of 48 bits in
AArch64 state; 48 bits address width limit will provide better
compatibility than 40 bits for future CPU.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
Reviewed-by: Olivier Martin <Olivier.Martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17526 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
Heyi Guo 2015-05-27 15:10:10 +00:00 committed by oliviermartin
parent 98c9d3be08
commit 829ea9b2dd
1 changed files with 2 additions and 2 deletions
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4
ArmPkg/Include/Chipset/AArch64Mmu.h
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@ -51,8 +51,8 @@
#define TT_ALIGNMENT_BLOCK_ENTRY BIT12
#define TT_ALIGNMENT_DESCRIPTION_TABLE BIT12
#define TT_ADDRESS_MASK_BLOCK_ENTRY (0xFFFFFFFULL << 12)
#define TT_ADDRESS_MASK_DESCRIPTION_TABLE (0xFFFFFFFULL << 12)
#define TT_ADDRESS_MASK_BLOCK_ENTRY (0xFFFFFFFFFULL << 12)
#define TT_ADDRESS_MASK_DESCRIPTION_TABLE (0xFFFFFFFFFULL << 12)
#define TT_TYPE_MASK 0x3
#define TT_TYPE_TABLE_ENTRY 0x3