mirror of https://github.com/acidanthera/audk.git
ArmPlatformPkg/PrePeiCore: add missing entries to AArch64 vector table
The PrePeiCore vector table for AArch64 mode is only half populated. However unlikely, if exceptions from lower exception levels are ever taken, they should be reported correctly, rather than causing a recursive undefined instruction fault on the zero padding that was introduced by commit SVN r18904 ("ArmPkg/ArmPlatformPkg: position vectors relative to base"). So add the missing entries, and wire them up to the default handler. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Acked-by: Mark Rutland <mark.rutland@arm.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18976 6f19259b-4bc3-4df7-8a09-765794883524
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@ -77,4 +77,44 @@ _DefaultSError_h:
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mov x0, #EXCEPT_AARCH64_SERROR
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TO_HANDLER
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VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_LOW_A64_SYNC)
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_DefaultSyncExceptHandler_LowerA64:
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mov x0, #EXCEPT_AARCH64_SYNCHRONOUS_EXCEPTIONS
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TO_HANDLER
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VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_LOW_A64_IRQ)
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_DefaultIrq_LowerA64:
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mov x0, #EXCEPT_AARCH64_IRQ
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TO_HANDLER
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VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_LOW_A64_FIQ)
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_DefaultFiq_LowerA64:
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mov x0, #EXCEPT_AARCH64_FIQ
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TO_HANDLER
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VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_LOW_A64_SERR)
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_DefaultSError_LowerA64:
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mov x0, #EXCEPT_AARCH64_SERROR
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TO_HANDLER
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VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_LOW_A32_SYNC)
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_DefaultSyncExceptHandler_LowerA32:
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mov x0, #EXCEPT_AARCH64_SYNCHRONOUS_EXCEPTIONS
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TO_HANDLER
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VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_LOW_A32_IRQ)
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_DefaultIrq_LowerA32:
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mov x0, #EXCEPT_AARCH64_IRQ
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TO_HANDLER
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VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_LOW_A32_FIQ)
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_DefaultFiq_LowerA32:
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mov x0, #EXCEPT_AARCH64_FIQ
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TO_HANDLER
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VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_LOW_A32_SERR)
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_DefaultSError_LowerA32:
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mov x0, #EXCEPT_AARCH64_SERROR
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TO_HANDLER
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VECTOR_END(PeiVectorTable)
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