DynamicTablesPkg: Move Pci Address Map Info to Arch Common

Move Pci Address Map Info object from Arm Namespace to the
Arch Common namespace.

Correspondingly also update the following modules to reflect the
changes introduced by the move:
 - SSDT PCIe generator
 - ConfigurationManagerObjectParser
 - Dynamic Plat Repo TokenFixer map
 - FdtHwInfoParserLib/Pci/ArmPciConfigSpaceParser.

Cc: Pierre Gondois <Pierre.Gondois@arm.com>
Cc: Yeo Reum Yun <YeoReum.Yun@arm.com>
Cc: AbdulLateef Attar <AbdulLateef.Attar@amd.com>
Cc: Jeshua Smith <jeshuas@nvidia.com>
Cc: Jeff Brasen <jbrasen@nvidia.com>
Cc: Girish Mahadevan <gmahadevan@nvidia.com>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
This commit is contained in:
Sami Mujawar 2024-03-08 11:48:29 +00:00 committed by mergify[bot]
parent ae1ba78718
commit 83b01dc5cc
8 changed files with 93 additions and 94 deletions

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@ -29,6 +29,7 @@ typedef enum ArchCommonObjectID {
EArchCommonObjFixedFeatureFlags, ///< 6 - Fixed feature flags for FADT
EArchCommonObjCmRef, ///< 7 - CM Object Reference
EArchCommonObjPciConfigSpaceInfo, ///< 8 - PCI Configuration Space Info
EArchCommonObjPciAddressMapInfo, ///< 9 - Pci Address Map Info
EArchCommonObjMax
} EARCH_COMMON_OBJECT_ID;
@ -142,6 +143,33 @@ typedef struct CmArchCommonPciConfigSpaceInfo {
CM_OBJECT_TOKEN InterruptMapToken;
} CM_ARCH_COMMON_PCI_CONFIG_SPACE_INFO;
/** A structure that describes a PCI Address Map.
The memory-ranges used by the PCI bus are described by this object.
ID: EArchCommonObjPciAddressMapInfo
*/
typedef struct CmArchCommonPciAddressMapInfo {
/** Pci address space code
Available values are:
- 0: Configuration Space
- 1: I/O Space
- 2: 32-bit-address Memory Space
- 3: 64-bit-address Memory Space
*/
UINT8 SpaceCode;
/// PCI address
UINT64 PciAddress;
/// Cpu address
UINT64 CpuAddress;
/// Address size
UINT64 AddressSize;
} CM_ARCH_COMMON_PCI_ADDRESS_MAP_INFO;
#pragma pack()
#endif // ARCH_COMMON_NAMESPACE_OBJECTS_H_

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@ -56,19 +56,18 @@ typedef enum ArmObjectID {
EArmObjGenericInitiatorAffinityInfo, ///< 25 - Generic Initiator Affinity
EArmObjCmn600Info, ///< 26 - CMN-600 Info
EArmObjLpiInfo, ///< 27 - Lpi Info
EArmObjPciAddressMapInfo, ///< 28 - Pci Address Map Info
EArmObjPciInterruptMapInfo, ///< 29 - Pci Interrupt Map Info
EArmObjRmr, ///< 30 - Reserved Memory Range Node
EArmObjMemoryRangeDescriptor, ///< 31 - Memory Range Descriptor
EArmObjCpcInfo, ///< 32 - Continuous Performance Control Info
EArmObjPccSubspaceType0Info, ///< 33 - Pcc Subspace Type 0 Info
EArmObjPccSubspaceType1Info, ///< 34 - Pcc Subspace Type 2 Info
EArmObjPccSubspaceType2Info, ///< 35 - Pcc Subspace Type 2 Info
EArmObjPccSubspaceType3Info, ///< 36 - Pcc Subspace Type 3 Info
EArmObjPccSubspaceType4Info, ///< 37 - Pcc Subspace Type 4 Info
EArmObjPccSubspaceType5Info, ///< 38 - Pcc Subspace Type 5 Info
EArmObjEtInfo, ///< 39 - Embedded Trace Extension/Module Info
EArmObjPsdInfo, ///< 40 - P-State Dependency (PSD) Info
EArmObjPciInterruptMapInfo, ///< 28 - Pci Interrupt Map Info
EArmObjRmr, ///< 29 - Reserved Memory Range Node
EArmObjMemoryRangeDescriptor, ///< 30 - Memory Range Descriptor
EArmObjCpcInfo, ///< 31 - Continuous Performance Control Info
EArmObjPccSubspaceType0Info, ///< 32 - Pcc Subspace Type 0 Info
EArmObjPccSubspaceType1Info, ///< 33 - Pcc Subspace Type 2 Info
EArmObjPccSubspaceType2Info, ///< 34 - Pcc Subspace Type 2 Info
EArmObjPccSubspaceType3Info, ///< 35 - Pcc Subspace Type 3 Info
EArmObjPccSubspaceType4Info, ///< 36 - Pcc Subspace Type 4 Info
EArmObjPccSubspaceType5Info, ///< 37 - Pcc Subspace Type 5 Info
EArmObjEtInfo, ///< 38 - Embedded Trace Extension/Module Info
EArmObjPsdInfo, ///< 39 - P-State Dependency (PSD) Info
EArmObjMax
} EARM_OBJECT_ID;
@ -901,33 +900,6 @@ typedef struct CmArmLpiInfo {
CHAR8 StateName[16];
} CM_ARM_LPI_INFO;
/** A structure that describes a PCI Address Map.
The memory-ranges used by the PCI bus are described by this object.
ID: EArmObjPciAddressMapInfo
*/
typedef struct CmArmPciAddressMapInfo {
/** Pci address space code
Available values are:
- 0: Configuration Space
- 1: I/O Space
- 2: 32-bit-address Memory Space
- 3: 64-bit-address Memory Space
*/
UINT8 SpaceCode;
/// PCI address
UINT64 PciAddress;
/// Cpu address
UINT64 CpuAddress;
/// Address size
UINT64 AddressSize;
} CM_ARM_PCI_ADDRESS_MAP_INFO;
/** A structure that describes a PCI Interrupt Map.
The legacy PCI interrupts used by PCI devices are described by this object.

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@ -44,7 +44,7 @@ Requirements:
this Generator:
- EArchCommonObjCmRef
- EArchCommonObjPciConfigSpaceInfo
- EArmObjPciAddressMapInfo
- EArchCommonObjPciAddressMapInfo
- EArmObjPciInterruptMapInfo
*/
@ -70,9 +70,9 @@ GET_OBJECT_LIST (
Address Mapping Information from the Configuration Manager.
*/
GET_OBJECT_LIST (
EObjNameSpaceArm,
EArmObjPciAddressMapInfo,
CM_ARM_PCI_ADDRESS_MAP_INFO
EObjNameSpaceArchCommon,
EArchCommonObjPciAddressMapInfo,
CM_ARCH_COMMON_PCI_ADDRESS_MAP_INFO
);
/** This macro expands to a function that retrieves the Pci
@ -455,14 +455,14 @@ GeneratePciCrs (
IN OUT AML_OBJECT_NODE_HANDLE PciNode
)
{
EFI_STATUS Status;
BOOLEAN Translation;
UINT32 Index;
CM_ARCH_COMMON_OBJ_REF *RefInfo;
UINT32 RefCount;
CM_ARM_PCI_ADDRESS_MAP_INFO *AddrMapInfo;
AML_OBJECT_NODE_HANDLE CrsNode;
BOOLEAN IsPosDecode;
EFI_STATUS Status;
BOOLEAN Translation;
UINT32 Index;
CM_ARCH_COMMON_OBJ_REF *RefInfo;
UINT32 RefCount;
CM_ARCH_COMMON_PCI_ADDRESS_MAP_INFO *AddrMapInfo;
AML_OBJECT_NODE_HANDLE CrsNode;
BOOLEAN IsPosDecode;
ASSERT (Generator != NULL);
ASSERT (CfgMgrProtocol != NULL);
@ -506,7 +506,7 @@ GeneratePciCrs (
}
// Get the array of CM_ARCH_COMMON_OBJ_REF referencing the
// CM_ARM_PCI_ADDRESS_MAP_INFO objects.
// CM_ARCH_COMMON_PCI_ADDRESS_MAP_INFO objects.
Status = GetEArchCommonObjCmRef (
CfgMgrProtocol,
PciInfo->AddressMapToken,
@ -519,8 +519,8 @@ GeneratePciCrs (
}
for (Index = 0; Index < RefCount; Index++) {
// Get CM_ARM_PCI_ADDRESS_MAP_INFO structures one by one.
Status = GetEArmObjPciAddressMapInfo (
// Get CM_ARCH_COMMON_PCI_ADDRESS_MAP_INFO structures one by one.
Status = GetEArchCommonObjPciAddressMapInfo (
CfgMgrProtocol,
RefInfo[Index].ReferenceToken,
&AddrMapInfo,

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@ -171,19 +171,18 @@ CM_OBJECT_TOKEN_FIXER TokenFixer[EArmObjMax] = {
NULL, ///< 25 - Generic Initiator Affinity
NULL, ///< 26 - CMN-600 Info
NULL, ///< 27 - Lpi Info
NULL, ///< 28 - Pci Address Map Info
NULL, ///< 29 - Pci Interrupt Map Info
NULL, ///< 30 - Reserved Memory Range Node
NULL, ///< 31 - Memory Range Descriptor
NULL, ///< 32 - Continuous Performance Control Info
NULL, ///< 33 - Pcc Subspace Type 0 Info
NULL, ///< 28 - Pci Interrupt Map Info
NULL, ///< 29 - Reserved Memory Range Node
NULL, ///< 30 - Memory Range Descriptor
NULL, ///< 31 - Continuous Performance Control Info
NULL, ///< 32 - Pcc Subspace Type 0 Info
NULL, ///< 33 - Pcc Subspace Type 2 Info
NULL, ///< 34 - Pcc Subspace Type 2 Info
NULL, ///< 35 - Pcc Subspace Type 2 Info
NULL, ///< 36 - Pcc Subspace Type 3 Info
NULL, ///< 37 - Pcc Subspace Type 4 Info
NULL, ///< 38 - Pcc Subspace Type 5 Info
NULL, ///< 39 - Embedded Trace Extension/Module Info
NULL ///< 40 - P-State Dependency (PSD) Info
NULL, ///< 35 - Pcc Subspace Type 3 Info
NULL, ///< 36 - Pcc Subspace Type 4 Info
NULL, ///< 37 - Pcc Subspace Type 5 Info
NULL, ///< 38 - Embedded Trace Extension/Module Info
NULL ///< 39 - P-State Dependency (PSD) Info
};
/** CmObj token fixer.

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@ -440,9 +440,9 @@ STATIC CONST CM_OBJ_PARSER CmArmLpiInfoParser[] = {
{ "StateName", 16, NULL, PrintString },
};
/** A parser for EArmObjPciAddressMapInfo.
/** A parser for EArchCommonObjPciAddressMapInfo.
*/
STATIC CONST CM_OBJ_PARSER CmArmPciAddressMapInfoParser[] = {
STATIC CONST CM_OBJ_PARSER CmArchCommonPciAddressMapInfoParser[] = {
{ "SpaceCode", 1, "%d", NULL },
{ "PciAddress", 8, "0x%llx", NULL },
{ "CpuAddress", 8, "0x%llx", NULL },
@ -679,6 +679,7 @@ STATIC CONST CM_OBJ_PARSER_ARRAY ArchCommonNamespaceObjectParser[] = {
CM_PARSER_ADD_OBJECT (EArchCommonObjFixedFeatureFlags, CmArchCommonFixedFeatureFlagsParser),
CM_PARSER_ADD_OBJECT (EArchCommonObjCmRef, CmArchCommonObjRefParser),
CM_PARSER_ADD_OBJECT (EArchCommonObjPciConfigSpaceInfo, CmArchCommonPciConfigSpaceInfoParser),
CM_PARSER_ADD_OBJECT (EArchCommonObjPciAddressMapInfo, CmArchCommonPciAddressMapInfoParser),
CM_PARSER_ADD_OBJECT_RESERVED (EArchCommonObjMax)
};
@ -713,7 +714,6 @@ STATIC CONST CM_OBJ_PARSER_ARRAY ArmNamespaceObjectParser[] = {
CM_PARSER_ADD_OBJECT (EArmObjGenericInitiatorAffinityInfo,CmArmGenericInitiatorAffinityInfoParser),
CM_PARSER_ADD_OBJECT (EArmObjCmn600Info, CmArmCmn600InfoParser),
CM_PARSER_ADD_OBJECT (EArmObjLpiInfo, CmArmLpiInfoParser),
CM_PARSER_ADD_OBJECT (EArmObjPciAddressMapInfo, CmArmPciAddressMapInfoParser),
CM_PARSER_ADD_OBJECT (EArmObjPciInterruptMapInfo, CmPciInterruptMapInfoParser),
CM_PARSER_ADD_OBJECT (EArmObjRmr, CmArmRmrInfoParser),
CM_PARSER_ADD_OBJECT (EArmObjMemoryRangeDescriptor, CmArmMemoryRangeDescriptorInfoParser),

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@ -188,8 +188,8 @@ ParseAddressMap (
UINT32 Count;
UINT32 PciAddressAttr;
CM_ARM_PCI_ADDRESS_MAP_INFO *PciAddressMapInfo;
UINT32 BufferSize;
CM_ARCH_COMMON_PCI_ADDRESS_MAP_INFO *PciAddressMapInfo;
UINT32 BufferSize;
// The mapping is done on AddressMapSize bytes.
AddressMapSize = (PCI_ADDRESS_CELLS + AddressCells + PCI_SIZE_CELLS) *
@ -208,7 +208,7 @@ ParseAddressMap (
Count = DataSize / AddressMapSize;
// Allocate a buffer to store each address mapping.
BufferSize = Count * sizeof (CM_ARM_PCI_ADDRESS_MAP_INFO);
BufferSize = Count * sizeof (CM_ARCH_COMMON_PCI_ADDRESS_MAP_INFO);
PciAddressMapInfo = AllocateZeroPool (BufferSize);
if (PciAddressMapInfo == NULL) {
ASSERT (0);
@ -246,9 +246,9 @@ ParseAddressMap (
} // for
PciInfo->Mapping[PciMappingTableAddress].ObjectId =
CREATE_CM_ARM_OBJECT_ID (EArmObjPciAddressMapInfo);
CREATE_CM_ARCH_COMMON_OBJECT_ID (EArchCommonObjPciAddressMapInfo);
PciInfo->Mapping[PciMappingTableAddress].Size =
sizeof (CM_ARM_PCI_ADDRESS_MAP_INFO) * Count;
sizeof (CM_ARCH_COMMON_PCI_ADDRESS_MAP_INFO) * Count;
PciInfo->Mapping[PciMappingTableAddress].Data = PciAddressMapInfo;
PciInfo->Mapping[PciMappingTableAddress].Count = Count;
@ -413,7 +413,7 @@ ParseIrqMap (
// Allocate a buffer to store each interrupt mapping.
IrqMapCount = DataSize / IrqMapSize;
BufferSize = IrqMapCount * sizeof (CM_ARM_PCI_ADDRESS_MAP_INFO);
BufferSize = IrqMapCount * sizeof (CM_ARCH_COMMON_PCI_ADDRESS_MAP_INFO);
PciInterruptMapInfo = AllocateZeroPool (BufferSize);
if (PciInterruptMapInfo == NULL) {
ASSERT (0);
@ -580,7 +580,7 @@ PciNodeParser (
CmObj of the following types are concerned:
- EArchCommonObjPciConfigSpaceInfo
- EArmObjPciAddressMapInfo
- EArchCommonObjPciAddressMapInfo
- EArmObjPciInterruptMapInfo
@param [in] FdtParserHandle A handle to the parser instance.
@ -694,12 +694,12 @@ FreeParserTable (
UINT8 EndBusNumber; // {Populated}
} CM_ARCH_COMMON_PCI_CONFIG_SPACE_INFO;
typedef struct CmArmPciAddressMapInfo {
typedef struct CmArchCommonPciAddressMapInfo {
UINT8 SpaceCode; // {Populated}
UINT64 PciAddress; // {Populated}
UINT64 CpuAddress; // {Populated}
UINT64 AddressSize; // {Populated}
} CM_ARM_PCI_ADDRESS_MAP_INFO;
} CM_ARCH_COMMON_PCI_ADDRESS_MAP_INFO;
typedef struct CmArmPciInterruptMapInfo {
UINT8 PciBus; // {Populated}

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@ -102,12 +102,12 @@ typedef struct PciParserTable {
UINT8 EndBusNumber; // {Populated}
} CM_ARCH_COMMON_PCI_CONFIG_SPACE_INFO;
typedef struct CmArmPciAddressMapInfo {
typedef struct CmArchCommonPciAddressMapInfo {
UINT8 SpaceCode; // {Populated}
UINT64 PciAddress; // {Populated}
UINT64 CpuAddress; // {Populated}
UINT64 AddressSize; // {Populated}
} CM_ARM_PCI_ADDRESS_MAP_INFO;
} CM_ARCH_COMMON_PCI_ADDRESS_MAP_INFO;
typedef struct CmArmPciInterruptMapInfo {
UINT8 PciBus; // {Populated}

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@ -468,19 +468,18 @@ The CM_OBJECT_ID type is used to identify the Configuration Manager
| 25 | Generic Initiator Affinity Info | Move to Arch Common NS |
| 26 | CMN 600 Info | |
| 27 | Low Power Idle State Info | Move to Arch Common NS |
| 28 | PCI Address Map Info | Move to Arch Common NS |
| 29 | PCI Interrupt Map Info | Move to Arch Common NS |
| 30 | Reserved Memory Range Node | |
| 31 | Memory Range Descriptor | |
| 32 | Continuous Performance Control Info | Move to Arch Common NS |
| 33 | Pcc Subspace Type 0 Info | Move to Arch Common NS |
| 34 | Pcc Subspace Type 1 Info | Move to Arch Common NS |
| 35 | Pcc Subspace Type 2 Info | Move to Arch Common NS |
| 36 | Pcc Subspace Type 3 Info | Move to Arch Common NS |
| 37 | Pcc Subspace Type 4 Info | Move to Arch Common NS |
| 38 | Pcc Subspace Type 5 Info | Move to Arch Common NS |
| 39 | Embedded Trace Extension/Module Info | |
| 40 | P-State Dependency (PSD) Info | Move to Arch Common NS |
| 28 | PCI Interrupt Map Info | Move to Arch Common NS |
| 29 | Reserved Memory Range Node | |
| 30 | Memory Range Descriptor | |
| 31 | Continuous Performance Control Info | Move to Arch Common NS |
| 32 | Pcc Subspace Type 0 Info | Move to Arch Common NS |
| 33 | Pcc Subspace Type 1 Info | Move to Arch Common NS |
| 34 | Pcc Subspace Type 2 Info | Move to Arch Common NS |
| 35 | Pcc Subspace Type 3 Info | Move to Arch Common NS |
| 36 | Pcc Subspace Type 4 Info | Move to Arch Common NS |
| 37 | Pcc Subspace Type 5 Info | Move to Arch Common NS |
| 38 | Embedded Trace Extension/Module Info | |
| 39 | P-State Dependency (PSD) Info | Move to Arch Common NS |
| `*` | All other values are reserved. | |
#### Object ID's in the Arch Common Namespace:
@ -496,4 +495,5 @@ The CM_OBJECT_ID type is used to identify the Configuration Manager
| 6 | Fixed feature flags for FADT | |
| 7 | CM Object Reference | |
| 8 | PCI Configuration Space Info | |
| 9 | PCI Address Map Info | |
| `*` | All other values are reserved. | |