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UefiCpuPkg: Refine casting expression result to bigger size 

There are cases that the operands of an expression are all with rank less
than UINT64/INT64 and the result of the expression is explicitly cast to
UINT64/INT64 to fit the target size.

An example will be:
UINT32 a,b;
// a and b can be any unsigned int type with rank less than UINT64, like
// UINT8, UINT16, etc.
UINT64 c;
c = (UINT64) (a + b);

Some static code checkers may warn that the expression result might
overflow within the rank of "int" (integer promotions) and the result is
then cast to a bigger size.

The commit refines codes by the following rules:
1). When the expression is possible to overflow the range of unsigned int/
int:
c = (UINT64)a + b;

2). When the expression will not overflow within the rank of "int", remove
the explicit type casts:
c = a + b;

3). When the expression will be cast to pointer of possible greater size:
UINT32 a,b;
VOID *c;
c = (VOID *)(UINTN)(a + b); --> c = (VOID *)((UINTN)a + b);

4). When one side of a comparison expression contains only operands with
rank less than UINT32:
UINT8 a;
UINT16 b;
UINTN c;
if ((UINTN)(a + b) > c) {...} --> if (((UINT32)a + b) > c) {...}

For rule 4), if we remove the 'UINTN' type cast like:
if (a + b > c) {...}
The VS compiler will complain with warning C4018 (signed/unsigned
mismatch, level 3 warning) due to promoting 'a + b' to type 'int'.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
This commit is contained in:
Hao Wu 2017-02-17 11:54:10 +08:00
parent 3ee1680978
commit 8491e302e1
5 changed files with 13 additions and 13 deletions
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4
UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.c
View File

@ -1,7 +1,7 @@
/** @file
Produces the CPU I/O 2 Protocol.
Copyright (c) 2009 - 2012, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2009 - 2017, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
This program and the accompanying materials
@ -141,7 +141,7 @@ CpuIoCheckParameter (
//
// Check to see if Address is aligned
//
if ((Address & (UINT64)(mInStride[Width] - 1)) != 0) {
if ((Address & ((UINT64)mInStride[Width] - 1)) != 0) {
return EFI_UNSUPPORTED;
}

4
UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.c
View File

@ -1,7 +1,7 @@
/** @file
Produces the SMM CPU I/O Protocol.
Copyright (c) 2009 - 2012, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2009 - 2017, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@ -126,7 +126,7 @@ CpuIoCheckParameter (
//
// Check to see if Address is aligned
//
if ((Address & (UINT64)(mStride[Width] - 1)) != 0) {
if ((Address & ((UINT64)mStride[Width] - 1)) != 0) {
return EFI_UNSUPPORTED;
}

8
UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmStm.c
View File

@ -1,7 +1,7 @@
/** @file
SMM STM support functions
Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2015 - 2017, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@ -276,8 +276,8 @@ SmmCpuFeaturesInstallSmiHandler (
UINT32 RegEdx;
EFI_PROCESSOR_INFORMATION ProcessorInfo;
CopyMem ((VOID *)(UINTN)(SmBase + TXT_SMM_PSD_OFFSET), &gcStmPsd, sizeof (gcStmPsd));
Psd = (TXT_PROCESSOR_SMM_DESCRIPTOR *)(VOID *)(UINTN)(SmBase + TXT_SMM_PSD_OFFSET);
CopyMem ((VOID *)((UINTN)SmBase + TXT_SMM_PSD_OFFSET), &gcStmPsd, sizeof (gcStmPsd));
Psd = (TXT_PROCESSOR_SMM_DESCRIPTOR *)(VOID *)((UINTN)SmBase + TXT_SMM_PSD_OFFSET);
Psd->SmmGdtPtr = GdtBase;
Psd->SmmGdtSize = (UINT32)GdtSize;
@ -317,7 +317,7 @@ SmmCpuFeaturesInstallSmiHandler (
// Copy template to CPU specific SMI handler location
//
CopyMem (
(VOID*)(UINTN)(SmBase + SMM_HANDLER_OFFSET),
(VOID*)((UINTN)SmBase + SMM_HANDLER_OFFSET),
(VOID*)gcStmSmiHandlerTemplate,
gcStmSmiHandlerSize
);

4
UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c
View File

@ -1,7 +1,7 @@
/** @file
Agent Module to load other modules to deploy SMM Entry Vector for X86 CPU.
Copyright (c) 2009 - 2016, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2009 - 2017, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
This program and the accompanying materials
@ -1282,7 +1282,7 @@ AllocateAlignedCodePages (
Status = gSmst->SmmFreePages (Memory, UnalignedPages);
ASSERT_EFI_ERROR (Status);
}
Memory = (EFI_PHYSICAL_ADDRESS) (AlignedMemory + EFI_PAGES_TO_SIZE (Pages));
Memory = AlignedMemory + EFI_PAGES_TO_SIZE (Pages);
UnalignedPages = RealPages - Pages - UnalignedPages;
if (UnalignedPages > 0) {
//

6
UefiCpuPkg/PiSmmCpuDxeSmm/SmramSaveState.c
View File

@ -1,7 +1,7 @@
/** @file
Provides services to access SMRAM Save State Map
Copyright (c) 2010 - 2016, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2010 - 2017, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@ -690,7 +690,7 @@ InstallSmiHandler (
//
// Initialize PROCESSOR_SMM_DESCRIPTOR
//
Psd = (PROCESSOR_SMM_DESCRIPTOR *)(VOID *)(UINTN)(SmBase + SMM_PSD_OFFSET);
Psd = (PROCESSOR_SMM_DESCRIPTOR *)(VOID *)((UINTN)SmBase + SMM_PSD_OFFSET);
CopyMem (Psd, &gcPsd, sizeof (gcPsd));
Psd->SmmGdtPtr = (UINT64)GdtBase;
Psd->SmmGdtSize = (UINT32)GdtSize;
@ -731,7 +731,7 @@ InstallSmiHandler (
// Copy template to CPU specific SMI handler location
//
CopyMem (
(VOID*)(UINTN)(SmBase + SMM_HANDLER_OFFSET),
(VOID*)((UINTN)SmBase + SMM_HANDLER_OFFSET),
(VOID*)gcSmiHandlerTemplate,
gcSmiHandlerSize
);