mirror of https://github.com/acidanthera/audk.git
UefiCpuPkg: Refine casting expression result to bigger size
There are cases that the operands of an expression are all with rank less than UINT64/INT64 and the result of the expression is explicitly cast to UINT64/INT64 to fit the target size. An example will be: UINT32 a,b; // a and b can be any unsigned int type with rank less than UINT64, like // UINT8, UINT16, etc. UINT64 c; c = (UINT64) (a + b); Some static code checkers may warn that the expression result might overflow within the rank of "int" (integer promotions) and the result is then cast to a bigger size. The commit refines codes by the following rules: 1). When the expression is possible to overflow the range of unsigned int/ int: c = (UINT64)a + b; 2). When the expression will not overflow within the rank of "int", remove the explicit type casts: c = a + b; 3). When the expression will be cast to pointer of possible greater size: UINT32 a,b; VOID *c; c = (VOID *)(UINTN)(a + b); --> c = (VOID *)((UINTN)a + b); 4). When one side of a comparison expression contains only operands with rank less than UINT32: UINT8 a; UINT16 b; UINTN c; if ((UINTN)(a + b) > c) {...} --> if (((UINT32)a + b) > c) {...} For rule 4), if we remove the 'UINTN' type cast like: if (a + b > c) {...} The VS compiler will complain with warning C4018 (signed/unsigned mismatch, level 3 warning) due to promoting 'a + b' to type 'int'. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com>
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3ee1680978
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8491e302e1
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@ -1,7 +1,7 @@
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/** @file
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/** @file
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Produces the CPU I/O 2 Protocol.
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Produces the CPU I/O 2 Protocol.
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Copyright (c) 2009 - 2012, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2009 - 2017, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
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Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
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This program and the accompanying materials
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This program and the accompanying materials
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@ -141,7 +141,7 @@ CpuIoCheckParameter (
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//
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//
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// Check to see if Address is aligned
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// Check to see if Address is aligned
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//
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//
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if ((Address & (UINT64)(mInStride[Width] - 1)) != 0) {
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if ((Address & ((UINT64)mInStride[Width] - 1)) != 0) {
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return EFI_UNSUPPORTED;
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return EFI_UNSUPPORTED;
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}
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}
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@ -1,7 +1,7 @@
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/** @file
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/** @file
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Produces the SMM CPU I/O Protocol.
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Produces the SMM CPU I/O Protocol.
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Copyright (c) 2009 - 2012, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2009 - 2017, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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which accompanies this distribution. The full text of the license may be found at
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@ -126,7 +126,7 @@ CpuIoCheckParameter (
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//
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//
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// Check to see if Address is aligned
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// Check to see if Address is aligned
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//
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//
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if ((Address & (UINT64)(mStride[Width] - 1)) != 0) {
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if ((Address & ((UINT64)mStride[Width] - 1)) != 0) {
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return EFI_UNSUPPORTED;
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return EFI_UNSUPPORTED;
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}
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}
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@ -1,7 +1,7 @@
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/** @file
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/** @file
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SMM STM support functions
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SMM STM support functions
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Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2015 - 2017, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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which accompanies this distribution. The full text of the license may be found at
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@ -276,8 +276,8 @@ SmmCpuFeaturesInstallSmiHandler (
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UINT32 RegEdx;
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UINT32 RegEdx;
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EFI_PROCESSOR_INFORMATION ProcessorInfo;
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EFI_PROCESSOR_INFORMATION ProcessorInfo;
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CopyMem ((VOID *)(UINTN)(SmBase + TXT_SMM_PSD_OFFSET), &gcStmPsd, sizeof (gcStmPsd));
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CopyMem ((VOID *)((UINTN)SmBase + TXT_SMM_PSD_OFFSET), &gcStmPsd, sizeof (gcStmPsd));
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Psd = (TXT_PROCESSOR_SMM_DESCRIPTOR *)(VOID *)(UINTN)(SmBase + TXT_SMM_PSD_OFFSET);
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Psd = (TXT_PROCESSOR_SMM_DESCRIPTOR *)(VOID *)((UINTN)SmBase + TXT_SMM_PSD_OFFSET);
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Psd->SmmGdtPtr = GdtBase;
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Psd->SmmGdtPtr = GdtBase;
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Psd->SmmGdtSize = (UINT32)GdtSize;
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Psd->SmmGdtSize = (UINT32)GdtSize;
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@ -317,7 +317,7 @@ SmmCpuFeaturesInstallSmiHandler (
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// Copy template to CPU specific SMI handler location
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// Copy template to CPU specific SMI handler location
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//
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//
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CopyMem (
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CopyMem (
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(VOID*)(UINTN)(SmBase + SMM_HANDLER_OFFSET),
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(VOID*)((UINTN)SmBase + SMM_HANDLER_OFFSET),
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(VOID*)gcStmSmiHandlerTemplate,
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(VOID*)gcStmSmiHandlerTemplate,
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gcStmSmiHandlerSize
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gcStmSmiHandlerSize
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);
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);
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@ -1,7 +1,7 @@
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/** @file
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/** @file
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Agent Module to load other modules to deploy SMM Entry Vector for X86 CPU.
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Agent Module to load other modules to deploy SMM Entry Vector for X86 CPU.
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Copyright (c) 2009 - 2016, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2009 - 2017, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
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Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
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This program and the accompanying materials
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This program and the accompanying materials
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@ -1282,7 +1282,7 @@ AllocateAlignedCodePages (
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Status = gSmst->SmmFreePages (Memory, UnalignedPages);
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Status = gSmst->SmmFreePages (Memory, UnalignedPages);
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ASSERT_EFI_ERROR (Status);
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ASSERT_EFI_ERROR (Status);
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}
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}
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Memory = (EFI_PHYSICAL_ADDRESS) (AlignedMemory + EFI_PAGES_TO_SIZE (Pages));
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Memory = AlignedMemory + EFI_PAGES_TO_SIZE (Pages);
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UnalignedPages = RealPages - Pages - UnalignedPages;
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UnalignedPages = RealPages - Pages - UnalignedPages;
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if (UnalignedPages > 0) {
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if (UnalignedPages > 0) {
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//
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//
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@ -1,7 +1,7 @@
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/** @file
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/** @file
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Provides services to access SMRAM Save State Map
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Provides services to access SMRAM Save State Map
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Copyright (c) 2010 - 2016, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2010 - 2017, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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which accompanies this distribution. The full text of the license may be found at
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@ -690,7 +690,7 @@ InstallSmiHandler (
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//
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//
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// Initialize PROCESSOR_SMM_DESCRIPTOR
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// Initialize PROCESSOR_SMM_DESCRIPTOR
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//
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//
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Psd = (PROCESSOR_SMM_DESCRIPTOR *)(VOID *)(UINTN)(SmBase + SMM_PSD_OFFSET);
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Psd = (PROCESSOR_SMM_DESCRIPTOR *)(VOID *)((UINTN)SmBase + SMM_PSD_OFFSET);
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CopyMem (Psd, &gcPsd, sizeof (gcPsd));
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CopyMem (Psd, &gcPsd, sizeof (gcPsd));
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Psd->SmmGdtPtr = (UINT64)GdtBase;
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Psd->SmmGdtPtr = (UINT64)GdtBase;
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Psd->SmmGdtSize = (UINT32)GdtSize;
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Psd->SmmGdtSize = (UINT32)GdtSize;
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@ -731,7 +731,7 @@ InstallSmiHandler (
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// Copy template to CPU specific SMI handler location
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// Copy template to CPU specific SMI handler location
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//
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//
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CopyMem (
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CopyMem (
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(VOID*)(UINTN)(SmBase + SMM_HANDLER_OFFSET),
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(VOID*)((UINTN)SmBase + SMM_HANDLER_OFFSET),
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(VOID*)gcSmiHandlerTemplate,
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(VOID*)gcSmiHandlerTemplate,
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gcSmiHandlerSize
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gcSmiHandlerSize
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);
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);
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