diff --git a/ArmPkg/Drivers/ArmGic/ArmGicLib.inf b/ArmPkg/Drivers/ArmGic/ArmGicLib.inf
index c79bcbad37..525f137b18 100644
--- a/ArmPkg/Drivers/ArmGic/ArmGicLib.inf
+++ b/ArmPkg/Drivers/ArmGic/ArmGicLib.inf
@@ -13,10 +13,6 @@
   VERSION_STRING                 = 1.0
   LIBRARY_CLASS                  = ArmGicLib
 
-[Sources]
-  GicV2/ArmGicV2Lib.c
-  GicV2/ArmGicV2NonSecLib.c
-
 [Sources.ARM]
   GicV3/Arm/ArmGicV3.S     | GCC
 
diff --git a/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Dxe.c b/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Dxe.c
index acd0564330..258869b2c7 100644
--- a/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Dxe.c
+++ b/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Dxe.c
@@ -22,6 +22,11 @@ Abstract:
 
 #define ARM_GIC_DEFAULT_PRIORITY  0x80
 
+// Interrupts from 1020 to 1023 are considered as special interrupts
+// (eg: spurious interrupts)
+#define ARM_GIC_IS_SPECIAL_INTERRUPTS(Interrupt) \
+          (((Interrupt) >= 1020) && ((Interrupt) <= 1023))
+
 extern EFI_HARDWARE_INTERRUPT_PROTOCOL   gHardwareInterruptV2Protocol;
 extern EFI_HARDWARE_INTERRUPT2_PROTOCOL  gHardwareInterrupt2V2Protocol;
 
@@ -181,6 +186,27 @@ GicV2GetInterruptSourceState (
   return EFI_SUCCESS;
 }
 
+STATIC
+UINTN
+ArmGicV2AcknowledgeInterrupt (
+  IN  UINTN  GicInterruptInterfaceBase
+  )
+{
+  // Read the Interrupt Acknowledge Register
+  return MmioRead32 (GicInterruptInterfaceBase + ARM_GIC_ICCIAR);
+}
+
+STATIC
+VOID
+ArmGicV2EndOfInterrupt (
+  IN  UINTN  GicInterruptInterfaceBase,
+  IN UINTN   Source
+  )
+{
+  ASSERT (Source <= MAX_UINT32);
+  MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCEIOR, (UINT32)Source);
+}
+
 /**
   Signal to the hardware that the End Of Interrupt state
   has been reached.
@@ -408,6 +434,30 @@ EFI_HARDWARE_INTERRUPT2_PROTOCOL  gHardwareInterrupt2V2Protocol = {
   GicV2SetTriggerType
 };
 
+STATIC
+VOID
+ArmGicV2EnableInterruptInterface (
+  IN  UINTN  GicInterruptInterfaceBase
+  )
+{
+  /*
+  * Enable the CPU interface in Non-Secure world
+  * Note: The ICCICR register is banked when Security extensions are implemented
+  */
+  MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCICR, 0x1);
+}
+
+STATIC
+VOID
+ArmGicV2DisableInterruptInterface (
+  IN  UINTN  GicInterruptInterfaceBase
+  )
+{
+  // Disable Gic Interface
+  MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCICR, 0x0);
+  MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCPMR, 0x0);
+}
+
 /**
   Shutdown our hardware
 
diff --git a/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Lib.c b/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Lib.c
deleted file mode 100644
index d21caa90e5..0000000000
--- a/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Lib.c
+++ /dev/null
@@ -1,32 +0,0 @@
-/** @file
-*
-*  Copyright (c) 2013-2023, ARM Limited. All rights reserved.
-*
-*  SPDX-License-Identifier: BSD-2-Clause-Patent
-*
-**/
-
-#include <Library/ArmGicLib.h>
-#include <Library/DebugLib.h>
-#include <Library/IoLib.h>
-
-UINTN
-EFIAPI
-ArmGicV2AcknowledgeInterrupt (
-  IN  UINTN  GicInterruptInterfaceBase
-  )
-{
-  // Read the Interrupt Acknowledge Register
-  return MmioRead32 (GicInterruptInterfaceBase + ARM_GIC_ICCIAR);
-}
-
-VOID
-EFIAPI
-ArmGicV2EndOfInterrupt (
-  IN  UINTN  GicInterruptInterfaceBase,
-  IN UINTN   Source
-  )
-{
-  ASSERT (Source <= MAX_UINT32);
-  MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCEIOR, (UINT32)Source);
-}
diff --git a/ArmPkg/Include/Library/ArmGicLib.h b/ArmPkg/Include/Library/ArmGicLib.h
index a0781361d9..df32f47d86 100644
--- a/ArmPkg/Include/Library/ArmGicLib.h
+++ b/ArmPkg/Include/Library/ArmGicLib.h
@@ -110,38 +110,6 @@
 // Bit Mask for
 #define ARM_GIC_ICCIAR_ACKINTID  0x3FF
 
-// GIC revision 2 specific declarations
-
-// Interrupts from 1020 to 1023 are considered as special interrupts
-// (eg: spurious interrupts)
-#define ARM_GIC_IS_SPECIAL_INTERRUPTS(Interrupt) \
-          (((Interrupt) >= 1020) && ((Interrupt) <= 1023))
-
-VOID
-EFIAPI
-ArmGicV2EnableInterruptInterface (
-  IN  UINTN  GicInterruptInterfaceBase
-  );
-
-VOID
-EFIAPI
-ArmGicV2DisableInterruptInterface (
-  IN  UINTN  GicInterruptInterfaceBase
-  );
-
-UINTN
-EFIAPI
-ArmGicV2AcknowledgeInterrupt (
-  IN  UINTN  GicInterruptInterfaceBase
-  );
-
-VOID
-EFIAPI
-ArmGicV2EndOfInterrupt (
-  IN UINTN  GicInterruptInterfaceBase,
-  IN UINTN  Source
-  );
-
 // GIC revision 3 specific declarations
 
 #define ICC_SRE_EL2_SRE  (1 << 0)