mirror of https://github.com/acidanthera/audk.git
MdePkg/DxeIoLibEsal: Add new Fifo routines in IoLib class
Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Brijesh Singh <brijesh.singh@amd.com> Signed-off-by: Leo Duran <leo.duran@amd.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
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@ -2,6 +2,8 @@
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I/O Library basic function implementation and worker functions.
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Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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@ -18,8 +20,10 @@
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Reads registers in the EFI CPU I/O space.
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Reads the I/O port specified by Port with registers width specified by Width.
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The read value is returned. If such operations are not supported, then ASSERT().
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The read value is returned.
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This function must guarantee that all I/O read and write operations are serialized.
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If such operations are not supported, then ASSERT().
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@param Port The base address of the I/O operation.
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The caller is responsible for aligning the Address if required.
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@ -60,8 +64,10 @@ IoReadWorker (
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Writes registers in the EFI CPU I/O space.
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Writes the I/O port specified by Port with registers width and value specified by Width
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and Data respectively. Data is returned. If such operations are not supported, then ASSERT().
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and Data respectively. Data is returned.
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This function must guarantee that all I/O read and write operations are serialized.
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If such operations are not supported, then ASSERT().
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@param Port The base address of the I/O operation.
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The caller is responsible for aligning the Address if required.
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@ -97,6 +103,90 @@ IoWriteWorker (
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return Data;
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}
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/**
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Reads registers in the EFI CPU I/O space.
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Reads the I/O port specified by Port with registers width specified by Width.
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The port is read Count times, and the read data is stored in the provided Buffer.
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This function must guarantee that all I/O read and write operations are serialized.
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If such operations are not supported, then ASSERT().
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@param Port The base address of the I/O operation.
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The caller is responsible for aligning the Address if required.
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@param Width The width of the I/O operation.
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@param Count The number of times to read I/O port.
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@param Buffer The buffer to store the read data into.
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**/
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VOID
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EFIAPI
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IoReadFifoWorker (
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IN UINTN Port,
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IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
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IN UINTN Count,
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IN VOID *Buffer
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)
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{
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SAL_RETURN_REGS ReturnReg;
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ReturnReg = EsalCall (
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EFI_EXTENDED_SAL_BASE_IO_SERVICES_PROTOCOL_GUID_LO,
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EFI_EXTENDED_SAL_BASE_IO_SERVICES_PROTOCOL_GUID_HI,
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IoReadFunctionId,
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(UINT64)Width,
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Port,
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Count,
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(UINT64)Buffer,
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0,
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0,
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0
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);
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ASSERT (ReturnReg.Status == EFI_SAL_SUCCESS);
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}
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/**
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Writes registers in the EFI CPU I/O space.
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Writes the I/O port specified by Port with registers width specified by Width.
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The port is written Count times, and the write data is retrieved from the provided Buffer.
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This function must guarantee that all I/O read and write operations are serialized.
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If such operations are not supported, then ASSERT().
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@param Port The base address of the I/O operation.
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The caller is responsible for aligning the Address if required.
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@param Width The width of the I/O operation.
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@param Count The number of times to write I/O port.
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@param Buffer The buffer to store the read data into.
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**/
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VOID
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EFIAPI
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IoWriteFifoWorker (
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IN UINTN Port,
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IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
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IN UINTN Count,
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IN VOID *Buffer
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)
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{
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SAL_RETURN_REGS ReturnReg;
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ReturnReg = EsalCall (
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EFI_EXTENDED_SAL_BASE_IO_SERVICES_PROTOCOL_GUID_LO,
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EFI_EXTENDED_SAL_BASE_IO_SERVICES_PROTOCOL_GUID_HI,
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IoWriteFunctionId,
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(UINT64)Width,
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Port,
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Count,
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(UINT64)Buffer,
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0,
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0,
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0
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);
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ASSERT (ReturnReg.Status == EFI_SAL_SUCCESS);
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}
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/**
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Reads memory-mapped registers in the EFI system memory space.
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@ -396,6 +486,190 @@ IoWrite64 (
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return IoWriteWorker (Port, EfiCpuIoWidthUint64, Value);
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}
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/**
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Reads an 8-bit I/O port fifo into a block of memory.
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Reads the 8-bit I/O fifo port specified by Port.
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The port is read Count times, and the read data is
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stored in the provided Buffer.
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This function must guarantee that all I/O read and write operations are
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serialized.
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If 8-bit I/O port operations are not supported, then ASSERT().
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@param Port The I/O port to read.
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@param Count The number of times to read I/O port.
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@param Buffer The buffer to store the read data into.
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**/
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VOID
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EFIAPI
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IoReadFifo8 (
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IN UINTN Port,
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IN UINTN Count,
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OUT VOID *Buffer
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)
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{
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IoReadFifoWorker (Port, EfiCpuIoWidthFifoUint8, Count, Buffer);
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}
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/**
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Writes a block of memory into an 8-bit I/O port fifo.
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Writes the 8-bit I/O fifo port specified by Port.
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The port is written Count times, and the write data is
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retrieved from the provided Buffer.
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This function must guarantee that all I/O write and write operations are
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serialized.
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If 8-bit I/O port operations are not supported, then ASSERT().
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@param Port The I/O port to write.
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@param Count The number of times to write I/O port.
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@param Buffer The buffer to retrieve the write data from.
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**/
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VOID
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EFIAPI
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IoWriteFifo8 (
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IN UINTN Port,
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IN UINTN Count,
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IN VOID *Buffer
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)
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{
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IoWriteFifoWorker (Port, EfiCpuIoWidthFifoUint8, Count, Buffer);
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}
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/**
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Reads a 16-bit I/O port fifo into a block of memory.
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Reads the 16-bit I/O fifo port specified by Port.
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The port is read Count times, and the read data is
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stored in the provided Buffer.
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This function must guarantee that all I/O read and write operations are
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serialized.
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If 16-bit I/O port operations are not supported, then ASSERT().
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@param Port The I/O port to read.
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@param Count The number of times to read I/O port.
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@param Buffer The buffer to store the read data into.
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**/
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VOID
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EFIAPI
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IoReadFifo16 (
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IN UINTN Port,
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IN UINTN Count,
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OUT VOID *Buffer
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)
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{
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//
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// Make sure Port is aligned on a 16-bit boundary.
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//
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ASSERT ((Port & 1) == 0);
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IoReadFifoWorker (Port, EfiCpuIoWidthFifoUint16, Count, Buffer);
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}
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/**
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Writes a block of memory into a 16-bit I/O port fifo.
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Writes the 16-bit I/O fifo port specified by Port.
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The port is written Count times, and the write data is
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retrieved from the provided Buffer.
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This function must guarantee that all I/O write and write operations are
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serialized.
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If 16-bit I/O port operations are not supported, then ASSERT().
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@param Port The I/O port to write.
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@param Count The number of times to write I/O port.
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@param Buffer The buffer to retrieve the write data from.
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**/
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VOID
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EFIAPI
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IoWriteFifo16 (
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IN UINTN Port,
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IN UINTN Count,
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IN VOID *Buffer
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)
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{
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//
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// Make sure Port is aligned on a 16-bit boundary.
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//
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ASSERT ((Port & 1) == 0);
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IoWriteFifoWorker (Port, EfiCpuIoWidthFifoUint16, Count, Buffer);
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}
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/**
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Reads a 32-bit I/O port fifo into a block of memory.
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Reads the 32-bit I/O fifo port specified by Port.
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The port is read Count times, and the read data is
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stored in the provided Buffer.
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This function must guarantee that all I/O read and write operations are
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serialized.
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If 32-bit I/O port operations are not supported, then ASSERT().
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@param Port The I/O port to read.
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@param Count The number of times to read I/O port.
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@param Buffer The buffer to store the read data into.
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**/
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VOID
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EFIAPI
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IoReadFifo32 (
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IN UINTN Port,
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IN UINTN Count,
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OUT VOID *Buffer
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)
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{
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//
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// Make sure Port is aligned on a 32-bit boundary.
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//
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ASSERT ((Port & 3) == 0);
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IoReadFifoWorker (Port, EfiCpuIoWidthFifoUint32, Count, Buffer);
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}
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/**
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Writes a block of memory into a 32-bit I/O port fifo.
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Writes the 32-bit I/O fifo port specified by Port.
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The port is written Count times, and the write data is
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retrieved from the provided Buffer.
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This function must guarantee that all I/O write and write operations are
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serialized.
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If 32-bit I/O port operations are not supported, then ASSERT().
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@param Port The I/O port to write.
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@param Count The number of times to write I/O port.
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@param Buffer The buffer to retrieve the write data from.
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**/
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VOID
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EFIAPI
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IoWriteFifo32 (
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IN UINTN Port,
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IN UINTN Count,
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IN VOID *Buffer
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)
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{
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//
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// Make sure Port is aligned on a 32-bit boundary.
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//
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ASSERT ((Port & 3) == 0);
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IoWriteFifoWorker (Port, EfiCpuIoWidthFifoUint32, Count, Buffer);
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}
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/**
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Reads an 8-bit MMIO register.
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