mirror of https://github.com/acidanthera/audk.git
OvmfPkg: prevent 64-bit MMIO BAR degradation if there is no CSM
According to edk2 commit "MdeModulePkg/PciBus: do not improperly degrade resource" and to the EFI_INCOMPATIBLE_PCI_DEVICE_SUPPORT_PROTOCOL definition in the Platform Init 1.4a specification, a platform can provide such a protocol in order to influence the PCI resource allocation performed by the PCI Bus driver. In particular it is possible instruct the PCI Bus driver, with a "wildcard" hint, to allocate the 64-bit MMIO BARs of a device in 64-bit address space, regardless of whether the device features an option ROM. (By default, the PCI Bus driver considers an option ROM reason enough for allocating the 64-bit MMIO BARs in 32-bit address space. It cannot know if BDS will launch a legacy boot option, and under legacy boot, a legacy BIOS binary from a combined option ROM could be dispatched, and fail to access MMIO BARs in 64-bit address space.) In platform code we can ascertain whether a CSM is present or not. If not, then legacy BIOS binaries in option ROMs can't be dispatched, hence the BAR degradation is detrimental, and we should prevent it. This is expected to conserve the 32-bit address space for 32-bit MMIO BARs. The driver added in this patch could be simplified based on the following facts: - In the Ia32 build, the 64-bit MMIO aperture is always zero-size, hence the driver will exit immediately. Therefore the driver could be omitted from the Ia32 build. - In the Ia32X64 and X64 builds, the driver could be omitted if CSM_ENABLE was defined (because in that case the degradation would be justified). On the other hand, if CSM_ENABLE was undefined, then the driver could be included, and it could provide the hint unconditionally (without looking for the Legacy BIOS protocol). These short-cuts are not taken because they would increase the differences between the OVMF DSC/FDF files. If we can manage without extreme complexity, we should use dynamic logic (vs. build time configuration), plus keep conditional compilation to a minimum. Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
This commit is contained in:
Laszlo Ersek
parent
d85c5e31ed
commit
855743f717
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/** @file
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A simple DXE_DRIVER that causes the PCI Bus UEFI_DRIVER to allocate 64-bit
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MMIO BARs above 4 GB, regardless of option ROM availability (as long as a CSM
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is not present), conserving 32-bit MMIO aperture for 32-bit BARs.
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Copyright (C) 2016, Red Hat, Inc.
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This program and the accompanying materials are licensed and made available
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under the terms and conditions of the BSD License which accompanies this
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distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, WITHOUT
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WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#include <IndustryStandard/Acpi10.h>
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#include <IndustryStandard/Pci22.h>
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#include <Library/DebugLib.h>
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#include <Library/MemoryAllocationLib.h>
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#include <Library/PcdLib.h>
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#include <Library/UefiBootServicesTableLib.h>
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#include <Protocol/IncompatiblePciDeviceSupport.h>
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#include <Protocol/LegacyBios.h>
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//
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// The Legacy BIOS protocol has been located.
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//
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STATIC BOOLEAN mLegacyBiosInstalled;
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//
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// The protocol interface this driver produces.
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//
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STATIC EFI_INCOMPATIBLE_PCI_DEVICE_SUPPORT_PROTOCOL
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mIncompatiblePciDeviceSupport;
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//
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// Configuration template for the CheckDevice() protocol member function.
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//
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// Refer to Table 20 "ACPI 2.0 & 3.0 QWORD Address Space Descriptor Usage" in
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// the Platform Init 1.4a Spec, Volume 5.
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//
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// This structure is interpreted by the UpdatePciInfo() function in the edk2
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// PCI Bus UEFI_DRIVER.
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//
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#pragma pack (1)
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typedef struct {
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EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR AddressSpaceDesc;
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EFI_ACPI_END_TAG_DESCRIPTOR EndDesc;
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} MMIO64_PREFERENCE;
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#pragma pack ()
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STATIC CONST MMIO64_PREFERENCE mConfiguration = {
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//
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// AddressSpaceDesc
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//
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{
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ACPI_ADDRESS_SPACE_DESCRIPTOR, // Desc
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(UINT16)( // Len
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sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) -
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OFFSET_OF (
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EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR,
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ResType
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)
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),
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ACPI_ADDRESS_SPACE_TYPE_MEM, // ResType
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PCI_ACPI_UNUSED, // GenFlag
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PCI_ACPI_UNUSED, // SpecificFlag
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64, // AddrSpaceGranularity:
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// aperture selection hint
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// for BAR allocation
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PCI_ACPI_UNUSED, // AddrRangeMin
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PCI_BAR_OLD_ALIGN, // AddrRangeMax:
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// no special alignment
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// for affected BARs
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PCI_BAR_ALL, // AddrTranslationOffset:
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// hint covers all
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// eligible BARs
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PCI_BAR_NOCHANGE // AddrLen:
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// use probed BAR size
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},
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//
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// EndDesc
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//
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{
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ACPI_END_TAG_DESCRIPTOR, // Desc
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0 // Checksum: to be ignored
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}
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};
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//
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// The CheckDevice() member function has been called.
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//
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STATIC BOOLEAN mCheckDeviceCalled;
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/**
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Notification callback for Legacy BIOS protocol installation.
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@param[in] Event Event whose notification function is being invoked.
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@param[in] Context The pointer to the notification function's context, which
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is implementation-dependent.
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**/
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STATIC
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VOID
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EFIAPI
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LegacyBiosInstalled (
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IN EFI_EVENT Event,
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IN VOID *Context
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)
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{
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EFI_STATUS Status;
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EFI_LEGACY_BIOS_PROTOCOL *LegacyBios;
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ASSERT (!mCheckDeviceCalled);
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Status = gBS->LocateProtocol (&gEfiLegacyBiosProtocolGuid,
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NULL /* Registration */, (VOID **)&LegacyBios);
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if (EFI_ERROR (Status)) {
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return;
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}
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mLegacyBiosInstalled = TRUE;
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//
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// Close the event and deregister this callback.
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//
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Status = gBS->CloseEvent (Event);
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ASSERT_EFI_ERROR (Status);
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}
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/**
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Returns a list of ACPI resource descriptors that detail the special resource
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configuration requirements for an incompatible PCI device.
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Prior to bus enumeration, the PCI bus driver will look for the presence of
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the EFI_INCOMPATIBLE_PCI_DEVICE_SUPPORT_PROTOCOL. Only one instance of this
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protocol can be present in the system. For each PCI device that the PCI bus
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driver discovers, the PCI bus driver calls this function with the device's
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vendor ID, device ID, revision ID, subsystem vendor ID, and subsystem device
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ID. If the VendorId, DeviceId, RevisionId, SubsystemVendorId, or
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SubsystemDeviceId value is set to (UINTN)-1, that field will be ignored. The
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ID values that are not (UINTN)-1 will be used to identify the current device.
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This function will only return EFI_SUCCESS. However, if the device is an
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incompatible PCI device, a list of ACPI resource descriptors will be returned
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in Configuration. Otherwise, NULL will be returned in Configuration instead.
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The PCI bus driver does not need to allocate memory for Configuration.
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However, it is the PCI bus driver's responsibility to free it. The PCI bus
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driver then can configure this device with the information that is derived
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from this list of resource nodes, rather than the result of BAR probing.
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Only the following two resource descriptor types from the ACPI Specification
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may be used to describe the incompatible PCI device resource requirements:
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- QWORD Address Space Descriptor (ACPI 2.0, section 6.4.3.5.1; also ACPI 3.0)
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- End Tag (ACPI 2.0, section 6.4.2.8; also ACPI 3.0)
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The QWORD Address Space Descriptor can describe memory, I/O, and bus number
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ranges for dynamic or fixed resources. The configuration of a PCI root bridge
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is described with one or more QWORD Address Space Descriptors, followed by an
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End Tag. See the ACPI Specification for details on the field values.
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@param[in] This Pointer to the
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EFI_INCOMPATIBLE_PCI_DEVICE_SUPPORT_PROTOCOL
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instance.
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@param[in] VendorId A unique ID to identify the manufacturer of
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the PCI device. See the Conventional PCI
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Specification 3.0 for details.
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@param[in] DeviceId A unique ID to identify the particular PCI
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device. See the Conventional PCI
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Specification 3.0 for details.
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@param[in] RevisionId A PCI device-specific revision identifier.
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See the Conventional PCI Specification 3.0
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for details.
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@param[in] SubsystemVendorId Specifies the subsystem vendor ID. See the
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Conventional PCI Specification 3.0 for
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details.
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@param[in] SubsystemDeviceId Specifies the subsystem device ID. See the
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Conventional PCI Specification 3.0 for
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details.
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@param[out] Configuration A list of ACPI resource descriptors that
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detail the configuration requirement.
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@retval EFI_SUCCESS The function always returns EFI_SUCCESS.
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**/
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STATIC
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EFI_STATUS
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EFIAPI
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CheckDevice (
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IN EFI_INCOMPATIBLE_PCI_DEVICE_SUPPORT_PROTOCOL *This,
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IN UINTN VendorId,
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IN UINTN DeviceId,
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IN UINTN RevisionId,
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IN UINTN SubsystemVendorId,
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IN UINTN SubsystemDeviceId,
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OUT VOID **Configuration
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)
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{
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mCheckDeviceCalled = TRUE;
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//
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// Unlike the general description of this protocol member suggests, there is
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// nothing incompatible about the PCI devices that we'll match here. We'll
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// match all PCI devices, and generate exactly one QWORD Address Space
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// Descriptor for each. That descriptor will instruct the PCI Bus UEFI_DRIVER
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// not to degrade 64-bit MMIO BARs for the device, even if a PCI option ROM
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// BAR is present on the device.
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//
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// The concern captured in the PCI Bus UEFI_DRIVER is that a legacy BIOS boot
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// (via a CSM) could dispatch a legacy option ROM on the device, which might
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// have trouble with MMIO BARs that have been allocated outside of the 32-bit
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// address space. But, if we don't support legacy option ROMs at all, then
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// this problem cannot arise.
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//
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if (mLegacyBiosInstalled) {
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//
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// Don't interfere with resource degradation.
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//
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*Configuration = NULL;
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return EFI_SUCCESS;
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}
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//
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// This member function is mis-specified actually: it is supposed to allocate
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// memory, but as specified, it could not return an error status. Thankfully,
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// the edk2 PCI Bus UEFI_DRIVER actually handles error codes; see the
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// UpdatePciInfo() function.
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//
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*Configuration = AllocateCopyPool (sizeof mConfiguration, &mConfiguration);
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if (*Configuration == NULL) {
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DEBUG ((EFI_D_WARN,
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"%a: 64-bit MMIO BARs may be degraded for PCI 0x%04x:0x%04x (rev %d)\n",
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__FUNCTION__, (UINT32)VendorId, (UINT32)DeviceId, (UINT8)RevisionId));
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return EFI_OUT_OF_RESOURCES;
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}
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return EFI_SUCCESS;
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}
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/**
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Entry point for this driver.
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@param[in] ImageHandle Image handle of this driver.
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@param[in] SystemTable Pointer to SystemTable.
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@retval EFI_SUCESS Driver has loaded successfully.
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@retval EFI_UNSUPPORTED PCI resource allocation has been disabled.
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@retval EFI_UNSUPPORTED There is no 64-bit PCI MMIO aperture.
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@return Error codes from lower level functions.
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**/
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EFI_STATUS
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EFIAPI
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DriverInitialize (
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IN EFI_HANDLE ImageHandle,
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IN EFI_SYSTEM_TABLE *SystemTable
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)
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{
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EFI_STATUS Status;
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EFI_EVENT Event;
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VOID *Registration;
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//
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// If the PCI Bus driver is not supposed to allocate resources, then it makes
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// no sense to install a protocol that influences the resource allocation.
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//
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// Similarly, if there is no 64-bit PCI MMIO aperture, then 64-bit MMIO BARs
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// have to be allocated under 4 GB unconditionally.
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//
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if (PcdGetBool (PcdPciDisableBusEnumeration) ||
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PcdGet64 (PcdPciMmio64Size) == 0) {
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return EFI_UNSUPPORTED;
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}
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//
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// Otherwise, create a protocol notify to see if a CSM is present. (With the
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// CSM absent, the PCI Bus driver won't have to worry about allocating 64-bit
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// MMIO BARs in the 32-bit MMIO aperture, for the sake of a legacy BIOS.)
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//
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// If the Legacy BIOS Protocol is present at the time of this driver starting
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// up, we can mark immediately that the PCI Bus driver should perform the
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// usual 64-bit MMIO BAR degradation.
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//
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// Otherwise, if the Legacy BIOS Protocol is absent at startup, it may be
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// installed later. However, if it doesn't show up until the first
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// EFI_INCOMPATIBLE_PCI_DEVICE_SUPPORT_PROTOCOL.CheckDevice() call from the
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// PCI Bus driver, then it never will:
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//
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// 1. The following drivers are dispatched in some unspecified order:
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// - PCI Host Bridge DXE_DRIVER,
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// - PCI Bus UEFI_DRIVER,
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// - this DXE_DRIVER,
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// - Legacy BIOS DXE_DRIVER.
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//
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// 2. The DXE_CORE enters BDS.
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//
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// 3. The platform BDS connects the PCI Root Bridge IO instances (produced by
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// the PCI Host Bridge DXE_DRIVER).
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//
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// 4. The PCI Bus UEFI_DRIVER enumerates resources and calls into this
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// DXE_DRIVER (CheckDevice()).
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//
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// 5. This driver remembers if EFI_LEGACY_BIOS_PROTOCOL has been installed
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// sometime during step 1 (produced by the Legacy BIOS DXE_DRIVER).
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//
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// For breaking this order, the Legacy BIOS DXE_DRIVER would have to install
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// its protocol after the firmware enters BDS, which cannot happen.
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//
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Status = gBS->CreateEvent (EVT_NOTIFY_SIGNAL, TPL_CALLBACK,
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LegacyBiosInstalled, NULL /* Context */, &Event);
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if (EFI_ERROR (Status)) {
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return Status;
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}
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|
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Status = gBS->RegisterProtocolNotify (&gEfiLegacyBiosProtocolGuid, Event,
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&Registration);
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if (EFI_ERROR (Status)) {
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goto CloseEvent;
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}
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Status = gBS->SignalEvent (Event);
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ASSERT_EFI_ERROR (Status);
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mIncompatiblePciDeviceSupport.CheckDevice = CheckDevice;
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Status = gBS->InstallMultipleProtocolInterfaces (&ImageHandle,
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&gEfiIncompatiblePciDeviceSupportProtocolGuid,
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&mIncompatiblePciDeviceSupport, NULL);
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if (EFI_ERROR (Status)) {
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goto CloseEvent;
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}
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|
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return EFI_SUCCESS;
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CloseEvent:
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if (!mLegacyBiosInstalled) {
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EFI_STATUS CloseStatus;
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|
|
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CloseStatus = gBS->CloseEvent (Event);
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ASSERT_EFI_ERROR (CloseStatus);
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}
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||||||
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return Status;
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||||||
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}
|
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|
@ -0,0 +1,50 @@
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## @file
|
||||||
|
# A simple DXE_DRIVER that causes the PCI Bus UEFI_DRIVER to allocate 64-bit
|
||||||
|
# MMIO BARs above 4 GB, regardless of option ROM availability (as long as a CSM
|
||||||
|
# is not present), conserving 32-bit MMIO aperture for 32-bit BARs.
|
||||||
|
#
|
||||||
|
# Copyright (C) 2016, Red Hat, Inc.
|
||||||
|
#
|
||||||
|
# This program and the accompanying materials are licensed and made available
|
||||||
|
# under the terms and conditions of the BSD License which accompanies this
|
||||||
|
# distribution. The full text of the license may be found at
|
||||||
|
# http://opensource.org/licenses/bsd-license.php
|
||||||
|
#
|
||||||
|
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, WITHOUT
|
||||||
|
# WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||||
|
##
|
||||||
|
|
||||||
|
[Defines]
|
||||||
|
INF_VERSION = 0x00010005
|
||||||
|
BASE_NAME = IncompatiblePciDeviceSupportDxe
|
||||||
|
FILE_GUID = F6697AC4-A776-4EE1-B643-1FEFF2B615BB
|
||||||
|
MODULE_TYPE = DXE_DRIVER
|
||||||
|
VERSION_STRING = 1.0
|
||||||
|
ENTRY_POINT = DriverInitialize
|
||||||
|
|
||||||
|
[Sources]
|
||||||
|
IncompatiblePciDeviceSupport.c
|
||||||
|
|
||||||
|
[Packages]
|
||||||
|
IntelFrameworkPkg/IntelFrameworkPkg.dec
|
||||||
|
MdeModulePkg/MdeModulePkg.dec
|
||||||
|
MdePkg/MdePkg.dec
|
||||||
|
OvmfPkg/OvmfPkg.dec
|
||||||
|
|
||||||
|
[LibraryClasses]
|
||||||
|
DebugLib
|
||||||
|
MemoryAllocationLib
|
||||||
|
PcdLib
|
||||||
|
UefiBootServicesTableLib
|
||||||
|
UefiDriverEntryPoint
|
||||||
|
|
||||||
|
[Protocols]
|
||||||
|
gEfiIncompatiblePciDeviceSupportProtocolGuid ## SOMETIMES_PRODUCES
|
||||||
|
gEfiLegacyBiosProtocolGuid ## NOTIFY
|
||||||
|
|
||||||
|
[Pcd]
|
||||||
|
gEfiMdeModulePkgTokenSpaceGuid.PcdPciDisableBusEnumeration ## CONSUMES
|
||||||
|
gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio64Size ## CONSUMES
|
||||||
|
|
||||||
|
[Depex]
|
||||||
|
TRUE
|
||||||
|
|
@ -548,6 +548,7 @@
|
||||||
UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
|
UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
|
||||||
UefiCpuPkg/CpuDxe/CpuDxe.inf
|
UefiCpuPkg/CpuDxe/CpuDxe.inf
|
||||||
PcAtChipsetPkg/8254TimerDxe/8254Timer.inf
|
PcAtChipsetPkg/8254TimerDxe/8254Timer.inf
|
||||||
|
OvmfPkg/IncompatiblePciDeviceSupportDxe/IncompatiblePciDeviceSupport.inf
|
||||||
MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf {
|
MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf {
|
||||||
<LibraryClasses>
|
<LibraryClasses>
|
||||||
PciHostBridgeLib|OvmfPkg/Library/PciHostBridgeLib/PciHostBridgeLib.inf
|
PciHostBridgeLib|OvmfPkg/Library/PciHostBridgeLib/PciHostBridgeLib.inf
|
||||||
|
|
|
||||||
|
|
@ -207,6 +207,7 @@ INF PcAtChipsetPkg/8259InterruptControllerDxe/8259.inf
|
||||||
INF UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
|
INF UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
|
||||||
INF UefiCpuPkg/CpuDxe/CpuDxe.inf
|
INF UefiCpuPkg/CpuDxe/CpuDxe.inf
|
||||||
INF PcAtChipsetPkg/8254TimerDxe/8254Timer.inf
|
INF PcAtChipsetPkg/8254TimerDxe/8254Timer.inf
|
||||||
|
INF OvmfPkg/IncompatiblePciDeviceSupportDxe/IncompatiblePciDeviceSupport.inf
|
||||||
INF MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf
|
INF MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf
|
||||||
INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
|
INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
|
||||||
INF PcAtChipsetPkg/KbcResetDxe/Reset.inf
|
INF PcAtChipsetPkg/KbcResetDxe/Reset.inf
|
||||||
|
|
|
||||||
|
|
@ -557,6 +557,7 @@
|
||||||
UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
|
UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
|
||||||
UefiCpuPkg/CpuDxe/CpuDxe.inf
|
UefiCpuPkg/CpuDxe/CpuDxe.inf
|
||||||
PcAtChipsetPkg/8254TimerDxe/8254Timer.inf
|
PcAtChipsetPkg/8254TimerDxe/8254Timer.inf
|
||||||
|
OvmfPkg/IncompatiblePciDeviceSupportDxe/IncompatiblePciDeviceSupport.inf
|
||||||
MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf {
|
MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf {
|
||||||
<LibraryClasses>
|
<LibraryClasses>
|
||||||
PciHostBridgeLib|OvmfPkg/Library/PciHostBridgeLib/PciHostBridgeLib.inf
|
PciHostBridgeLib|OvmfPkg/Library/PciHostBridgeLib/PciHostBridgeLib.inf
|
||||||
|
|
|
||||||
|
|
@ -207,6 +207,7 @@ INF PcAtChipsetPkg/8259InterruptControllerDxe/8259.inf
|
||||||
INF UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
|
INF UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
|
||||||
INF UefiCpuPkg/CpuDxe/CpuDxe.inf
|
INF UefiCpuPkg/CpuDxe/CpuDxe.inf
|
||||||
INF PcAtChipsetPkg/8254TimerDxe/8254Timer.inf
|
INF PcAtChipsetPkg/8254TimerDxe/8254Timer.inf
|
||||||
|
INF OvmfPkg/IncompatiblePciDeviceSupportDxe/IncompatiblePciDeviceSupport.inf
|
||||||
INF MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf
|
INF MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf
|
||||||
INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
|
INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
|
||||||
INF PcAtChipsetPkg/KbcResetDxe/Reset.inf
|
INF PcAtChipsetPkg/KbcResetDxe/Reset.inf
|
||||||
|
|
|
||||||
|
|
@ -555,6 +555,7 @@
|
||||||
UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
|
UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
|
||||||
UefiCpuPkg/CpuDxe/CpuDxe.inf
|
UefiCpuPkg/CpuDxe/CpuDxe.inf
|
||||||
PcAtChipsetPkg/8254TimerDxe/8254Timer.inf
|
PcAtChipsetPkg/8254TimerDxe/8254Timer.inf
|
||||||
|
OvmfPkg/IncompatiblePciDeviceSupportDxe/IncompatiblePciDeviceSupport.inf
|
||||||
MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf {
|
MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf {
|
||||||
<LibraryClasses>
|
<LibraryClasses>
|
||||||
PciHostBridgeLib|OvmfPkg/Library/PciHostBridgeLib/PciHostBridgeLib.inf
|
PciHostBridgeLib|OvmfPkg/Library/PciHostBridgeLib/PciHostBridgeLib.inf
|
||||||
|
|
|
||||||
|
|
@ -207,6 +207,7 @@ INF PcAtChipsetPkg/8259InterruptControllerDxe/8259.inf
|
||||||
INF UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
|
INF UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
|
||||||
INF UefiCpuPkg/CpuDxe/CpuDxe.inf
|
INF UefiCpuPkg/CpuDxe/CpuDxe.inf
|
||||||
INF PcAtChipsetPkg/8254TimerDxe/8254Timer.inf
|
INF PcAtChipsetPkg/8254TimerDxe/8254Timer.inf
|
||||||
|
INF OvmfPkg/IncompatiblePciDeviceSupportDxe/IncompatiblePciDeviceSupport.inf
|
||||||
INF MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf
|
INF MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf
|
||||||
INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
|
INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
|
||||||
INF PcAtChipsetPkg/KbcResetDxe/Reset.inf
|
INF PcAtChipsetPkg/KbcResetDxe/Reset.inf
|
||||||
|
|
|
||||||
Loading…
Reference in New Issue