mirror of https://github.com/acidanthera/audk.git
UefiCpuPkg/MtrrLib: Adjust functions order
Only adjust functions order and there is no any real functionality impact. Cc: Feng Tian <feng.tian@intel.com> Cc: Michael Kinney <michael.d.kinney@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Kinney <michael.d.kinney@intel.com> Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19154 6f19259b-4bc3-4df7-8a09-765794883524
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@ -311,6 +311,103 @@ PostMtrrChange (
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PostMtrrChangeEnableCache (MtrrContext);
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}
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/**
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Worker function gets the content in fixed MTRRs
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@param[out] FixedSettings A buffer to hold fixed MTRRs content.
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@retval The pointer of FixedSettings
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**/
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MTRR_FIXED_SETTINGS*
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MtrrGetFixedMtrrWorker (
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OUT MTRR_FIXED_SETTINGS *FixedSettings
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)
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{
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UINT32 Index;
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for (Index = 0; Index < MTRR_NUMBER_OF_FIXED_MTRR; Index++) {
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FixedSettings->Mtrr[Index] =
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AsmReadMsr64 (mMtrrLibFixedMtrrTable[Index].Msr);
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}
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return FixedSettings;
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}
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/**
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This function gets the content in fixed MTRRs
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@param[out] FixedSettings A buffer to hold fixed MTRRs content.
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@retval The pointer of FixedSettings
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**/
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MTRR_FIXED_SETTINGS*
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EFIAPI
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MtrrGetFixedMtrr (
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OUT MTRR_FIXED_SETTINGS *FixedSettings
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)
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{
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if (!IsMtrrSupported ()) {
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return FixedSettings;
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}
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return MtrrGetFixedMtrrWorker (FixedSettings);
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}
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/**
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Worker function will get the raw value in variable MTRRs
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@param[out] VariableSettings A buffer to hold variable MTRRs content.
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@return The VariableSettings input pointer
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**/
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MTRR_VARIABLE_SETTINGS*
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MtrrGetVariableMtrrWorker (
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OUT MTRR_VARIABLE_SETTINGS *VariableSettings
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)
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{
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UINT32 Index;
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UINT32 VariableMtrrCount;
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VariableMtrrCount = GetVariableMtrrCount ();
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ASSERT (VariableMtrrCount <= MTRR_NUMBER_OF_VARIABLE_MTRR);
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for (Index = 0; Index < VariableMtrrCount; Index++) {
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VariableSettings->Mtrr[Index].Base =
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AsmReadMsr64 (MTRR_LIB_IA32_VARIABLE_MTRR_BASE + (Index << 1));
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VariableSettings->Mtrr[Index].Mask =
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AsmReadMsr64 (MTRR_LIB_IA32_VARIABLE_MTRR_BASE + (Index << 1) + 1);
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}
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return VariableSettings;
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}
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/**
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This function will get the raw value in variable MTRRs
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@param[out] VariableSettings A buffer to hold variable MTRRs content.
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@return The VariableSettings input pointer
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**/
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MTRR_VARIABLE_SETTINGS*
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EFIAPI
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MtrrGetVariableMtrr (
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OUT MTRR_VARIABLE_SETTINGS *VariableSettings
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)
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{
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if (!IsMtrrSupported ()) {
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return VariableSettings;
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}
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return MtrrGetVariableMtrrWorker (
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VariableSettings
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);
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}
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/**
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Programs fixed MTRRs registers.
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@ -965,6 +1062,248 @@ MtrrPrecedence (
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}
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/**
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This function will get the memory cache type of the specific address.
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This function is mainly for debug purpose.
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@param[in] Address The specific address
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@return Memory cache type of the specific address
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**/
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MTRR_MEMORY_CACHE_TYPE
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EFIAPI
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MtrrGetMemoryAttribute (
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IN PHYSICAL_ADDRESS Address
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)
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{
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UINT64 TempQword;
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UINTN Index;
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UINTN SubIndex;
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UINT64 MtrrType;
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UINT64 TempMtrrType;
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MTRR_MEMORY_CACHE_TYPE CacheType;
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VARIABLE_MTRR VariableMtrr[MTRR_NUMBER_OF_VARIABLE_MTRR];
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UINT64 MtrrValidBitsMask;
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UINT64 MtrrValidAddressMask;
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UINTN VariableMtrrCount;
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if (!IsMtrrSupported ()) {
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return CacheUncacheable;
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}
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//
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// Check if MTRR is enabled, if not, return UC as attribute
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//
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TempQword = AsmReadMsr64 (MTRR_LIB_IA32_MTRR_DEF_TYPE);
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MtrrType = MTRR_CACHE_INVALID_TYPE;
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if ((TempQword & MTRR_LIB_CACHE_MTRR_ENABLED) == 0) {
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return CacheUncacheable;
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}
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//
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// If address is less than 1M, then try to go through the fixed MTRR
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//
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if (Address < BASE_1MB) {
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if ((TempQword & MTRR_LIB_CACHE_FIXED_MTRR_ENABLED) != 0) {
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//
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// Go through the fixed MTRR
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//
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for (Index = 0; Index < MTRR_NUMBER_OF_FIXED_MTRR; Index++) {
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if (Address >= mMtrrLibFixedMtrrTable[Index].BaseAddress &&
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Address < (
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mMtrrLibFixedMtrrTable[Index].BaseAddress +
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(mMtrrLibFixedMtrrTable[Index].Length * 8)
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)
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) {
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SubIndex =
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((UINTN)Address - mMtrrLibFixedMtrrTable[Index].BaseAddress) /
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mMtrrLibFixedMtrrTable[Index].Length;
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TempQword = AsmReadMsr64 (mMtrrLibFixedMtrrTable[Index].Msr);
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MtrrType = RShiftU64 (TempQword, SubIndex * 8) & 0xFF;
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return GetMemoryCacheTypeFromMtrrType (MtrrType);
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}
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}
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}
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}
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MtrrLibInitializeMtrrMask(&MtrrValidBitsMask, &MtrrValidAddressMask);
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MtrrGetMemoryAttributeInVariableMtrr(
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MtrrValidBitsMask,
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MtrrValidAddressMask,
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VariableMtrr
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);
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//
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// Go through the variable MTRR
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//
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VariableMtrrCount = GetVariableMtrrCount ();
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ASSERT (VariableMtrrCount <= MTRR_NUMBER_OF_VARIABLE_MTRR);
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for (Index = 0; Index < VariableMtrrCount; Index++) {
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if (VariableMtrr[Index].Valid) {
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if (Address >= VariableMtrr[Index].BaseAddress &&
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Address < VariableMtrr[Index].BaseAddress+VariableMtrr[Index].Length) {
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TempMtrrType = VariableMtrr[Index].Type;
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MtrrType = MtrrPrecedence (MtrrType, TempMtrrType);
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}
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}
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}
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CacheType = GetMemoryCacheTypeFromMtrrType (MtrrType);
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return CacheType;
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}
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/**
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This function prints all MTRRs for debugging.
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**/
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VOID
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EFIAPI
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MtrrDebugPrintAllMtrrs (
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VOID
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)
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{
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DEBUG_CODE (
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MTRR_SETTINGS MtrrSettings;
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UINTN Index;
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UINTN Index1;
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UINTN VariableMtrrCount;
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UINT64 Base;
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UINT64 Limit;
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UINT64 MtrrBase;
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UINT64 MtrrLimit;
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UINT64 RangeBase;
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UINT64 RangeLimit;
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UINT64 NoRangeBase;
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UINT64 NoRangeLimit;
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UINT32 RegEax;
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UINTN MemoryType;
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UINTN PreviousMemoryType;
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BOOLEAN Found;
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if (!IsMtrrSupported ()) {
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return;
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}
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DEBUG((DEBUG_CACHE, "MTRR Settings\n"));
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DEBUG((DEBUG_CACHE, "=============\n"));
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MtrrGetAllMtrrs (&MtrrSettings);
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DEBUG((DEBUG_CACHE, "MTRR Default Type: %016lx\n", MtrrSettings.MtrrDefType));
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for (Index = 0; Index < MTRR_NUMBER_OF_FIXED_MTRR; Index++) {
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DEBUG((DEBUG_CACHE, "Fixed MTRR[%02d] : %016lx\n", Index, MtrrSettings.Fixed.Mtrr[Index]));
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}
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VariableMtrrCount = GetVariableMtrrCount ();
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for (Index = 0; Index < VariableMtrrCount; Index++) {
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DEBUG((DEBUG_CACHE, "Variable MTRR[%02d]: Base=%016lx Mask=%016lx\n",
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Index,
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MtrrSettings.Variables.Mtrr[Index].Base,
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MtrrSettings.Variables.Mtrr[Index].Mask
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));
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}
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DEBUG((DEBUG_CACHE, "\n"));
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DEBUG((DEBUG_CACHE, "MTRR Ranges\n"));
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DEBUG((DEBUG_CACHE, "====================================\n"));
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Base = 0;
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PreviousMemoryType = MTRR_CACHE_INVALID_TYPE;
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for (Index = 0; Index < MTRR_NUMBER_OF_FIXED_MTRR; Index++) {
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Base = mMtrrLibFixedMtrrTable[Index].BaseAddress;
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for (Index1 = 0; Index1 < 8; Index1++) {
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MemoryType = (UINTN)(RShiftU64 (MtrrSettings.Fixed.Mtrr[Index], Index1 * 8) & 0xff);
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if (MemoryType > CacheWriteBack) {
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MemoryType = MTRR_CACHE_INVALID_TYPE;
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}
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if (MemoryType != PreviousMemoryType) {
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if (PreviousMemoryType != MTRR_CACHE_INVALID_TYPE) {
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DEBUG((DEBUG_CACHE, "%016lx\n", Base - 1));
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}
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PreviousMemoryType = MemoryType;
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DEBUG((DEBUG_CACHE, "%a:%016lx-", mMtrrMemoryCacheTypeShortName[MemoryType], Base));
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}
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Base += mMtrrLibFixedMtrrTable[Index].Length;
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}
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}
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DEBUG((DEBUG_CACHE, "%016lx\n", Base - 1));
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VariableMtrrCount = GetVariableMtrrCount ();
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Limit = BIT36 - 1;
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AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);
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if (RegEax >= 0x80000008) {
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AsmCpuid (0x80000008, &RegEax, NULL, NULL, NULL);
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Limit = LShiftU64 (1, RegEax & 0xff) - 1;
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}
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Base = BASE_1MB;
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PreviousMemoryType = MTRR_CACHE_INVALID_TYPE;
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do {
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MemoryType = MtrrGetMemoryAttribute (Base);
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if (MemoryType > CacheWriteBack) {
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MemoryType = MTRR_CACHE_INVALID_TYPE;
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}
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if (MemoryType != PreviousMemoryType) {
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if (PreviousMemoryType != MTRR_CACHE_INVALID_TYPE) {
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DEBUG((DEBUG_CACHE, "%016lx\n", Base - 1));
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}
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PreviousMemoryType = MemoryType;
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DEBUG((DEBUG_CACHE, "%a:%016lx-", mMtrrMemoryCacheTypeShortName[MemoryType], Base));
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}
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RangeBase = BASE_1MB;
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NoRangeBase = BASE_1MB;
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RangeLimit = Limit;
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NoRangeLimit = Limit;
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for (Index = 0, Found = FALSE; Index < VariableMtrrCount; Index++) {
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if ((MtrrSettings.Variables.Mtrr[Index].Mask & BIT11) == 0) {
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//
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// If mask is not valid, then do not display range
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//
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continue;
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}
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MtrrBase = (MtrrSettings.Variables.Mtrr[Index].Base & (~(SIZE_4KB - 1)));
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MtrrLimit = MtrrBase + ((~(MtrrSettings.Variables.Mtrr[Index].Mask & (~(SIZE_4KB - 1)))) & Limit);
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if (Base >= MtrrBase && Base < MtrrLimit) {
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Found = TRUE;
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}
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if (Base >= MtrrBase && MtrrBase > RangeBase) {
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RangeBase = MtrrBase;
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}
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if (Base > MtrrLimit && MtrrLimit > RangeBase) {
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RangeBase = MtrrLimit + 1;
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}
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if (Base < MtrrBase && MtrrBase < RangeLimit) {
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RangeLimit = MtrrBase - 1;
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}
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if (Base < MtrrLimit && MtrrLimit <= RangeLimit) {
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RangeLimit = MtrrLimit;
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}
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if (Base > MtrrLimit && NoRangeBase < MtrrLimit) {
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NoRangeBase = MtrrLimit + 1;
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}
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if (Base < MtrrBase && NoRangeLimit > MtrrBase) {
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NoRangeLimit = MtrrBase - 1;
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}
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}
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if (Found) {
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Base = RangeLimit + 1;
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} else {
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Base = NoRangeLimit + 1;
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}
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} while (Base < Limit);
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DEBUG((DEBUG_CACHE, "%016lx\n\n", Base - 1));
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);
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}
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/**
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This function attempts to set the attributes for a memory range.
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@ -1236,155 +1575,6 @@ Done:
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return Status;
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}
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/**
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This function will get the memory cache type of the specific address.
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This function is mainly for debug purpose.
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@param[in] Address The specific address
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@return Memory cache type of the specific address
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**/
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MTRR_MEMORY_CACHE_TYPE
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EFIAPI
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MtrrGetMemoryAttribute (
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IN PHYSICAL_ADDRESS Address
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)
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{
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UINT64 TempQword;
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UINTN Index;
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UINTN SubIndex;
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UINT64 MtrrType;
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UINT64 TempMtrrType;
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MTRR_MEMORY_CACHE_TYPE CacheType;
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VARIABLE_MTRR VariableMtrr[MTRR_NUMBER_OF_VARIABLE_MTRR];
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UINT64 MtrrValidBitsMask;
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UINT64 MtrrValidAddressMask;
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UINTN VariableMtrrCount;
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if (!IsMtrrSupported ()) {
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return CacheUncacheable;
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}
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//
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// Check if MTRR is enabled, if not, return UC as attribute
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//
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TempQword = AsmReadMsr64 (MTRR_LIB_IA32_MTRR_DEF_TYPE);
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MtrrType = MTRR_CACHE_INVALID_TYPE;
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if ((TempQword & MTRR_LIB_CACHE_MTRR_ENABLED) == 0) {
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return CacheUncacheable;
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}
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//
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// If address is less than 1M, then try to go through the fixed MTRR
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//
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if (Address < BASE_1MB) {
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if ((TempQword & MTRR_LIB_CACHE_FIXED_MTRR_ENABLED) != 0) {
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//
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// Go through the fixed MTRR
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//
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for (Index = 0; Index < MTRR_NUMBER_OF_FIXED_MTRR; Index++) {
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if (Address >= mMtrrLibFixedMtrrTable[Index].BaseAddress &&
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Address < (
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mMtrrLibFixedMtrrTable[Index].BaseAddress +
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(mMtrrLibFixedMtrrTable[Index].Length * 8)
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)
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) {
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SubIndex =
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((UINTN)Address - mMtrrLibFixedMtrrTable[Index].BaseAddress) /
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mMtrrLibFixedMtrrTable[Index].Length;
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TempQword = AsmReadMsr64 (mMtrrLibFixedMtrrTable[Index].Msr);
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MtrrType = RShiftU64 (TempQword, SubIndex * 8) & 0xFF;
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return GetMemoryCacheTypeFromMtrrType (MtrrType);
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}
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}
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}
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}
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MtrrLibInitializeMtrrMask(&MtrrValidBitsMask, &MtrrValidAddressMask);
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MtrrGetMemoryAttributeInVariableMtrr(
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MtrrValidBitsMask,
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MtrrValidAddressMask,
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VariableMtrr
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);
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//
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// Go through the variable MTRR
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//
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VariableMtrrCount = GetVariableMtrrCount ();
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ASSERT (VariableMtrrCount <= MTRR_NUMBER_OF_VARIABLE_MTRR);
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for (Index = 0; Index < VariableMtrrCount; Index++) {
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if (VariableMtrr[Index].Valid) {
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if (Address >= VariableMtrr[Index].BaseAddress &&
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Address < VariableMtrr[Index].BaseAddress+VariableMtrr[Index].Length) {
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TempMtrrType = VariableMtrr[Index].Type;
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MtrrType = MtrrPrecedence (MtrrType, TempMtrrType);
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}
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}
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}
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CacheType = GetMemoryCacheTypeFromMtrrType (MtrrType);
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return CacheType;
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}
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/**
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Worker function will get the raw value in variable MTRRs
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|
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@param[out] VariableSettings A buffer to hold variable MTRRs content.
|
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@return The VariableSettings input pointer
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**/
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MTRR_VARIABLE_SETTINGS*
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MtrrGetVariableMtrrWorker (
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OUT MTRR_VARIABLE_SETTINGS *VariableSettings
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)
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{
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UINT32 Index;
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UINT32 VariableMtrrCount;
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VariableMtrrCount = GetVariableMtrrCount ();
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ASSERT (VariableMtrrCount <= MTRR_NUMBER_OF_VARIABLE_MTRR);
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for (Index = 0; Index < VariableMtrrCount; Index++) {
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VariableSettings->Mtrr[Index].Base =
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AsmReadMsr64 (MTRR_LIB_IA32_VARIABLE_MTRR_BASE + (Index << 1));
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VariableSettings->Mtrr[Index].Mask =
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AsmReadMsr64 (MTRR_LIB_IA32_VARIABLE_MTRR_BASE + (Index << 1) + 1);
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}
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return VariableSettings;
|
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}
|
||||
|
||||
/**
|
||||
This function will get the raw value in variable MTRRs
|
||||
|
||||
@param[out] VariableSettings A buffer to hold variable MTRRs content.
|
||||
|
||||
@return The VariableSettings input pointer
|
||||
|
||||
**/
|
||||
MTRR_VARIABLE_SETTINGS*
|
||||
EFIAPI
|
||||
MtrrGetVariableMtrr (
|
||||
OUT MTRR_VARIABLE_SETTINGS *VariableSettings
|
||||
)
|
||||
{
|
||||
if (!IsMtrrSupported ()) {
|
||||
return VariableSettings;
|
||||
}
|
||||
|
||||
return MtrrGetVariableMtrrWorker (
|
||||
VariableSettings
|
||||
);
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
Worker function setting variable MTRRs
|
||||
|
||||
|
@ -1441,51 +1631,6 @@ MtrrSetVariableMtrr (
|
|||
return VariableSettings;
|
||||
}
|
||||
|
||||
/**
|
||||
Worker function gets the content in fixed MTRRs
|
||||
|
||||
@param[out] FixedSettings A buffer to hold fixed MTRRs content.
|
||||
|
||||
@retval The pointer of FixedSettings
|
||||
|
||||
**/
|
||||
MTRR_FIXED_SETTINGS*
|
||||
MtrrGetFixedMtrrWorker (
|
||||
OUT MTRR_FIXED_SETTINGS *FixedSettings
|
||||
)
|
||||
{
|
||||
UINT32 Index;
|
||||
|
||||
for (Index = 0; Index < MTRR_NUMBER_OF_FIXED_MTRR; Index++) {
|
||||
FixedSettings->Mtrr[Index] =
|
||||
AsmReadMsr64 (mMtrrLibFixedMtrrTable[Index].Msr);
|
||||
}
|
||||
|
||||
return FixedSettings;
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
This function gets the content in fixed MTRRs
|
||||
|
||||
@param[out] FixedSettings A buffer to hold fixed MTRRs content.
|
||||
|
||||
@retval The pointer of FixedSettings
|
||||
|
||||
**/
|
||||
MTRR_FIXED_SETTINGS*
|
||||
EFIAPI
|
||||
MtrrGetFixedMtrr (
|
||||
OUT MTRR_FIXED_SETTINGS *FixedSettings
|
||||
)
|
||||
{
|
||||
if (!IsMtrrSupported ()) {
|
||||
return FixedSettings;
|
||||
}
|
||||
|
||||
return MtrrGetFixedMtrrWorker (FixedSettings);
|
||||
}
|
||||
|
||||
/**
|
||||
Worker function setting fixed MTRRs
|
||||
|
||||
|
@ -1615,153 +1760,6 @@ MtrrSetAllMtrrs (
|
|||
return MtrrSetting;
|
||||
}
|
||||
|
||||
/**
|
||||
This function prints all MTRRs for debugging.
|
||||
**/
|
||||
VOID
|
||||
EFIAPI
|
||||
MtrrDebugPrintAllMtrrs (
|
||||
VOID
|
||||
)
|
||||
{
|
||||
DEBUG_CODE (
|
||||
MTRR_SETTINGS MtrrSettings;
|
||||
UINTN Index;
|
||||
UINTN Index1;
|
||||
UINTN VariableMtrrCount;
|
||||
UINT64 Base;
|
||||
UINT64 Limit;
|
||||
UINT64 MtrrBase;
|
||||
UINT64 MtrrLimit;
|
||||
UINT64 RangeBase;
|
||||
UINT64 RangeLimit;
|
||||
UINT64 NoRangeBase;
|
||||
UINT64 NoRangeLimit;
|
||||
UINT32 RegEax;
|
||||
UINTN MemoryType;
|
||||
UINTN PreviousMemoryType;
|
||||
BOOLEAN Found;
|
||||
|
||||
if (!IsMtrrSupported ()) {
|
||||
return;
|
||||
}
|
||||
|
||||
DEBUG((DEBUG_CACHE, "MTRR Settings\n"));
|
||||
DEBUG((DEBUG_CACHE, "=============\n"));
|
||||
|
||||
MtrrGetAllMtrrs (&MtrrSettings);
|
||||
DEBUG((DEBUG_CACHE, "MTRR Default Type: %016lx\n", MtrrSettings.MtrrDefType));
|
||||
for (Index = 0; Index < MTRR_NUMBER_OF_FIXED_MTRR; Index++) {
|
||||
DEBUG((DEBUG_CACHE, "Fixed MTRR[%02d] : %016lx\n", Index, MtrrSettings.Fixed.Mtrr[Index]));
|
||||
}
|
||||
|
||||
VariableMtrrCount = GetVariableMtrrCount ();
|
||||
for (Index = 0; Index < VariableMtrrCount; Index++) {
|
||||
DEBUG((DEBUG_CACHE, "Variable MTRR[%02d]: Base=%016lx Mask=%016lx\n",
|
||||
Index,
|
||||
MtrrSettings.Variables.Mtrr[Index].Base,
|
||||
MtrrSettings.Variables.Mtrr[Index].Mask
|
||||
));
|
||||
}
|
||||
DEBUG((DEBUG_CACHE, "\n"));
|
||||
DEBUG((DEBUG_CACHE, "MTRR Ranges\n"));
|
||||
DEBUG((DEBUG_CACHE, "====================================\n"));
|
||||
|
||||
Base = 0;
|
||||
PreviousMemoryType = MTRR_CACHE_INVALID_TYPE;
|
||||
for (Index = 0; Index < MTRR_NUMBER_OF_FIXED_MTRR; Index++) {
|
||||
Base = mMtrrLibFixedMtrrTable[Index].BaseAddress;
|
||||
for (Index1 = 0; Index1 < 8; Index1++) {
|
||||
MemoryType = (UINTN)(RShiftU64 (MtrrSettings.Fixed.Mtrr[Index], Index1 * 8) & 0xff);
|
||||
if (MemoryType > CacheWriteBack) {
|
||||
MemoryType = MTRR_CACHE_INVALID_TYPE;
|
||||
}
|
||||
if (MemoryType != PreviousMemoryType) {
|
||||
if (PreviousMemoryType != MTRR_CACHE_INVALID_TYPE) {
|
||||
DEBUG((DEBUG_CACHE, "%016lx\n", Base - 1));
|
||||
}
|
||||
PreviousMemoryType = MemoryType;
|
||||
DEBUG((DEBUG_CACHE, "%a:%016lx-", mMtrrMemoryCacheTypeShortName[MemoryType], Base));
|
||||
}
|
||||
Base += mMtrrLibFixedMtrrTable[Index].Length;
|
||||
}
|
||||
}
|
||||
DEBUG((DEBUG_CACHE, "%016lx\n", Base - 1));
|
||||
|
||||
VariableMtrrCount = GetVariableMtrrCount ();
|
||||
|
||||
Limit = BIT36 - 1;
|
||||
AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);
|
||||
if (RegEax >= 0x80000008) {
|
||||
AsmCpuid (0x80000008, &RegEax, NULL, NULL, NULL);
|
||||
Limit = LShiftU64 (1, RegEax & 0xff) - 1;
|
||||
}
|
||||
Base = BASE_1MB;
|
||||
PreviousMemoryType = MTRR_CACHE_INVALID_TYPE;
|
||||
do {
|
||||
MemoryType = MtrrGetMemoryAttribute (Base);
|
||||
if (MemoryType > CacheWriteBack) {
|
||||
MemoryType = MTRR_CACHE_INVALID_TYPE;
|
||||
}
|
||||
|
||||
if (MemoryType != PreviousMemoryType) {
|
||||
if (PreviousMemoryType != MTRR_CACHE_INVALID_TYPE) {
|
||||
DEBUG((DEBUG_CACHE, "%016lx\n", Base - 1));
|
||||
}
|
||||
PreviousMemoryType = MemoryType;
|
||||
DEBUG((DEBUG_CACHE, "%a:%016lx-", mMtrrMemoryCacheTypeShortName[MemoryType], Base));
|
||||
}
|
||||
|
||||
RangeBase = BASE_1MB;
|
||||
NoRangeBase = BASE_1MB;
|
||||
RangeLimit = Limit;
|
||||
NoRangeLimit = Limit;
|
||||
|
||||
for (Index = 0, Found = FALSE; Index < VariableMtrrCount; Index++) {
|
||||
if ((MtrrSettings.Variables.Mtrr[Index].Mask & BIT11) == 0) {
|
||||
//
|
||||
// If mask is not valid, then do not display range
|
||||
//
|
||||
continue;
|
||||
}
|
||||
MtrrBase = (MtrrSettings.Variables.Mtrr[Index].Base & (~(SIZE_4KB - 1)));
|
||||
MtrrLimit = MtrrBase + ((~(MtrrSettings.Variables.Mtrr[Index].Mask & (~(SIZE_4KB - 1)))) & Limit);
|
||||
|
||||
if (Base >= MtrrBase && Base < MtrrLimit) {
|
||||
Found = TRUE;
|
||||
}
|
||||
|
||||
if (Base >= MtrrBase && MtrrBase > RangeBase) {
|
||||
RangeBase = MtrrBase;
|
||||
}
|
||||
if (Base > MtrrLimit && MtrrLimit > RangeBase) {
|
||||
RangeBase = MtrrLimit + 1;
|
||||
}
|
||||
if (Base < MtrrBase && MtrrBase < RangeLimit) {
|
||||
RangeLimit = MtrrBase - 1;
|
||||
}
|
||||
if (Base < MtrrLimit && MtrrLimit <= RangeLimit) {
|
||||
RangeLimit = MtrrLimit;
|
||||
}
|
||||
|
||||
if (Base > MtrrLimit && NoRangeBase < MtrrLimit) {
|
||||
NoRangeBase = MtrrLimit + 1;
|
||||
}
|
||||
if (Base < MtrrBase && NoRangeLimit > MtrrBase) {
|
||||
NoRangeLimit = MtrrBase - 1;
|
||||
}
|
||||
}
|
||||
|
||||
if (Found) {
|
||||
Base = RangeLimit + 1;
|
||||
} else {
|
||||
Base = NoRangeLimit + 1;
|
||||
}
|
||||
} while (Base < Limit);
|
||||
DEBUG((DEBUG_CACHE, "%016lx\n\n", Base - 1));
|
||||
);
|
||||
}
|
||||
|
||||
/**
|
||||
Checks if MTRR is supported.
|
||||
|
||||
|
|
Loading…
Reference in New Issue