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Do not update the GL-GD5446 DRAM Control register during 

InitializeGraphicsMode.  The update of this register would
cause the xorg-cirrus driver to mis-detect the size of
video memory for the QEMU cirrus video device.

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@8690 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
jljusten 2009-06-30 15:57:33 +00:00
parent 8c5c1f32a5
commit 85f8bc32d4
1 changed files with 19 additions and 3 deletions
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16
OptionRomPkg/CirrusLogic5430Dxe/CirrusLogic5430.c
View File

@ -770,6 +770,20 @@ InitializeGraphicsMode (
{ {
UINT8 Byte; UINT8 Byte;
UINTN Index; UINTN Index;
UINT16 DeviceId;
//
// Read the PCI Configuration Header from the PCI Device
//
ASSERT_EFI_ERROR (
Private->PciIo->Pci.Read (
Private->PciIo,
EfiPciIoWidthUint16,
PCI_DEVICE_ID_OFFSET,
1,
&DeviceId
)
);
outw (Private, SEQ_ADDRESS_REGISTER, 0x1206); outw (Private, SEQ_ADDRESS_REGISTER, 0x1206);
outw (Private, SEQ_ADDRESS_REGISTER, 0x0012); outw (Private, SEQ_ADDRESS_REGISTER, 0x0012);
@ -778,9 +792,11 @@ InitializeGraphicsMode (
outw (Private, SEQ_ADDRESS_REGISTER, ModeData->SeqSettings[Index]); outw (Private, SEQ_ADDRESS_REGISTER, ModeData->SeqSettings[Index]);
} }
if (DeviceId != CIRRUS_LOGIC_5446_DEVICE_ID) {
outb (Private, SEQ_ADDRESS_REGISTER, 0x0f); outb (Private, SEQ_ADDRESS_REGISTER, 0x0f);
Byte = (UINT8) ((inb (Private, SEQ_DATA_REGISTER) & 0xc7) ^ 0x30); Byte = (UINT8) ((inb (Private, SEQ_DATA_REGISTER) & 0xc7) ^ 0x30);
outb (Private, SEQ_DATA_REGISTER, Byte); outb (Private, SEQ_DATA_REGISTER, Byte);
}
outb (Private, MISC_OUTPUT_REGISTER, ModeData->MiscSetting); outb (Private, MISC_OUTPUT_REGISTER, ModeData->MiscSetting);
outw (Private, GRAPH_ADDRESS_REGISTER, 0x0506); outw (Private, GRAPH_ADDRESS_REGISTER, 0x0506);