diff --git a/ArmPlatformPkg/ArmJunoPkg/AcpiTables/AcpiSsdtRootPci.asl b/ArmPlatformPkg/ArmJunoPkg/AcpiTables/AcpiSsdtRootPci.asl
deleted file mode 100644
index 800d2cb3b2..0000000000
--- a/ArmPlatformPkg/ArmJunoPkg/AcpiTables/AcpiSsdtRootPci.asl
+++ /dev/null
@@ -1,190 +0,0 @@
-/** @file
- Differentiated System Description Table Fields (SSDT)
-
- Copyright (c) 2014-2015, ARM Ltd. All rights reserved.
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include "ArmPlatform.h"
-
-/*
- See Reference [1] 6.2.12
- "There are two ways that _PRT can be used. ...
- In the second model, the PCI interrupts are hardwired to specific interrupt
- inputs on the interrupt controller and are not configurable. In this case,
- the Source field in _PRT does not reference a device, but instead contains
- the value zero, and the Source Index field contains the global system
- interrupt to which the PCI interrupt is hardwired."
-*/
-#define PRT_ENTRY(Address, Pin, Interrupt) \
- Package (4) { \
- Address, /* uses the same format as _ADR */ \
- Pin, /* The PCI pin number of the device (0-INTA, 1-INTB, 2-INTC, 3-INTD). */ \
- Zero, /* allocated from the global interrupt pool. */ \
- Interrupt /* global system interrupt number */ \
- }
-
-/*
- See Reference [1] 6.1.1
- "High word–Device #, Low word–Function #. (for example, device 3, function 2 is
- 0x00030002). To refer to all the functions on a device #, use a function number of FFFF)."
-*/
-#define ROOT_PRT_ENTRY(Pin, Interrupt) PRT_ENTRY(0x0000FFFF, Pin, Interrupt)
- // Device 0 for Bridge.
-
-
-DefinitionBlock("SsdtPci.aml", "SSDT", 1, "ARMLTD", "ARM-JUNO", EFI_ACPI_ARM_OEM_REVISION) {
- Scope(_SB) {
- //
- // PCI Root Complex
- //
- Device(PCI0)
- {
- Name(_HID, EISAID("PNP0A08")) // PCI Express Root Bridge
- Name(_CID, EISAID("PNP0A03")) // Compatible PCI Root Bridge
- Name(_SEG, Zero) // PCI Segment Group number
- Name(_BBN, Zero) // PCI Base Bus Number
- Name(_CCA, 1) // Initially mark the PCI coherent (for JunoR1)
-
- // Root Complex 0
- Device (RP0) {
- Name(_ADR, 0xF0000000) // Dev 0, Func 0
- }
-
- // PCI Routing Table
- Name(_PRT, Package() {
- ROOT_PRT_ENTRY(0, 168), // INTA
- ROOT_PRT_ENTRY(1, 169), // INTB
- ROOT_PRT_ENTRY(2, 170), // INTC
- ROOT_PRT_ENTRY(3, 171), // INTD
- })
- // Root complex resources
- Method (_CRS, 0, Serialized) {
- Name (RBUF, ResourceTemplate () {
- WordBusNumber ( // Bus numbers assigned to this root
- ResourceProducer,
- MinFixed, MaxFixed, PosDecode,
- 0, // AddressGranularity
- 0, // AddressMinimum - Minimum Bus Number
- 255, // AddressMaximum - Maximum Bus Number
- 0, // AddressTranslation - Set to 0
- 256 // RangeLength - Number of Busses
- )
-
- DWordMemory ( // 32-bit BAR Windows
- ResourceProducer, PosDecode,
- MinFixed, MaxFixed,
- Cacheable, ReadWrite,
- 0x00000000, // Granularity
- 0x50000000, // Min Base Address
- 0x57FFFFFF, // Max Base Address
- 0x00000000, // Translate
- 0x08000000 // Length
- )
-
- QWordMemory ( // 64-bit BAR Windows
- ResourceProducer, PosDecode,
- MinFixed, MaxFixed,
- Cacheable, ReadWrite,
- 0x00000000, // Granularity
- 0x4000000000, // Min Base Address
- 0x40FFFFFFFF, // Max Base Address
- 0x00000000, // Translate
- 0x100000000 // Length
- )
-
- DWordIo ( // IO window
- ResourceProducer,
- MinFixed,
- MaxFixed,
- PosDecode,
- EntireRange,
- 0x00000000, // Granularity
- 0x5f800000, // Min Base Address
- 0x5fffffff, // Max Base Address
- 0x5f800000, // Translate
- 0x00800000 // Length
- )
- }) // Name(RBUF)
-
- Return (RBUF)
- } // Method(_CRS)
-
- //
- // OS Control Handoff
- //
- Name(SUPP, Zero) // PCI _OSC Support Field value
- Name(CTRL, Zero) // PCI _OSC Control Field value
-
- /*
- See [1] 6.2.10, [2] 4.5
- */
- Method(_OSC,4) {
- // Check for proper UUID
- If(LEqual(Arg0,ToUUID("33DB4D5B-1FF7-401C-9657-7441C03DD766"))) {
- // Create DWord-adressable fields from the Capabilities Buffer
- CreateDWordField(Arg3,0,CDW1)
- CreateDWordField(Arg3,4,CDW2)
- CreateDWordField(Arg3,8,CDW3)
-
- // Save Capabilities DWord2 & 3
- Store(CDW2,SUPP)
- Store(CDW3,CTRL)
-
- // Only allow native hot plug control if OS supports:
- // * ASPM
- // * Clock PM
- // * MSI/MSI-X
- If(LNotEqual(And(SUPP, 0x16), 0x16)) {
- And(CTRL,0x1E,CTRL) // Mask bit 0 (and undefined bits)
- }
-
- // Always allow native PME, AER (no dependencies)
-
- // Never allow SHPC (no SHPC controller in this system)
- And(CTRL,0x1D,CTRL)
-
-#if 0
- If(LNot(And(CDW1,1))) { // Query flag clear?
- // Disable GPEs for features granted native control.
- If(And(CTRL,0x01)) { // Hot plug control granted?
- Store(0,HPCE) // clear the hot plug SCI enable bit
- Store(1,HPCS) // clear the hot plug SCI status bit
- }
- If(And(CTRL,0x04)) { // PME control granted?
- Store(0,PMCE) // clear the PME SCI enable bit
- Store(1,PMCS) // clear the PME SCI status bit
- }
- If(And(CTRL,0x10)) { // OS restoring PCIe cap structure?
- // Set status to not restore PCIe cap structure
- // upon resume from S3
- Store(1,S3CR)
- }
- }
-#endif
-
- If(LNotEqual(Arg1,One)) { // Unknown revision
- Or(CDW1,0x08,CDW1)
- }
-
- If(LNotEqual(CDW3,CTRL)) { // Capabilities bits were masked
- Or(CDW1,0x10,CDW1)
- }
- // Update DWORD3 in the buffer
- Store(CTRL,CDW3)
- Return(Arg3)
- } Else {
- Or(CDW1,4,CDW1) // Unrecognized UUID
- Return(Arg3)
- }
- } // End _OSC
- } // PCI0
- }
-}
diff --git a/ArmPlatformPkg/ArmJunoPkg/AcpiTables/AcpiTables.inf b/ArmPlatformPkg/ArmJunoPkg/AcpiTables/AcpiTables.inf
deleted file mode 100644
index 92a1c25354..0000000000
--- a/ArmPlatformPkg/ArmJunoPkg/AcpiTables/AcpiTables.inf
+++ /dev/null
@@ -1,52 +0,0 @@
-## @file
-#
-# ACPI table data and ASL sources required to boot the platform.
-#
-# Copyright (c) 2014-2015, ARM Ltd. All rights reserved.
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-##
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = JunoAcpiTables
- FILE_GUID = a1dd808e-1e95-4399-abc0-653c82e8530c
- MODULE_TYPE = USER_DEFINED
- VERSION_STRING = 1.0
-
-[Sources]
- Dsdt.asl
- Facs.aslc
- Fadt.aslc
- Gtdt.aslc
- Madt.aslc
- AcpiSsdtRootPci.asl # Juno R1 specific
-
-[Packages]
- ArmPkg/ArmPkg.dec
- ArmPlatformPkg/ArmPlatformPkg.dec
- ArmPlatformPkg/ArmVExpressPkg/ArmVExpressPkg.dec
- ArmPlatformPkg/ArmJunoPkg/ArmJuno.dec
- EmbeddedPkg/EmbeddedPkg.dec
- MdePkg/MdePkg.dec
- MdeModulePkg/MdeModulePkg.dec
-
-[FixedPcd]
- gArmPlatformTokenSpaceGuid.PcdCoreCount
- gArmTokenSpaceGuid.PcdGicDistributorBase
- gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase
-
- gArmTokenSpaceGuid.PcdArmArchTimerSecIntrNum
- gArmTokenSpaceGuid.PcdArmArchTimerIntrNum
- gArmTokenSpaceGuid.PcdArmArchTimerHypIntrNum
- gArmTokenSpaceGuid.PcdArmArchTimerVirtIntrNum
-
- gArmTokenSpaceGuid.PcdGenericWatchdogControlBase
- gArmTokenSpaceGuid.PcdGenericWatchdogRefreshBase
diff --git a/ArmPlatformPkg/ArmJunoPkg/AcpiTables/Dsdt.asl b/ArmPlatformPkg/ArmJunoPkg/AcpiTables/Dsdt.asl
deleted file mode 100644
index c80f46a4ce..0000000000
--- a/ArmPlatformPkg/ArmJunoPkg/AcpiTables/Dsdt.asl
+++ /dev/null
@@ -1,194 +0,0 @@
-/** @file
- Differentiated System Description Table Fields (DSDT)
-
- Copyright (c) 2014-2015, ARM Ltd. All rights reserved.
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include "ArmPlatform.h"
-
-DefinitionBlock("DsdtTable.aml", "DSDT", 1, "ARMLTD", "ARM-JUNO", EFI_ACPI_ARM_OEM_REVISION) {
- Scope(_SB) {
- //
- // A57x2-A53x4 Processor declaration
- //
- Device(CPU0) { // A53-0: Cluster 1, Cpu 0
- Name(_HID, "ACPI0007")
- Name(_UID, 0)
- }
- Device(CPU1) { // A53-1: Cluster 1, Cpu 1
- Name(_HID, "ACPI0007")
- Name(_UID, 1)
- }
- Device(CPU2) { // A53-2: Cluster 1, Cpu 2
- Name(_HID, "ACPI0007")
- Name(_UID, 2)
- }
- Device(CPU3) { // A53-3: Cluster 1, Cpu 3
- Name(_HID, "ACPI0007")
- Name(_UID, 3)
- }
- Device(CPU4) { // A57-0: Cluster 0, Cpu 0
- Name(_HID, "ACPI0007")
- Name(_UID, 4)
- }
- Device(CPU5) { // A57-1: Cluster 0, Cpu 1
- Name(_HID, "ACPI0007")
- Name(_UID, 5)
- }
-
- //
- // Keyboard and Mouse
- //
- Device(KMI0) {
- Name(_HID, "ARMH0501")
- Name(_CID, "PL050_KBD")
- Name(_CRS, ResourceTemplate() {
- Memory32Fixed(ReadWrite, 0x1C060008, 0x4)
- Memory32Fixed(ReadWrite, 0x1C060000, 0x4)
- Memory32Fixed(ReadOnly, 0x1C060004, 0x4)
- Interrupt(ResourceConsumer, Level, ActiveHigh, Exclusive) { 197 }
- })
- }
-
- //
- // LAN9118 Ethernet
- //
- Device(ETH0) {
- Name(_HID, "ARMH9118")
- Name(_UID, Zero)
- Name(_CRS, ResourceTemplate() {
- Memory32Fixed(ReadWrite, 0x1A000000, 0x1000)
- Interrupt(ResourceConsumer, Level, ActiveHigh, Exclusive) { 192 }
- })
- Name(_DSD, Package() {
- ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
- Package() {
- Package(2) {"phy-mode", "mii"},
- Package(2) {"reg-io-width", 4 },
- Package(2) {"smsc,irq-active-high",1},
- Package(2) {"smsc,irq-push-pull",1}
- }
- }) // _DSD()
- }
-
- // UART PL011
- Device(COM0) {
- Name(_HID, "ARMH0011")
- Name(_CID, "PL011")
- Name(_UID, Zero)
- Name(_CRS, ResourceTemplate() {
- Memory32Fixed(ReadWrite, 0x7FF80000, 0x1000)
- Interrupt(ResourceConsumer, Level, ActiveHigh, Exclusive) { 115 }
- })
- }
-
- //
- // USB EHCI Host Controller
- //
- Device(USB0){
- Name(_HID, "ARMH0D20")
- Name(_CID, "PNP0D20")
- Name(_UID, 2)
- Name(_CCA, 0) //EHCI on this platform is not coherent!
-
- Method(_CRS, 0x0, Serialized){
- Name(RBUF, ResourceTemplate(){
- Memory32Fixed(ReadWrite, 0x7FFC0000, 0x10000)
- Interrupt(ResourceConsumer, Level, ActiveHigh, Exclusive) {149} // INT ID=149 GIC IRQ ID=117 for Juno SoC USB EHCI Controller
- })
- Return(RBUF)
- }
-
- //
- // Root Hub
- //
- Device(RHUB){
- Name(_ADR, 0x00000000) // Address of Root Hub should be 0 as per ACPI 5.0 spec
-
- //
- // Ports connected to Root Hub
- //
- Device(HUB1){
- Name(_ADR, 0x00000001)
- Name(_UPC, Package(){
- 0x00, // Port is NOT connectable
- 0xFF, // Don't care
- 0x00000000, // Reserved 0 must be zero
- 0x00000000 // Reserved 1 must be zero
- })
-
- Device(PRT1){
- Name(_ADR, 0x00000001)
- Name(_UPC, Package(){
- 0xFF, // Port is connectable
- 0x00, // Port connector is A
- 0x00000000,
- 0x00000000
- })
- Name(_PLD, Package(){
- Buffer(0x10){
- 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x31, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
- }
- })
- } // USB0_RHUB_HUB1_PRT1
- Device(PRT2){
- Name(_ADR, 0x00000002)
- Name(_UPC, Package(){
- 0xFF, // Port is connectable
- 0x00, // Port connector is A
- 0x00000000,
- 0x00000000
- })
- Name(_PLD, Package(){
- Buffer(0x10){
- 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x31, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
- }
- })
- } // USB0_RHUB_HUB1_PRT2
-
- Device(PRT3){
- Name(_ADR, 0x00000003)
- Name(_UPC, Package(){
- 0xFF, // Port is connectable
- 0x00, // Port connector is A
- 0x00000000,
- 0x00000000
- })
- Name(_PLD, Package(){
- Buffer(0x10){
- 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x31, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
- }
- })
- } // USB0_RHUB_HUB1_PRT3
-
- Device(PRT4){
- Name(_ADR, 0x00000004)
- Name(_UPC, Package(){
- 0xFF, // Port is connectable
- 0x00, // Port connector is A
- 0x00000000,
- 0x00000000
- })
- Name(_PLD, Package(){
- Buffer(0x10){
- 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x31, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
- }
- })
- } // USB0_RHUB_HUB1_PRT4
- } // USB0_RHUB_HUB1
- } // USB0_RHUB
- } // USB0
- } // Scope(_SB)
-}
diff --git a/ArmPlatformPkg/ArmJunoPkg/AcpiTables/Facs.aslc b/ArmPlatformPkg/ArmJunoPkg/AcpiTables/Facs.aslc
deleted file mode 100644
index 137ead77c1..0000000000
--- a/ArmPlatformPkg/ArmJunoPkg/AcpiTables/Facs.aslc
+++ /dev/null
@@ -1,62 +0,0 @@
-/** @file
-* Firmware ACPI Control Structure (FACS)
-*
-* Copyright (c) 2012 - 2014, ARM Limited. All rights reserved.
-*
-* This program and the accompanying materials
-* are licensed and made available under the terms and conditions of the BSD License
-* which accompanies this distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-#include
-
-EFI_ACPI_5_0_FIRMWARE_ACPI_CONTROL_STRUCTURE Facs = {
- EFI_ACPI_5_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE, // UINT32 Signature
- sizeof (EFI_ACPI_5_0_FIRMWARE_ACPI_CONTROL_STRUCTURE), // UINT32 Length
- 0xA152, // UINT32 HardwareSignature
- 0, // UINT32 FirmwareWakingVector
- 0, // UINT32 GlobalLock
- 0, // UINT32 Flags
- 0, // UINT64 XFirmwareWakingVector
- EFI_ACPI_5_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION, // UINT8 Version;
- { EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved0[0]
- EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved0[1]
- EFI_ACPI_RESERVED_BYTE }, // UINT8 Reserved0[2]
- 0, // UINT32 OspmFlags "Platform firmware must
- // initialize this field to zero."
- { EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved1[0]
- EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved1[1]
- EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved1[2]
- EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved1[3]
- EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved1[4]
- EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved1[5]
- EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved1[6]
- EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved1[7]
- EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved1[8]
- EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved1[9]
- EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved1[10]
- EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved1[11]
- EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved1[12]
- EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved1[13]
- EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved1[14]
- EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved1[15]
- EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved1[16]
- EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved1[17]
- EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved1[18]
- EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved1[19]
- EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved1[20]
- EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved1[21]
- EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved1[22]
- EFI_ACPI_RESERVED_BYTE }, // UINT8 Reserved1[23]
-};
-
-//
-// Reference the table being generated to prevent the optimizer from removing the
-// data structure from the executable
-//
-VOID* CONST ReferenceAcpiTable = &Facs;
diff --git a/ArmPlatformPkg/ArmJunoPkg/AcpiTables/Fadt.aslc b/ArmPlatformPkg/ArmJunoPkg/AcpiTables/Fadt.aslc
deleted file mode 100644
index eafdecb8af..0000000000
--- a/ArmPlatformPkg/ArmJunoPkg/AcpiTables/Fadt.aslc
+++ /dev/null
@@ -1,99 +0,0 @@
-/** @file
-* Fixed ACPI Description Table (FADT)
-*
-* Copyright (c) 2012 - 2014, ARM Limited. All rights reserved.
-*
-* This program and the accompanying materials
-* are licensed and made available under the terms and conditions of the BSD License
-* which accompanies this distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-#include "ArmPlatform.h"
-#include
-#include
-
-#ifdef ARM_JUNO_ACPI_5_0
-EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE Fadt = {
- ARM_ACPI_HEADER (
- EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE,
- EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE,
- EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION
- ),
-#else
-EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE Fadt = {
- ARM_ACPI_HEADER (
- EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE,
- EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE,
- EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE_REVISION
- ),
-#endif
- 0, // UINT32 FirmwareCtrl
- 0, // UINT32 Dsdt
- EFI_ACPI_RESERVED_BYTE, // UINT8 Reserved0
- EFI_ACPI_5_0_PM_PROFILE_UNSPECIFIED, // UINT8 PreferredPmProfile
- 0, // UINT16 SciInt
- 0, // UINT32 SmiCmd
- 0, // UINT8 AcpiEnable
- 0, // UINT8 AcpiDisable
- 0, // UINT8 S4BiosReq
- 0, // UINT8 PstateCnt
- 0, // UINT32 Pm1aEvtBlk
- 0, // UINT32 Pm1bEvtBlk
- 0, // UINT32 Pm1aCntBlk
- 0, // UINT32 Pm1bCntBlk
- 0, // UINT32 Pm2CntBlk
- 0, // UINT32 PmTmrBlk
- 0, // UINT32 Gpe0Blk
- 0, // UINT32 Gpe1Blk
- 0, // UINT8 Pm1EvtLen
- 0, // UINT8 Pm1CntLen
- 0, // UINT8 Pm2CntLen
- 0, // UINT8 PmTmrLen
- 0, // UINT8 Gpe0BlkLen
- 0, // UINT8 Gpe1BlkLen
- 0, // UINT8 Gpe1Base
- 0, // UINT8 CstCnt
- 0, // UINT16 PLvl2Lat
- 0, // UINT16 PLvl3Lat
- 0, // UINT16 FlushSize
- 0, // UINT16 FlushStride
- 0, // UINT8 DutyOffset
- 0, // UINT8 DutyWidth
- 0, // UINT8 DayAlrm
- 0, // UINT8 MonAlrm
- 0, // UINT8 Century
- 0, // UINT16 IaPcBootArch
- 0, // UINT8 Reserved1
- EFI_ACPI_5_0_HW_REDUCED_ACPI | EFI_ACPI_5_0_LOW_POWER_S0_IDLE_CAPABLE, // UINT32 Flags
- NULL_GAS, // EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE ResetReg
- 0, // UINT8 ResetValue
-#if ARM_JUNO_ACPI_5_0
- {EFI_ACPI_RESERVED_BYTE,EFI_ACPI_RESERVED_BYTE,EFI_ACPI_RESERVED_BYTE}, // UINT8 Reserved2[3]
-#else
- EFI_ACPI_5_1_ARM_PSCI_COMPLIANT, // UINT16 ArmBootArchFlags
- EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE_MINOR_REVISION, // UINT8 MinorRevision
-#endif
- 0, // UINT64 XFirmwareCtrl
- 0, // UINT64 XDsdt
- NULL_GAS, // EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk
- NULL_GAS, // EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk
- NULL_GAS, // EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk
- NULL_GAS, // EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk
- NULL_GAS, // EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk
- NULL_GAS, // EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk
- NULL_GAS, // EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XGpe0Blk
- NULL_GAS, // EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XGpe1Blk
- NULL_GAS, // EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE SleepControlReg
- NULL_GAS // EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE SleepStatusReg
-};
-
-//
-// Reference the table being generated to prevent the optimizer from removing the
-// data structure from the executable
-//
-VOID* CONST ReferenceAcpiTable = &Fadt;
diff --git a/ArmPlatformPkg/ArmJunoPkg/AcpiTables/Gtdt.aslc b/ArmPlatformPkg/ArmJunoPkg/AcpiTables/Gtdt.aslc
deleted file mode 100644
index c0e3f5fc11..0000000000
--- a/ArmPlatformPkg/ArmJunoPkg/AcpiTables/Gtdt.aslc
+++ /dev/null
@@ -1,103 +0,0 @@
-/** @file
-* Generic Timer Description Table (GTDT)
-*
-* Copyright (c) 2012 - 2014, ARM Limited. All rights reserved.
-*
-* This program and the accompanying materials
-* are licensed and made available under the terms and conditions of the BSD License
-* which accompanies this distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-#include "ArmPlatform.h"
-#include
-#include
-#include
-
-#define GTDT_GLOBAL_FLAGS_MAPPED EFI_ACPI_5_0_GTDT_GLOBAL_FLAG_MEMORY_MAPPED_BLOCK_PRESENT
-#define GTDT_GLOBAL_FLAGS_NOT_MAPPED 0
-#define GTDT_GLOBAL_FLAGS_EDGE EFI_ACPI_5_0_GTDT_GLOBAL_FLAG_INTERRUPT_MODE
-#define GTDT_GLOBAL_FLAGS_LEVEL 0
-
-// Note: We could have a build flag that switches between memory mapped/non-memory mapped timer
-#ifdef SYSTEM_TIMER_BASE_ADDRESS
- #define GTDT_GLOBAL_FLAGS (GTDT_GLOBAL_FLAGS_MAPPED | GTDT_GLOBAL_FLAGS_LEVEL)
-#else
- #define GTDT_GLOBAL_FLAGS (GTDT_GLOBAL_FLAGS_NOT_MAPPED | GTDT_GLOBAL_FLAGS_LEVEL)
- #define SYSTEM_TIMER_BASE_ADDRESS 0xFFFFFFFFFFFFFFFF
-#endif
-
-#define GTDT_TIMER_EDGE_TRIGGERED EFI_ACPI_5_0_GTDT_TIMER_FLAG_TIMER_INTERRUPT_MODE
-#define GTDT_TIMER_LEVEL_TRIGGERED 0
-#define GTDT_TIMER_ACTIVE_LOW EFI_ACPI_5_0_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY
-#define GTDT_TIMER_ACTIVE_HIGH 0
-
-#define GTDT_GTIMER_FLAGS (GTDT_TIMER_ACTIVE_LOW | GTDT_TIMER_LEVEL_TRIGGERED)
-
-#ifdef ARM_JUNO_ACPI_5_0
- EFI_ACPI_5_0_GENERIC_TIMER_DESCRIPTION_TABLE Gtdt = {
- ARM_ACPI_HEADER(
- EFI_ACPI_5_0_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE,
- EFI_ACPI_5_0_GENERIC_TIMER_DESCRIPTION_TABLE,
- EFI_ACPI_5_0_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION
- ),
- SYSTEM_TIMER_BASE_ADDRESS, // UINT64 PhysicalAddress
- GTDT_GLOBAL_FLAGS, // UINT32 GlobalFlags
- FixedPcdGet32 (PcdArmArchTimerSecIntrNum), // UINT32 SecurePL1TimerGSIV
- GTDT_GTIMER_FLAGS, // UINT32 SecurePL1TimerFlags
- FixedPcdGet32 (PcdArmArchTimerIntrNum), // UINT32 NonSecurePL1TimerGSIV
- GTDT_GTIMER_FLAGS, // UINT32 NonSecurePL1TimerFlags
- FixedPcdGet32 (PcdArmArchTimerVirtIntrNum), // UINT32 VirtualTimerGSIV
- GTDT_GTIMER_FLAGS, // UINT32 VirtualTimerFlags
- FixedPcdGet32 (PcdArmArchTimerHypIntrNum), // UINT32 NonSecurePL2TimerGSIV
- GTDT_GTIMER_FLAGS // UINT32 NonSecurePL2TimerFlags
- };
-#else
- #pragma pack (1)
-
- typedef struct {
- EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE Gtdt;
- EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_STRUCTURE Watchdogs[JUNO_WATCHDOG_COUNT];
- } EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLES;
-
- #pragma pack ()
-
- EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLES Gtdt = {
- {
- ARM_ACPI_HEADER(
- EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE,
- EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE,
- EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION
- ),
- SYSTEM_TIMER_BASE_ADDRESS, // UINT64 PhysicalAddress
- 0, // UINT32 Reserved
- FixedPcdGet32 (PcdArmArchTimerSecIntrNum), // UINT32 SecurePL1TimerGSIV
- GTDT_GTIMER_FLAGS, // UINT32 SecurePL1TimerFlags
- FixedPcdGet32 (PcdArmArchTimerIntrNum), // UINT32 NonSecurePL1TimerGSIV
- GTDT_GTIMER_FLAGS, // UINT32 NonSecurePL1TimerFlags
- FixedPcdGet32 (PcdArmArchTimerVirtIntrNum), // UINT32 VirtualTimerGSIV
- GTDT_GTIMER_FLAGS, // UINT32 VirtualTimerFlags
- FixedPcdGet32 (PcdArmArchTimerHypIntrNum), // UINT32 NonSecurePL2TimerGSIV
- GTDT_GTIMER_FLAGS, // UINT32 NonSecurePL2TimerFlags
- 0xFFFFFFFFFFFFFFFF, // UINT64 CntReadBasePhysicalAddress
- JUNO_WATCHDOG_COUNT, // UINT32 PlatformTimerCount
- sizeof (EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE) // UINT32 PlatfromTimerOffset
- },
- {
- EFI_ACPI_5_1_SBSA_GENERIC_WATCHDOG_STRUCTURE_INIT(
- FixedPcdGet32 (PcdGenericWatchdogRefreshBase), FixedPcdGet32 (PcdGenericWatchdogControlBase), 93, 0),
- EFI_ACPI_5_1_SBSA_GENERIC_WATCHDOG_STRUCTURE_INIT(
- FixedPcdGet32 (PcdGenericWatchdogRefreshBase), FixedPcdGet32 (PcdGenericWatchdogControlBase), 94, EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_SECURE_TIMER)
- }
- };
-#endif
-
-//
-// Reference the table being generated to prevent the optimizer from removing the
-// data structure from the executable
-//
-VOID* CONST ReferenceAcpiTable = &Gtdt;
diff --git a/ArmPlatformPkg/ArmJunoPkg/AcpiTables/Madt.aslc b/ArmPlatformPkg/ArmJunoPkg/AcpiTables/Madt.aslc
deleted file mode 100644
index 0a167d3ac0..0000000000
--- a/ArmPlatformPkg/ArmJunoPkg/AcpiTables/Madt.aslc
+++ /dev/null
@@ -1,131 +0,0 @@
-/** @file
-* Multiple APIC Description Table (MADT)
-*
-* Copyright (c) 2012 - 2015, ARM Limited. All rights reserved.
-*
-* This program and the accompanying materials
-* are licensed and made available under the terms and conditions of the BSD License
-* which accompanies this distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-#include "ArmPlatform.h"
-#include
-#include
-#include
-#include
-
-//
-// Multiple APIC Description Table
-//
-#ifdef ARM_JUNO_ACPI_5_0
- #pragma pack (1)
-
- typedef struct {
- EFI_ACPI_5_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER Header;
- EFI_ACPI_5_0_GIC_STRUCTURE GicInterfaces[FixedPcdGet32 (PcdCoreCount)];
- EFI_ACPI_5_0_GIC_DISTRIBUTOR_STRUCTURE GicDistributor;
- } EFI_ACPI_5_0_MULTIPLE_APIC_DESCRIPTION_TABLE;
-
- #pragma pack ()
-
- EFI_ACPI_5_0_MULTIPLE_APIC_DESCRIPTION_TABLE Madt = {
- {
- ARM_ACPI_HEADER (
- EFI_ACPI_5_0_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE,
- EFI_ACPI_5_0_MULTIPLE_APIC_DESCRIPTION_TABLE,
- EFI_ACPI_5_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION
- ),
- //
- // MADT specific fields
- //
- 0, // LocalApicAddress
- 0, // Flags
- },
- {
- // Format: EFI_ACPI_5_0_GIC_STRUCTURE_INIT(GicId, AcpiCpuId, Flags, PmuIrq, GicBase)
- // Note: The GIC Structure of the primary CPU must be the first entry (see note in 5.2.12.14 GIC Structure of
- // ACPI v5.0).
- // On Juno we can change the primary CPU changing the SCC register. It is not currently supported in the
- // Trusted Firmware. When supported, we will need to code to dynamically change the ordering.
- // For now we leave CPU2 (A53-0) at the first position.
- // The cores from a same cluster are kept together. It is not an ACPI requirement but in case the OSPM uses
- // the ACPI ARM Parking protocol, it might want to wake up the cores in the order of this table.
- EFI_ACPI_5_0_GIC_STRUCTURE_INIT(2, 0, EFI_ACPI_5_0_GIC_ENABLED, 50, FixedPcdGet32 (PcdGicInterruptInterfaceBase)), // A53-0
- EFI_ACPI_5_0_GIC_STRUCTURE_INIT(3, 1, EFI_ACPI_5_0_GIC_ENABLED, 54, FixedPcdGet32 (PcdGicInterruptInterfaceBase)), // A53-1
- EFI_ACPI_5_0_GIC_STRUCTURE_INIT(4, 2, EFI_ACPI_5_0_GIC_ENABLED, 58, FixedPcdGet32 (PcdGicInterruptInterfaceBase)), // A53-2
- EFI_ACPI_5_0_GIC_STRUCTURE_INIT(5, 3, EFI_ACPI_5_0_GIC_ENABLED, 62, FixedPcdGet32 (PcdGicInterruptInterfaceBase)), // A53-3
- EFI_ACPI_5_0_GIC_STRUCTURE_INIT(0, 4, EFI_ACPI_5_0_GIC_ENABLED, 34, FixedPcdGet32 (PcdGicInterruptInterfaceBase)), // A57-0
- EFI_ACPI_5_0_GIC_STRUCTURE_INIT(1, 5, EFI_ACPI_5_0_GIC_ENABLED, 38, FixedPcdGet32 (PcdGicInterruptInterfaceBase)) // A57-1
- },
- EFI_ACPI_5_0_GIC_DISTRIBUTOR_INIT(0, FixedPcdGet32 (PcdGicDistributorBase), 0)
- };
-#else
- #pragma pack (1)
-
- typedef struct {
- EFI_ACPI_5_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER Header;
- EFI_ACPI_5_1_GIC_STRUCTURE GicInterfaces[FixedPcdGet32 (PcdCoreCount)];
- EFI_ACPI_5_0_GIC_DISTRIBUTOR_STRUCTURE GicDistributor;
- EFI_ACPI_6_0_GIC_MSI_FRAME_STRUCTURE MsiFrame;
- } EFI_ACPI_5_0_MULTIPLE_APIC_DESCRIPTION_TABLE;
-
- #pragma pack ()
-
- EFI_ACPI_5_0_MULTIPLE_APIC_DESCRIPTION_TABLE Madt = {
- {
- ARM_ACPI_HEADER (
- EFI_ACPI_5_0_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE,
- EFI_ACPI_5_0_MULTIPLE_APIC_DESCRIPTION_TABLE,
- EFI_ACPI_5_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION
- ),
- //
- // MADT specific fields
- //
- 0, // LocalApicAddress
- 0, // Flags
- },
- {
- // Format: EFI_ACPI_5_1_GICC_STRUCTURE_INIT(GicId, AcpiCpuUid, Flags, PmuIrq, GicBase, GicVBase, GicHBase,
- // GsivId, GicRBase, Mpidr)
- // Note: The GIC Structure of the primary CPU must be the first entry (see note in 5.2.12.14 GICC Structure of
- // ACPI v5.1).
- // On Juno we can change the primary CPU changing the SCC register. It is not currently supported in the
- // Trusted Firmware. When supported, we will need to code to dynamically change the ordering.
- // For now we leave CPU2 (A53-0) at the first position.
- // The cores from a same cluster are kept together. It is not an ACPI requirement but in case the OSPM uses
- // the ACPI ARM Parking protocol, it might want to wake up the cores in the order of this table.
- EFI_ACPI_5_1_GICC_STRUCTURE_INIT( // A53-0
- 2, 0, GET_MPID(1, 0), EFI_ACPI_5_0_GIC_ENABLED, 50, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
- 0x2C06F000, 0x2C04F000, 25, 0 /* GicRBase */),
- EFI_ACPI_5_1_GICC_STRUCTURE_INIT( // A53-1
- 3, 1, GET_MPID(1, 1), EFI_ACPI_5_0_GIC_ENABLED, 54, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
- 0x2C06F000, 0x2C04F000, 25, 0 /* GicRBase */),
- EFI_ACPI_5_1_GICC_STRUCTURE_INIT( // A53-2
- 4, 2, GET_MPID(1, 2), EFI_ACPI_5_0_GIC_ENABLED, 58, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
- 0x2C06F000, 0x2C04F000, 25, 0 /* GicRBase */),
- EFI_ACPI_5_1_GICC_STRUCTURE_INIT( // A53-3
- 5, 3, GET_MPID(1, 3), EFI_ACPI_5_0_GIC_ENABLED, 62, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
- 0x2C06F000, 0x2C04F000, 25, 0 /* GicRBase */),
- EFI_ACPI_5_1_GICC_STRUCTURE_INIT( // A57-0
- 0, 4, GET_MPID(0, 0), EFI_ACPI_5_0_GIC_ENABLED, 34, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
- 0x2C06F000, 0x2C04F000, 25, 0 /* GicRBase */),
- EFI_ACPI_5_1_GICC_STRUCTURE_INIT( // A57-1
- 1, 5, GET_MPID(0, 1), EFI_ACPI_5_0_GIC_ENABLED, 38, FixedPcdGet32 (PcdGicInterruptInterfaceBase),
- 0x2C06F000, 0x2C04F000, 25, 0 /* GicRBase */),
- },
- EFI_ACPI_5_0_GIC_DISTRIBUTOR_INIT(0, FixedPcdGet32 (PcdGicDistributorBase), 0),
- // Format: EFI_ACPI_6_0_GIC_MSI_FRAME_INIT(GicMsiFrameId, PhysicalBaseAddress, Flags, SPICount, SPIBase)
- EFI_ACPI_6_0_GIC_MSI_FRAME_INIT(0, ARM_JUNO_GIV2M_MSI_BASE, 0, ARM_JUNO_GIV2M_MSI_SPI_COUNT, ARM_JUNO_GIV2M_MSI_SPI_BASE)
- };
-#endif
-
-//
-// Reference the table being generated to prevent the optimizer from removing the
-// data structure from the executable
-//
-VOID* CONST ReferenceAcpiTable = &Madt;