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IntelFsp2WrapperPkg: BaseFspWrapperApiLib support for X64 

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3893
Add Execute64BitCode to execute 64bit code from long mode directly
in PEI 64bit.

Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Ashraf Ali S <ashraf.ali.s@intel.com>
Signed-off-by: Ted Kuo <ted.kuo@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
This commit is contained in:
Ted Kuo 2022-04-15 01:37:42 -07:00 committed by mergify[bot]
parent 4a6ed7e46a
commit 86a2f3c439
3 changed files with 104 additions and 10 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

34
IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/FspWrapperApiLib.c
View File

@ -1,7 +1,7 @@
/** @file
Provide FSP API related function.
Copyright (c) 2014 - 2017, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2014 - 2022, Intel Corporation. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@ -29,6 +29,22 @@ Execute32BitCode (
IN UINT64 Param2
);
/**
Wrapper to execute 64-bit code directly from long mode.
@param[in] Function The 64bit code entry to be executed.
@param[in] Param1 The first parameter to pass to 64bit code.
@param[in] Param2 The second parameter to pass to 64bit code.
@return EFI_STATUS.
**/
EFI_STATUS
Execute64BitCode (
IN UINT64 Function,
IN UINT64 Param1,
IN UINT64 Param2
);
/**
Find FSP header pointer.
@ -94,7 +110,11 @@ CallFspNotifyPhase (
NotifyPhaseApi = (FSP_NOTIFY_PHASE)((UINTN)FspHeader->ImageBase + FspHeader->NotifyPhaseEntryOffset);
InterruptState = SaveAndDisableInterrupts ();
if ((FspHeader->ImageAttribute & IMAGE_ATTRIBUTE_64BIT_MODE_SUPPORT) == FSP_IA32) {
Status = Execute32BitCode ((UINTN)NotifyPhaseApi, (UINTN)NotifyPhaseParams, (UINTN)NULL);
} else {
Status = Execute64BitCode ((UINTN)NotifyPhaseApi, (UINTN)NotifyPhaseParams, (UINTN)NULL);
}
SetInterruptState (InterruptState);
return Status;
@ -127,7 +147,11 @@ CallFspMemoryInit (
FspMemoryInitApi = (FSP_MEMORY_INIT)((UINTN)FspHeader->ImageBase + FspHeader->FspMemoryInitEntryOffset);
InterruptState = SaveAndDisableInterrupts ();
if ((FspHeader->ImageAttribute & IMAGE_ATTRIBUTE_64BIT_MODE_SUPPORT) == FSP_IA32) {
Status = Execute32BitCode ((UINTN)FspMemoryInitApi, (UINTN)FspmUpdDataPtr, (UINTN)HobListPtr);
} else {
Status = Execute64BitCode ((UINTN)FspMemoryInitApi, (UINTN)FspmUpdDataPtr, (UINTN)HobListPtr);
}
SetInterruptState (InterruptState);
return Status;
@ -158,7 +182,11 @@ CallTempRamExit (
TempRamExitApi = (FSP_TEMP_RAM_EXIT)((UINTN)FspHeader->ImageBase + FspHeader->TempRamExitEntryOffset);
InterruptState = SaveAndDisableInterrupts ();
if ((FspHeader->ImageAttribute & IMAGE_ATTRIBUTE_64BIT_MODE_SUPPORT) == FSP_IA32) {
Status = Execute32BitCode ((UINTN)TempRamExitApi, (UINTN)TempRamExitParam, (UINTN)NULL);
} else {
Status = Execute64BitCode ((UINTN)TempRamExitApi, (UINTN)TempRamExitParam, (UINTN)NULL);
}
SetInterruptState (InterruptState);
return Status;
@ -189,7 +217,11 @@ CallFspSiliconInit (
FspSiliconInitApi = (FSP_SILICON_INIT)((UINTN)FspHeader->ImageBase + FspHeader->FspSiliconInitEntryOffset);
InterruptState = SaveAndDisableInterrupts ();
if ((FspHeader->ImageAttribute & IMAGE_ATTRIBUTE_64BIT_MODE_SUPPORT) == FSP_IA32) {
Status = Execute32BitCode ((UINTN)FspSiliconInitApi, (UINTN)FspsUpdDataPtr, (UINTN)NULL);
} else {
Status = Execute64BitCode ((UINTN)FspSiliconInitApi, (UINTN)FspsUpdDataPtr, (UINTN)NULL);
}
SetInterruptState (InterruptState);
return Status;

23
IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/IA32/DispatchExecute.c
View File

@ -1,7 +1,7 @@
/** @file
Execute 32-bit code in Protected Mode.
Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2014 - 2022, Intel Corporation. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@ -49,3 +49,24 @@ Execute32BitCode (
return Status;
}
/**
Wrapper for a thunk to transition from compatibility mode to long mode to execute 64-bit code and then transit back to
compatibility mode.
@param[in] Function The 64bit code entry to be executed.
@param[in] Param1 The first parameter to pass to 64bit code.
@param[in] Param2 The second parameter to pass to 64bit code.
@return EFI_STATUS.
**/
EFI_STATUS
Execute64BitCode (
IN UINT64 Function,
IN UINT64 Param1,
IN UINT64 Param2
)
{
return EFI_UNSUPPORTED;
}

45
IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/X64/DispatchExecute.c
View File

@ -1,9 +1,9 @@
/** @file
Execute 32-bit code in Long Mode.
Execute 64-bit code in Long Mode.
Provide a thunk function to transition from long mode to compatibility mode to execute 32-bit code and then transit
back to long mode.
Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2014 - 2022, Intel Corporation. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@ -12,6 +12,21 @@
#include <Library/BaseLib.h>
#include <FspEas.h>
/**
FSP API functions.
@param[in] Param1 The first parameter to pass to 64bit code.
@param[in] Param2 The second parameter to pass to 64bit code.
@return EFI_STATUS.
**/
typedef
EFI_STATUS
(EFIAPI *FSP_FUNCTION)(
IN VOID *Param1,
IN VOID *Param2
);
#pragma pack(1)
typedef union {
struct {
@ -110,3 +125,29 @@ Execute32BitCode (
return Status;
}
/**
Wrapper to execute 64-bit code directly from long mode.
@param[in] Function The 64bit code entry to be executed.
@param[in] Param1 The first parameter to pass to 64bit code.
@param[in] Param2 The second parameter to pass to 64bit code.
@return EFI_STATUS.
**/
EFI_STATUS
Execute64BitCode (
IN UINT64 Function,
IN UINT64 Param1,
IN UINT64 Param2
)
{
FSP_FUNCTION EntryFunc;
EFI_STATUS Status;
EntryFunc = (FSP_FUNCTION)(UINTN)(Function);
Status = EntryFunc ((VOID *)(UINTN)Param1, (VOID *)(UINTN)Param2);
return Status;
}