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MdePkg/IndustryStandard/Pci23: add vendor-specific capability header

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Revision 2.2 of the PCI Spec defines Capability IDs 0 through 6,
inclusive, in Appendix H. It reserves IDs 7 through 255.

Revision 2.3 of the PCI Spec adds Capability IDs 7 through 0xC, inclusive,
in Appendix H. Capability ID 9 stands for "Vendor Specific".

Add the EFI_PCI_CAPABILITY_ID_VENDOR macro and the
EFI_PCI_CAPABILITY_VENDOR_HDR structure type to MdePkg/IndustryStandard,
in order to describe this capability header.

Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Marcel Apfelbaum <marcel@redhat.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
This commit is contained in:
Laszlo Ersek 2017-09-21 10:48:53 +02:00
parent 9425b34925
commit 8844f15d33
1 changed files with 10 additions and 0 deletions
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10
MdePkg/Include/IndustryStandard/Pci23.h
View File

@ -92,6 +92,7 @@
/// PCI Capability List IDs and records. /// PCI Capability List IDs and records.
/// ///
#define EFI_PCI_CAPABILITY_ID_PCIX 0x07 #define EFI_PCI_CAPABILITY_ID_PCIX 0x07
#define EFI_PCI_CAPABILITY_ID_VENDOR 0x09
#pragma pack(1) #pragma pack(1)
/// ///
@ -116,6 +117,15 @@ typedef struct {
UINT32 SplitTransCtrlRegDn; UINT32 SplitTransCtrlRegDn;
} EFI_PCI_CAPABILITY_PCIX_BRDG; } EFI_PCI_CAPABILITY_PCIX_BRDG;
///
/// Vendor Specific Capability Header
/// Table H-1: Capability IDs, PCI Local Bus Specification, 2.3
///
typedef struct {
EFI_PCI_CAPABILITY_HDR Hdr;
UINT8 Length;
} EFI_PCI_CAPABILITY_VENDOR_HDR;
#pragma pack() #pragma pack()
#define PCI_CODE_TYPE_EFI_IMAGE 0x03 #define PCI_CODE_TYPE_EFI_IMAGE 0x03