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UefiCpuPkg/MpLib:Do not assume BSP is #0.
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4778 MPInitlib have wrong expectation that BSP index should always be 0 in MpInitLibInitialize(), SwitchBsp(),ApWakeupFunction(). That will cause the data mismatch, if the initial BSP is not 0. Reviewed-by: Ray Ni <ray.ni@intel.com> Signed-off-by: Ning Feng <ning.feng@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Jiaxin Wu <jiaxin.wu@intel.com>
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@ -1,7 +1,7 @@
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/** @file
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CPU MP Initialize Library common functions.
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Copyright (c) 2016 - 2022, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2016 - 2024, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2020 - 2024, AMD Inc. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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@ -114,6 +114,10 @@ FutureBSPProc (
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SaveVolatileRegisters (&DataInHob->APInfo.VolatileRegisters);
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AsmExchangeRole (&DataInHob->APInfo, &DataInHob->BSPInfo);
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RestoreVolatileRegisters (&DataInHob->APInfo.VolatileRegisters, FALSE);
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//
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// Update VolatileRegisters saved in CpuMpData->CpuData
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//
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CopyMem (&DataInHob->CpuData[DataInHob->BspNumber].VolatileRegisters, &DataInHob->APInfo.VolatileRegisters, sizeof (CPU_VOLATILE_REGISTERS));
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}
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/**
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@ -761,11 +765,11 @@ ApWakeupFunction (
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BistData = (UINT32)ApStackData->Bist;
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//
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// CpuMpData->CpuData[0].VolatileRegisters is initialized based on BSP environment,
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// CpuMpData->CpuData[BspNumber].VolatileRegisters is initialized based on BSP environment,
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// to initialize AP in InitConfig path.
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// NOTE: IDTR.BASE stored in CpuMpData->CpuData[0].VolatileRegisters points to a different IDT shared by all APs.
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// NOTE: IDTR.BASE stored in CpuMpData->CpuData[BspNumber].VolatileRegisters points to a different IDT shared by all APs.
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//
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RestoreVolatileRegisters (&CpuMpData->CpuData[0].VolatileRegisters, FALSE);
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RestoreVolatileRegisters (&CpuMpData->CpuData[CpuMpData->BspNumber].VolatileRegisters, FALSE);
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InitializeApData (CpuMpData, ProcessorNumber, BistData, ApTopOfStack);
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ApStartupSignalBuffer = CpuMpData->CpuData[ProcessorNumber].StartupApSignal;
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} else {
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@ -798,10 +802,10 @@ ApWakeupFunction (
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// 1. AP is re-enabled after it's disabled, in either PEI or DXE phase.
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// 2. AP is initialized in DXE phase.
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// In either case, use the volatile registers value derived from BSP.
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// NOTE: IDTR.BASE stored in CpuMpData->CpuData[0].VolatileRegisters points to a
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// NOTE: IDTR.BASE stored in CpuMpData->CpuData[BspNumber].VolatileRegisters points to a
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// different IDT shared by all APs.
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//
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RestoreVolatileRegisters (&CpuMpData->CpuData[0].VolatileRegisters, FALSE);
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RestoreVolatileRegisters (&CpuMpData->CpuData[CpuMpData->BspNumber].VolatileRegisters, FALSE);
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} else {
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if (CpuMpData->ApLoopMode == ApInHltLoop) {
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//
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@ -927,7 +931,7 @@ DxeApEntryPoint (
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AsmWriteMsr64 (MSR_IA32_EFER, EferMsr.Uint64);
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}
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RestoreVolatileRegisters (&CpuMpData->CpuData[0].VolatileRegisters, FALSE);
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RestoreVolatileRegisters (&CpuMpData->CpuData[CpuMpData->BspNumber].VolatileRegisters, FALSE);
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InterlockedIncrement ((UINT32 *)&CpuMpData->FinishedCount);
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PlaceAPInMwaitLoopOrRunLoop (
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CpuMpData->ApLoopMode,
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@ -2151,7 +2155,12 @@ MpInitLibInitialize (
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CpuMpData->BackupBufferSize = ApResetVectorSizeBelow1Mb;
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CpuMpData->WakeupBuffer = (UINTN)-1;
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CpuMpData->CpuCount = 1;
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if (FirstMpHandOff == NULL) {
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CpuMpData->BspNumber = 0;
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} else {
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CpuMpData->BspNumber = GetBspNumber (FirstMpHandOff);
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}
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CpuMpData->WaitEvent = NULL;
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CpuMpData->SwitchBspFlag = FALSE;
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CpuMpData->CpuData = (CPU_AP_DATA *)(CpuMpData + 1);
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@ -2186,11 +2195,11 @@ MpInitLibInitialize (
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// Don't pass BSP's TR to APs to avoid AP init failure.
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//
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VolatileRegisters.Tr = 0;
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CopyMem (&CpuMpData->CpuData[0].VolatileRegisters, &VolatileRegisters, sizeof (VolatileRegisters));
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CopyMem (&CpuMpData->CpuData[CpuMpData->BspNumber].VolatileRegisters, &VolatileRegisters, sizeof (VolatileRegisters));
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//
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// Set BSP basic information
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//
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InitializeApData (CpuMpData, 0, 0, CpuMpData->Buffer + ApStackSize);
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InitializeApData (CpuMpData, CpuMpData->BspNumber, 0, CpuMpData->Buffer + ApStackSize * (CpuMpData->BspNumber + 1));
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//
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// Save assembly code information
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//
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@ -2246,7 +2255,6 @@ MpInitLibInitialize (
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}
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CpuMpData->CpuCount = MaxLogicalProcessorNumber;
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CpuMpData->BspNumber = GetBspNumber (FirstMpHandOff);
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CpuInfoInHob = (CPU_INFO_IN_HOB *)(UINTN)CpuMpData->CpuInfoInHob;
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for (MpHandOff = FirstMpHandOff;
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MpHandOff != NULL;
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@ -2615,7 +2623,12 @@ SwitchBSPWorker (
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SaveVolatileRegisters (&CpuMpData->BSPInfo.VolatileRegisters);
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AsmExchangeRole (&CpuMpData->BSPInfo, &CpuMpData->APInfo);
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RestoreVolatileRegisters (&CpuMpData->BSPInfo.VolatileRegisters, FALSE);
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//
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// Update VolatileRegisters saved in CpuMpData->CpuData
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// Don't pass BSP's TR to APs to avoid AP init failure.
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//
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CopyMem (&CpuMpData->CpuData[CpuMpData->NewBspNumber].VolatileRegisters, &CpuMpData->BSPInfo.VolatileRegisters, sizeof (CPU_VOLATILE_REGISTERS));
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CpuMpData->CpuData[CpuMpData->NewBspNumber].VolatileRegisters.Tr = 0;
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//
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// Set the BSP bit of MSR_IA32_APIC_BASE on new BSP
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//
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