mirror of https://github.com/acidanthera/audk.git
MdePkg/BaseLib: Support IA32 processors without CMOVx
Remove use of CMOVx instruction from IA32 assembly files in BaseLib. This matches compiler flags for all supported C compilers. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Kinney <michael.d.kinney@intel.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17213 6f19259b-4bc3-4df7-8a09-765794883524
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@ -1,7 +1,7 @@
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## @file
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# Base Library implementation.
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#
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# Copyright (c) 2007 - 2014, Intel Corporation. All rights reserved.<BR>
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# Copyright (c) 2007 - 2015, Intel Corporation. All rights reserved.<BR>
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# Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
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# Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
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#
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@ -21,7 +21,7 @@
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MODULE_UNI_FILE = BaseLib.uni
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FILE_GUID = 27d67720-ea68-48ae-93da-a3a074c90e30
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MODULE_TYPE = BASE
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VERSION_STRING = 1.0
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VERSION_STRING = 1.1
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LIBRARY_CLASS = BaseLib
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#
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@ -1,6 +1,6 @@
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#------------------------------------------------------------------------------
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#
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# Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
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# Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
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# This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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# which accompanies this distribution. The full text of the license may be found at
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@ -34,8 +34,10 @@ ASM_PFX(InternalMathARShiftU64):
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movl 8(%esp), %eax
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cltd
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testb $32, %cl
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cmovz %eax, %edx
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cmovz 4(%esp), %eax
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jnz L0
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movl %eax, %edx
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movl 4(%esp), %eax
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L0:
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shrdl %cl, %edx, %eax
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sar %cl, %edx
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ret
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@ -1,6 +1,6 @@
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;------------------------------------------------------------------------------
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;
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; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
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; Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
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; This program and the accompanying materials
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; are licensed and made available under the terms and conditions of the BSD License
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; which accompanies this distribution. The full text of the license may be found at
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@ -36,8 +36,10 @@ InternalMathARShiftU64 PROC
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mov eax, [esp + 8]
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cdq
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test cl, 32
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cmovz edx, eax
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cmovz eax, [esp + 4]
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jnz @F
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mov edx, eax
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mov eax, [esp + 4]
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@@:
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shrd eax, edx, cl
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sar edx, cl
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ret
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@ -1,7 +1,7 @@
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/** @file
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64-bit arithmetic right shift function for IA-32.
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Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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@ -40,8 +40,10 @@ InternalMathARShiftU64 (
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mov eax, dword ptr [Operand + 4]
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cdq
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test cl, 32
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cmovz edx, eax
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cmovz eax, dword ptr [Operand + 0]
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jnz L0
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mov edx, eax
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mov eax, dword ptr [Operand + 0]
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L0:
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shrd eax, edx, cl
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sar edx, cl
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}
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@ -1,6 +1,6 @@
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#------------------------------------------------------------------------------
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#
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# Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
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# Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
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# This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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# which accompanies this distribution. The full text of the license may be found at
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@ -39,8 +39,10 @@ ASM_PFX(InternalMathLRotU64):
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rorl %cl, %ebx
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shldl %cl, %ebx, %eax
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testb $32, %cl # Count >= 32?
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cmovnz %eax, %ecx
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cmovnz %edx, %eax
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cmovnz %ecx, %edx
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jz L0
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movl %eax, %ecx
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movl %edx, %eax
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movl %ecx, %edx
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L0:
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pop %ebx
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ret
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@ -1,6 +1,6 @@
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;------------------------------------------------------------------------------
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;
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; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
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; Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
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; This program and the accompanying materials
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; are licensed and made available under the terms and conditions of the BSD License
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; which accompanies this distribution. The full text of the license may be found at
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@ -40,9 +40,11 @@ InternalMathLRotU64 PROC USES ebx
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ror ebx, cl
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shld eax, ebx, cl
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test cl, 32 ; Count >= 32?
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cmovnz ecx, eax
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cmovnz eax, edx
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cmovnz edx, ecx
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jz @F
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mov ecx, eax
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mov eax, edx
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mov edx, ecx
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@@:
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ret
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InternalMathLRotU64 ENDP
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@ -1,7 +1,7 @@
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/** @file
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64-bit left rotation for Ia32
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Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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@ -45,9 +45,11 @@ InternalMathLRotU64 (
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ror ebx, cl
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shld eax, ebx, cl
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test cl, 32 ; Count >= 32?
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cmovnz ecx, eax
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cmovnz eax, edx
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cmovnz edx, ecx
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jz L0
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mov ecx, eax
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mov eax, edx
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mov edx, ecx
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L0:
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}
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}
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@ -1,6 +1,6 @@
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#------------------------------------------------------------------------------
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#
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# Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
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# Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
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# This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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# which accompanies this distribution. The full text of the license may be found at
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@ -34,8 +34,10 @@ ASM_PFX(InternalMathLShiftU64):
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xorl %eax, %eax
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movl 4(%esp), %edx
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testb $32, %cl # Count >= 32?
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cmovz %edx, %eax
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cmovz 0x8(%esp), %edx
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jnz L0
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movl %edx, %eax
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movl 0x8(%esp), %edx
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L0:
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shld %cl, %eax, %edx
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shl %cl, %eax
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ret
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;------------------------------------------------------------------------------
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;
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; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
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; Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
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; This program and the accompanying materials
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; are licensed and made available under the terms and conditions of the BSD License
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; which accompanies this distribution. The full text of the license may be found at
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@ -36,8 +36,10 @@ InternalMathLShiftU64 PROC
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xor eax, eax
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mov edx, [esp + 4]
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test cl, 32 ; Count >= 32?
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cmovz eax, edx
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cmovz edx, [esp + 8]
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jnz @F
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mov eax, edx
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mov edx, [esp + 8]
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@@:
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shld edx, eax, cl
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shl eax, cl
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ret
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@ -1,7 +1,7 @@
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/** @file
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64-bit left shift function for IA-32.
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Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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@ -40,8 +40,10 @@ InternalMathLShiftU64 (
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xor eax, eax
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mov edx, dword ptr [Operand + 0]
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test cl, 32 // Count >= 32?
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cmovz eax, edx
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cmovz edx, dword ptr [Operand + 4]
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jnz L0
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mov eax, edx
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mov edx, dword ptr [Operand + 4]
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L0:
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shld edx, eax, cl
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shl eax, cl
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}
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@ -1,6 +1,6 @@
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#------------------------------------------------------------------------------
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#
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# Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
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# Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
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# This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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# which accompanies this distribution. The full text of the license may be found at
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@ -39,8 +39,10 @@ ASM_PFX(InternalMathRRotU64):
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roll %cl, %ebx
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shrdl %cl, %ebx, %edx
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testb $32, %cl # Count >= 32?
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cmovnz %eax, %ecx # switch eax & edx if Count >= 32
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cmovnz %edx, %eax
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cmovnz %ecx, %edx
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jz L0
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movl %eax, %ecx # switch eax & edx if Count >= 32
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movl %edx, %eax
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movl %ecx, %edx
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L0:
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pop %ebx
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ret
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@ -1,6 +1,6 @@
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;------------------------------------------------------------------------------
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;
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; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
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; Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
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; This program and the accompanying materials
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; are licensed and made available under the terms and conditions of the BSD License
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; which accompanies this distribution. The full text of the license may be found at
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@ -40,9 +40,11 @@ InternalMathRRotU64 PROC USES ebx
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rol ebx, cl
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shrd edx, ebx, cl
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test cl, 32 ; Count >= 32?
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cmovnz ecx, eax ; switch eax & edx if Count >= 32
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cmovnz eax, edx
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cmovnz edx, ecx
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jz @F
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mov ecx, eax ; switch eax & edx if Count >= 32
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mov eax, edx
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mov edx, ecx
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@@:
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ret
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InternalMathRRotU64 ENDP
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/** @file
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64-bit right rotation for Ia32
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Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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@ -45,9 +45,11 @@ InternalMathRRotU64 (
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rol ebx, cl
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shrd edx, ebx, cl
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test cl, 32 // Count >= 32?
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cmovnz ecx, eax
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cmovnz eax, edx
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cmovnz edx, ecx
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jz L0
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mov ecx, eax
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mov eax, edx
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mov edx, ecx
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L0:
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}
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}
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@ -1,6 +1,6 @@
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#------------------------------------------------------------------------------
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#
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# Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
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# Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
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# This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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# which accompanies this distribution. The full text of the license may be found at
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@ -37,8 +37,10 @@ ASM_PFX(InternalMathRShiftU64):
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xorl %edx, %edx
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movl 8(%esp), %eax
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testb $32, %cl # Count >= 32?
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cmovz %eax, %edx
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cmovz 0x4(%esp), %eax
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jnz L0
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movl %eax, %edx
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movl 0x4(%esp), %eax
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L0:
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shrdl %cl, %edx, %eax
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shr %cl, %edx
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ret
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@ -1,6 +1,6 @@
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;------------------------------------------------------------------------------
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;
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; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
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; Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
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; This program and the accompanying materials
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; are licensed and made available under the terms and conditions of the BSD License
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; which accompanies this distribution. The full text of the license may be found at
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@ -36,8 +36,10 @@ InternalMathRShiftU64 PROC
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xor edx, edx
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mov eax, [esp + 8]
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test cl, 32 ; Count >= 32?
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cmovz edx, eax
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cmovz eax, [esp + 4]
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jnz @F
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mov edx, eax
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mov eax, [esp + 4]
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@@:
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shrd eax, edx, cl
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shr edx, cl
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ret
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@ -1,7 +1,7 @@
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/** @file
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64-bit logical right shift function for IA-32
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Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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@ -40,8 +40,10 @@ InternalMathRShiftU64 (
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xor edx, edx
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mov eax, dword ptr [Operand + 4]
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test cl, 32
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cmovz edx, eax
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cmovz eax, dword ptr [Operand + 0]
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jnz L0
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mov edx, eax
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mov eax, dword ptr [Operand + 0]
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L0:
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shrd eax, edx, cl
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shr edx, cl
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}
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