MdePkg/BaseLib: Support IA32 processors without CMOVx

Remove use of CMOVx instruction from IA32 assembly files in BaseLib.  
This matches compiler flags for all supported C compilers.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17213 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
Michael Kinney 2015-04-27 19:38:39 +00:00 committed by mdkinney
parent 881813d7a9
commit 88a75d260c
16 changed files with 83 additions and 53 deletions

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@ -1,7 +1,7 @@
## @file
# Base Library implementation.
#
# Copyright (c) 2007 - 2014, Intel Corporation. All rights reserved.<BR>
# Copyright (c) 2007 - 2015, Intel Corporation. All rights reserved.<BR>
# Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
# Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
#
@ -21,7 +21,7 @@
MODULE_UNI_FILE = BaseLib.uni
FILE_GUID = 27d67720-ea68-48ae-93da-a3a074c90e30
MODULE_TYPE = BASE
VERSION_STRING = 1.0
VERSION_STRING = 1.1
LIBRARY_CLASS = BaseLib
#

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@ -1,6 +1,6 @@
#------------------------------------------------------------------------------
#
# Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
# Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
@ -34,8 +34,10 @@ ASM_PFX(InternalMathARShiftU64):
movl 8(%esp), %eax
cltd
testb $32, %cl
cmovz %eax, %edx
cmovz 4(%esp), %eax
jnz L0
movl %eax, %edx
movl 4(%esp), %eax
L0:
shrdl %cl, %edx, %eax
sar %cl, %edx
ret

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@ -1,6 +1,6 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
; Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
@ -36,8 +36,10 @@ InternalMathARShiftU64 PROC
mov eax, [esp + 8]
cdq
test cl, 32
cmovz edx, eax
cmovz eax, [esp + 4]
jnz @F
mov edx, eax
mov eax, [esp + 4]
@@:
shrd eax, edx, cl
sar edx, cl
ret

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@ -1,7 +1,7 @@
/** @file
64-bit arithmetic right shift function for IA-32.
Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@ -40,8 +40,10 @@ InternalMathARShiftU64 (
mov eax, dword ptr [Operand + 4]
cdq
test cl, 32
cmovz edx, eax
cmovz eax, dword ptr [Operand + 0]
jnz L0
mov edx, eax
mov eax, dword ptr [Operand + 0]
L0:
shrd eax, edx, cl
sar edx, cl
}

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@ -1,6 +1,6 @@
#------------------------------------------------------------------------------
#
# Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
# Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
@ -39,8 +39,10 @@ ASM_PFX(InternalMathLRotU64):
rorl %cl, %ebx
shldl %cl, %ebx, %eax
testb $32, %cl # Count >= 32?
cmovnz %eax, %ecx
cmovnz %edx, %eax
cmovnz %ecx, %edx
jz L0
movl %eax, %ecx
movl %edx, %eax
movl %ecx, %edx
L0:
pop %ebx
ret

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@ -1,6 +1,6 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
; Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
@ -40,9 +40,11 @@ InternalMathLRotU64 PROC USES ebx
ror ebx, cl
shld eax, ebx, cl
test cl, 32 ; Count >= 32?
cmovnz ecx, eax
cmovnz eax, edx
cmovnz edx, ecx
jz @F
mov ecx, eax
mov eax, edx
mov edx, ecx
@@:
ret
InternalMathLRotU64 ENDP

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@ -1,7 +1,7 @@
/** @file
64-bit left rotation for Ia32
Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@ -45,9 +45,11 @@ InternalMathLRotU64 (
ror ebx, cl
shld eax, ebx, cl
test cl, 32 ; Count >= 32?
cmovnz ecx, eax
cmovnz eax, edx
cmovnz edx, ecx
jz L0
mov ecx, eax
mov eax, edx
mov edx, ecx
L0:
}
}

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@ -1,6 +1,6 @@
#------------------------------------------------------------------------------
#
# Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
# Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
@ -34,8 +34,10 @@ ASM_PFX(InternalMathLShiftU64):
xorl %eax, %eax
movl 4(%esp), %edx
testb $32, %cl # Count >= 32?
cmovz %edx, %eax
cmovz 0x8(%esp), %edx
jnz L0
movl %edx, %eax
movl 0x8(%esp), %edx
L0:
shld %cl, %eax, %edx
shl %cl, %eax
ret

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@ -1,6 +1,6 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
; Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
@ -36,8 +36,10 @@ InternalMathLShiftU64 PROC
xor eax, eax
mov edx, [esp + 4]
test cl, 32 ; Count >= 32?
cmovz eax, edx
cmovz edx, [esp + 8]
jnz @F
mov eax, edx
mov edx, [esp + 8]
@@:
shld edx, eax, cl
shl eax, cl
ret

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@ -1,7 +1,7 @@
/** @file
64-bit left shift function for IA-32.
Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@ -40,8 +40,10 @@ InternalMathLShiftU64 (
xor eax, eax
mov edx, dword ptr [Operand + 0]
test cl, 32 // Count >= 32?
cmovz eax, edx
cmovz edx, dword ptr [Operand + 4]
jnz L0
mov eax, edx
mov edx, dword ptr [Operand + 4]
L0:
shld edx, eax, cl
shl eax, cl
}

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@ -1,6 +1,6 @@
#------------------------------------------------------------------------------
#
# Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
# Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
@ -39,8 +39,10 @@ ASM_PFX(InternalMathRRotU64):
roll %cl, %ebx
shrdl %cl, %ebx, %edx
testb $32, %cl # Count >= 32?
cmovnz %eax, %ecx # switch eax & edx if Count >= 32
cmovnz %edx, %eax
cmovnz %ecx, %edx
jz L0
movl %eax, %ecx # switch eax & edx if Count >= 32
movl %edx, %eax
movl %ecx, %edx
L0:
pop %ebx
ret

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@ -1,6 +1,6 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
; Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
@ -40,9 +40,11 @@ InternalMathRRotU64 PROC USES ebx
rol ebx, cl
shrd edx, ebx, cl
test cl, 32 ; Count >= 32?
cmovnz ecx, eax ; switch eax & edx if Count >= 32
cmovnz eax, edx
cmovnz edx, ecx
jz @F
mov ecx, eax ; switch eax & edx if Count >= 32
mov eax, edx
mov edx, ecx
@@:
ret
InternalMathRRotU64 ENDP

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@ -1,7 +1,7 @@
/** @file
64-bit right rotation for Ia32
Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@ -45,9 +45,11 @@ InternalMathRRotU64 (
rol ebx, cl
shrd edx, ebx, cl
test cl, 32 // Count >= 32?
cmovnz ecx, eax
cmovnz eax, edx
cmovnz edx, ecx
jz L0
mov ecx, eax
mov eax, edx
mov edx, ecx
L0:
}
}

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@ -1,6 +1,6 @@
#------------------------------------------------------------------------------
#
# Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
# Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
@ -37,8 +37,10 @@ ASM_PFX(InternalMathRShiftU64):
xorl %edx, %edx
movl 8(%esp), %eax
testb $32, %cl # Count >= 32?
cmovz %eax, %edx
cmovz 0x4(%esp), %eax
jnz L0
movl %eax, %edx
movl 0x4(%esp), %eax
L0:
shrdl %cl, %edx, %eax
shr %cl, %edx
ret

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@ -1,6 +1,6 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
; Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
@ -36,8 +36,10 @@ InternalMathRShiftU64 PROC
xor edx, edx
mov eax, [esp + 8]
test cl, 32 ; Count >= 32?
cmovz edx, eax
cmovz eax, [esp + 4]
jnz @F
mov edx, eax
mov eax, [esp + 4]
@@:
shrd eax, edx, cl
shr edx, cl
ret

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@ -1,7 +1,7 @@
/** @file
64-bit logical right shift function for IA-32
Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@ -40,8 +40,10 @@ InternalMathRShiftU64 (
xor edx, edx
mov eax, dword ptr [Operand + 4]
test cl, 32
cmovz edx, eax
cmovz eax, dword ptr [Operand + 0]
jnz L0
mov edx, eax
mov eax, dword ptr [Operand + 0]
L0:
shrd eax, edx, cl
shr edx, cl
}