mirror of https://github.com/acidanthera/audk.git
ArmPlatformPkg: Add support for ARM RTSM Versatile Express A15x1 and A15x4
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12456 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
oliviermartin
parent
da9675a241
commit
88d4f51dfc
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//
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// Copyright (c) 2011, ARM Limited. All rights reserved.
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//
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// This program and the accompanying materials
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// are licensed and made available under the terms and conditions of the BSD License
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// which accompanies this distribution. The full text of the license may be found at
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// http://opensource.org/licenses/bsd-license.php
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//
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// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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//
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//
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#include <AsmMacroIoLib.h>
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#include <Library/ArmCpuLib.h>
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#include <Library/ArmGicLib.h>
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#include <Library/PcdLib.h>
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#include <Chipset/ArmV7.h>
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.text
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.align 3
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GCC_ASM_EXPORT(ArmCpuSynchronizeWait)
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GCC_ASM_IMPORT(CArmCpuSynchronizeWait)
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// Dirty hack to get the Fixed value of GicDistributorBase
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GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdGicDistributorBase)
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// VOID
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// ArmCpuSynchronizeWait (
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// IN ARM_CPU_SYNCHRONIZE_EVENT Event
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// );
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ASM_PFX(ArmCpuSynchronizeWait):
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cmp r0, #ARM_CPU_EVENT_BOOT_MEM_INIT
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// The SCU enabled is the event to tell us the Init Boot Memory is initialized
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beq ArmWaitGicDistributorEnabled
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b CArmCpuSynchronizeWait
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// IN None
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ArmWaitGicDistributorEnabled:
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LoadConstantToReg (_gPcd_FixedAtBuild_PcdGicDistributorBase, r0)
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ldr r0, [r0]
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_WaitGicDistributor:
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ldr r1, [r0, #ARM_GIC_ICDDCR]
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cmp r1, #1
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bne _WaitGicDistributor
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bx lr
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@ -0,0 +1,50 @@
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//
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// Copyright (c) 2011, ARM Limited. All rights reserved.
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//
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// This program and the accompanying materials
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// are licensed and made available under the terms and conditions of the BSD License
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// which accompanies this distribution. The full text of the license may be found at
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// http://opensource.org/licenses/bsd-license.php
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//
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// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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//
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//
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#include <AsmMacroIoLib.h>
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#include <Library/ArmCpuLib.h>
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#include <Library/ArmGicLib.h>
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#include <Library/PcdLib.h>
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#include <Chipset/ArmV7.h>
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INCLUDE AsmMacroIoLib.inc
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EXPORT ArmCpuSynchronizeWait
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IMPORT CArmCpuSynchronizeWait
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// Dirty hack to get the Fixed value of GicDistributorBase
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IMPORT _gPcd_FixedAtBuild_PcdGicDistributorBase
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PRESERVE8
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AREA ArmCortexA15Helper, CODE, READONLY
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// VOID
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// ArmCpuSynchronizeWait (
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// IN ARM_CPU_SYNCHRONIZE_EVENT Event
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// );
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ArmCpuSynchronizeWait
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cmp r0, #ARM_CPU_EVENT_BOOT_MEM_INIT
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// The SCU enabled is the event to tell us the Init Boot Memory is initialized
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beq ArmWaitGicDistributorEnabled
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b CArmCpuSynchronizeWait
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// IN None
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ArmWaitGicDistributorEnabled
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LoadConstantToReg (_gPcd_FixedAtBuild_PcdGicDistributorBase, r0)
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ldr r0, [r0]
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_WaitGicDistributor
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ldr r1, [r0, #ARM_GIC_ICDDCR]
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cmp r1, #1
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bne _WaitGicDistributor
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bx lr
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END
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@ -0,0 +1,95 @@
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/** @file
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Copyright (c) 2011, ARM Limited. All rights reserved.
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#include <Base.h>
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#include <Library/ArmLib.h>
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#include <Library/ArmCpuLib.h>
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#include <Library/ArmGicLib.h>
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#include <Library/ArmV7ArchTimerLib.h>
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#include <Library/DebugLib.h>
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#include <Library/IoLib.h>
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#include <Library/PcdLib.h>
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#include <Chipset/ArmV7.h>
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VOID
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ArmCpuSynchronizeSignal (
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IN ARM_CPU_SYNCHRONIZE_EVENT Event
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)
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{
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if (Event == ARM_CPU_EVENT_BOOT_MEM_INIT) {
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// Do nothing, Cortex A15 secondary cores are waiting for the GIC Distributor
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// to be enabled (done by the Sec module itself) as a way to know when the Init Boot
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// Mem as been initialized
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} else {
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// Send SGI to all Secondary core to wake them up from WFI state.
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ArmGicSendSgiTo (PcdGet32(PcdGicDistributorBase), ARM_GIC_ICDSGIR_FILTER_EVERYONEELSE, 0x0E);
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}
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}
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VOID
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CArmCpuSynchronizeWait (
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IN ARM_CPU_SYNCHRONIZE_EVENT Event
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)
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{
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// Waiting for the SGI from the primary core
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ArmCallWFI ();
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// Acknowledge the interrupt and send End of Interrupt signal.
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ArmGicAcknowledgeSgiFrom (PcdGet32(PcdGicInterruptInterfaceBase), PRIMARY_CORE_ID);
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}
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VOID
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ArmCpuSetup (
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IN UINTN MpId
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)
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{
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// Check if Architectural Timer frequency is valid number (should not be 0)
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ASSERT (PcdGet32 (PcdArmArchTimerFreqInHz));
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ASSERT(ArmIsArchTimerImplemented () != 0);
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// Enable SWP instructions
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ArmEnableSWPInstruction ();
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// Enable program flow prediction, if supported.
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ArmEnableBranchPrediction ();
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// Note: System Counter frequency can only be set in Secure privileged mode,
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// if security extensions are implemented.
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ArmArchTimerSetTimerFreq (PcdGet32 (PcdArmArchTimerFreqInHz));
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/*// If MPCore then Enable the SCU
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if (ArmIsMpCore()) {
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ArmEnableScu ();
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}*/
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}
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VOID
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ArmCpuSetupSmpNonSecure (
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IN UINTN MpId
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)
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{
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//ArmSetAuxCrBit (A15_FEATURE_SMP);
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/*// Make the SCU accessible in Non Secure world
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if (IS_PRIMARY_CORE(MpId)) {
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ScuBase = ArmGetScuBaseAddress();
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// Allow NS access to SCU register
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MmioOr32 (ScuBase + A9_SCU_SACR_OFFSET, 0xf);
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// Allow NS access to Private Peripherals
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MmioOr32 (ScuBase + A9_SCU_SSACR_OFFSET, 0xfff);
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}*/
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}
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@ -0,0 +1,46 @@
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#/* @file
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# Copyright (c) 2011, ARM Limited. All rights reserved.
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#
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# This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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# which accompanies this distribution. The full text of the license may be found at
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# http://opensource.org/licenses/bsd-license.php
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#
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# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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#
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#*/
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[Defines]
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INF_VERSION = 0x00010005
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BASE_NAME = ArmCortexA15Lib
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FILE_GUID = 501b1c8f-21d5-4ef5-a565-435b7f0aae2d
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MODULE_TYPE = BASE
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VERSION_STRING = 1.0
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LIBRARY_CLASS = ArmCpuLib
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[Packages]
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MdePkg/MdePkg.dec
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ArmPkg/ArmPkg.dec
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[LibraryClasses]
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ArmLib
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ArmGicSecLib
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IoLib
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PcdLib
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[Sources.common]
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ArmCortexA15Lib.c
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ArmCortexA15Helper.asm | RVCT
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ArmCortexA15Helper.S | GCC
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[FeaturePcd]
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[FixedPcd]
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gArmTokenSpaceGuid.PcdArmPrimaryCoreMask
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gArmTokenSpaceGuid.PcdArmPrimaryCore
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gArmTokenSpaceGuid.PcdGicDistributorBase
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gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase
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gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz
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#
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# Copyright (c) 2011, ARM Limited. All rights reserved.
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#
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# This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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# which accompanies this distribution. The full text of the license may be found at
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# http://opensource.org/licenses/bsd-license.php
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#
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# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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#
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#
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################################################################################
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#
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# Defines Section - statements that will be processed to create a Makefile.
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#
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################################################################################
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[Defines]
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PLATFORM_NAME = ArmVExpressPkg-RTSM-A15
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PLATFORM_GUID = 1665b5b1-529d-4ba1-bd51-c3c9b29a2274
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PLATFORM_VERSION = 0.1
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DSC_SPECIFICATION = 0x00010005
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OUTPUT_DIRECTORY = Build/ArmVExpress-RTSM-A15
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SUPPORTED_ARCHITECTURES = ARM
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BUILD_TARGETS = DEBUG|RELEASE
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SKUID_IDENTIFIER = DEFAULT
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FLASH_DEFINITION = ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-RTSM-A15.fdf
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!include ArmPlatformPkg/ArmVExpressPkg/ArmVExpress.dsc.inc
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[LibraryClasses.common]
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ArmLib|ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.inf
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ArmCpuLib|ArmPkg/Drivers/ArmCpuLib/ArmCortexA15Lib/ArmCortexA15Lib.inf
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ArmPlatformLib|ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLib.inf
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ArmPlatformSysConfigLib|ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSysConfigLib/ArmVExpressSysConfigLib.inf
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NorFlashPlatformLib|ArmPlatformPkg/ArmVExpressPkg/Library/NorFlashArmVExpressLib/NorFlashArmVExpressLib.inf
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LcdPlatformLib|ArmPlatformPkg/ArmVExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpressLib.inf
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#DebugAgentTimerLib|ArmPlatformPkg/ArmVExpressPkg/Library/DebugAgentTimerLib/DebugAgentTimerLib.inf
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# ARM PL390 General Interrupt Driver in Secure and Non-secure
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ArmGicSecLib|ArmPkg/Drivers/PL390Gic/PL390GicSecLib.inf
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ArmGicLib|ArmPkg/Drivers/PL390Gic/PL390GicLib.inf
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TimerLib|ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.inf
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[LibraryClasses.common.SEC]
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ArmLib|ArmPkg/Library/ArmLib/ArmV7/ArmV7LibSec.inf
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ArmPlatformLib|ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressSecLib.inf
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[BuildOptions]
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RVCT:*_*_ARM_PLATFORM_FLAGS == --cpu Cortex-A15 -I$(WORKSPACE)/ArmPlatformPkg/ArmVExpressPkg/Include -I$(WORKSPACE)/ArmPlatformPkg/ArmVExpressPkg/Include/Platform/RTSM
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GCC:*_*_ARM_PLATFORM_FLAGS == -mcpu=cortex-a15 -mfpu=neon -I$(WORKSPACE)/ArmPlatformPkg/ArmVExpressPkg/Include -I$(WORKSPACE)/ArmPlatformPkg/ArmVExpressPkg/Include/Platform/RTSM
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XCODE:*_*_ARM_PLATFORM_FLAGS = -I$(WORKSPACE)/ArmPlatformPkg/ArmVExpressPkg/Include -I$(WORKSPACE)/ArmPlatformPkg/ArmVExpressPkg/Include/Platform/RTSM
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################################################################################
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#
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# Pcd Section - list of all EDK II PCD Entries defined by this Platform
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#
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################################################################################
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[PcdsFeatureFlag.common]
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!ifdef $(EDK2_SKIP_PEICORE)
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gArmPlatformTokenSpaceGuid.PcdSystemMemoryInitializeInSec|TRUE
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gArmPlatformTokenSpaceGuid.PcdSendSgiToBringUpSecondaryCores|TRUE
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!endif
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## If TRUE, Graphics Output Protocol will be installed on virtual handle created by ConsplitterDxe.
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# It could be set FALSE to save size.
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gEfiMdeModulePkgTokenSpaceGuid.PcdConOutGopSupport|TRUE
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[PcdsFixedAtBuild.common]
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gArmPlatformTokenSpaceGuid.PcdFirmwareVendor|"ARM Versatile Express"
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gEmbeddedTokenSpaceGuid.PcdEmbeddedPrompt|"ArmVExpress-RTSM"
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#
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# NV Storage PCDs. Use base of 0x0C000000 for NOR1
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#
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gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|0x0FFC0000
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gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize|0x00010000
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gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|0x0FFD0000
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gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize|0x00010000
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gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|0x0FFE0000
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gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize|0x00010000
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gArmTokenSpaceGuid.PcdVFPEnabled|1
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# Stacks for MPCores in Secure World
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gArmPlatformTokenSpaceGuid.PcdCPUCoresSecStackBase|0x2E009000
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gArmPlatformTokenSpaceGuid.PcdCPUCoreSecPrimaryStackSize|0x1000
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# Stacks for MPCores in Monitor Mode
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gArmPlatformTokenSpaceGuid.PcdCPUCoresSecMonStackBase|0x2E008000
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gArmPlatformTokenSpaceGuid.PcdCPUCoreSecMonStackSize|0x100
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# Stacks for MPCores in Normal World
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gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase|0x2E000000
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gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize|0x4000
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# System Memory (1GB)
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gArmTokenSpaceGuid.PcdSystemMemoryBase|0x80000000
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gArmTokenSpaceGuid.PcdSystemMemorySize|0x40000000
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# Size of the region used by UEFI in permanent memory (Reserved 64MB)
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gArmPlatformTokenSpaceGuid.PcdSystemMemoryUefiRegionSize|0x04000000
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#
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# ARM Pcds
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#
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gArmTokenSpaceGuid.PcdArmUncachedMemoryMask|0x0000000040000000
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#
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# ARM PrimeCell
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#
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## SP805 Watchdog - Motherboard Watchdog
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gArmPlatformTokenSpaceGuid.PcdSP805WatchdogBase|0x1C0F0000
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## PL011 - Serial Terminal
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gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x1c090000
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gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate|38400
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gEfiMdePkgTokenSpaceGuid.PcdUartDefaultDataBits|8
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gEfiMdePkgTokenSpaceGuid.PcdUartDefaultParity|1
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gEfiMdePkgTokenSpaceGuid.PcdUartDefaultStopBits|1
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gArmPlatformTokenSpaceGuid.PcdUartDefaultReceiveFifoDepth|32
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gArmPlatformTokenSpaceGuid.PcdUartDefaultTimeout|1000000
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## PL031 RealTimeClock
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gArmPlatformTokenSpaceGuid.PcdPL031RtcBase|0x1C170000
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## PL111 Versatile Express Motherboard controller
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gArmPlatformTokenSpaceGuid.PcdPL111LcdBase|0x1C1F0000
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#
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# ARM PL390 General Interrupt Controller
|
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#
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gArmTokenSpaceGuid.PcdGicDistributorBase|0x2C001000
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gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0x2C002000
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#
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# ARM OS Loader
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#
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# Versatile Express machine type (ARM VERSATILE EXPRESS = 2272) required for ARM Linux:
|
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gArmTokenSpaceGuid.PcdArmMachineType|2272
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gArmPlatformTokenSpaceGuid.PcdDefaultBootDescription|L"NorFlash"
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gArmPlatformTokenSpaceGuid.PcdDefaultBootDevicePath|L"VenHw(1F15DA3C-37FF-4070-B471-BB4AF12A724A)/MemoryMapped(0x0,0x46000000,0x46400000)"
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gArmPlatformTokenSpaceGuid.PcdDefaultBootArgument|""
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gArmPlatformTokenSpaceGuid.PcdDefaultBootType|1
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# Use the serial console (ConIn & ConOut) and the Graphic driver (ConOut)
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gArmPlatformTokenSpaceGuid.PcdDefaultConOutPaths|L"VenHw(D3987D4B-971A-435F-8CAF-4967EB627241)/Uart(38400,8,N,1)/VenPcAnsi();VenHw(407B4008-BF5B-11DF-9547-CF16E0D72085)"
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gArmPlatformTokenSpaceGuid.PcdDefaultConInPaths|L"VenHw(D3987D4B-971A-435F-8CAF-4967EB627241)/Uart(38400,8,N,1)/VenPcAnsi()"
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|
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#
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# ARM L2x0 PCDs
|
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#
|
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gArmTokenSpaceGuid.PcdL2x0ControllerBase|0x1E00A000
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|
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#
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# ARM Architectual Timer Frequency
|
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#
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gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz|60000000
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################################################################################
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#
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# Components Section - list of all EDK II Modules needed by this Platform
|
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#
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################################################################################
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[Components.common]
|
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|
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#
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# SEC
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#
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ArmPlatformPkg/Sec/Sec.inf
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|
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#
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# PEI Phase modules
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#
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!ifdef $(EDK2_SKIP_PEICORE)
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ArmPlatformPkg/PrePi/PeiUniCore.inf {
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<LibraryClasses>
|
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ArmLib|ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.inf
|
||||
ArmPlatformLib|ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLib.inf
|
||||
ArmPlatformGlobalVariableLib|ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/PrePi/PrePiArmPlatformGlobalVariableLib.inf
|
||||
}
|
||||
!else
|
||||
ArmPlatformPkg/PrePeiCore/PrePeiCoreUniCore.inf {
|
||||
<LibraryClasses>
|
||||
ArmPlatformGlobalVariableLib|ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Pei/PeiArmPlatformGlobalVariableLib.inf
|
||||
}
|
||||
MdeModulePkg/Core/Pei/PeiMain.inf
|
||||
MdeModulePkg/Universal/PCD/Pei/Pcd.inf {
|
||||
<LibraryClasses>
|
||||
PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
|
||||
}
|
||||
ArmPlatformPkg/PlatformPei/PlatformPeim.inf
|
||||
ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf
|
||||
ArmPkg/Drivers/CpuPei/CpuPei.inf
|
||||
IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf
|
||||
Nt32Pkg/BootModePei/BootModePei.inf
|
||||
MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
|
||||
MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf {
|
||||
<LibraryClasses>
|
||||
NULL|IntelFrameworkModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf
|
||||
}
|
||||
!endif
|
||||
|
||||
#
|
||||
# DXE
|
||||
#
|
||||
MdeModulePkg/Core/Dxe/DxeMain.inf {
|
||||
<LibraryClasses>
|
||||
PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
|
||||
NULL|MdeModulePkg/Library/DxeCrc32GuidedSectionExtractLib/DxeCrc32GuidedSectionExtractLib.inf
|
||||
}
|
||||
|
||||
#
|
||||
# Architectural Protocols
|
||||
#
|
||||
ArmPkg/Drivers/CpuDxe/CpuDxe.inf
|
||||
MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
|
||||
MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
|
||||
MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
|
||||
MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf
|
||||
MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
|
||||
MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
|
||||
EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf
|
||||
EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf
|
||||
EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
|
||||
|
||||
MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
|
||||
MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
|
||||
MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
|
||||
MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
|
||||
EmbeddedPkg/SerialDxe/SerialDxe.inf
|
||||
|
||||
MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
|
||||
|
||||
ArmPkg/Drivers/PL390Gic/PL390GicDxe.inf
|
||||
ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.inf
|
||||
ArmPkg/Drivers/TimerDxe/TimerDxe.inf
|
||||
ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/PL111LcdGraphicsOutputDxe.inf
|
||||
ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf
|
||||
|
||||
#
|
||||
# Semi-hosting filesystem
|
||||
#
|
||||
ArmPkg/Filesystem/SemihostFs/SemihostFs.inf
|
||||
|
||||
#
|
||||
# Multimedia Card Interface
|
||||
#
|
||||
EmbeddedPkg/Universal/MmcDxe/MmcDxe.inf
|
||||
ArmPlatformPkg/Drivers/PL180MciDxe/PL180MciDxe.inf
|
||||
|
||||
#
|
||||
# FAT filesystem + GPT/MBR partitioning
|
||||
#
|
||||
MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
|
||||
MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
|
||||
FatPkg/EnhancedFatDxe/Fat.inf
|
||||
MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
|
||||
|
||||
#
|
||||
# Application
|
||||
#
|
||||
EmbeddedPkg/Ebl/Ebl.inf
|
||||
|
||||
!ifdef $(EDK2_ARMVE_UEFI2_SHELL)
|
||||
ShellPkg/Application/Shell/Shell.inf {
|
||||
<LibraryClasses>
|
||||
ShellCommandLib|ShellPkg/Library/UefiShellCommandLib/UefiShellCommandLib.inf
|
||||
NULL|ShellPkg/Library/UefiShellLevel2CommandsLib/UefiShellLevel2CommandsLib.inf
|
||||
NULL|ShellPkg/Library/UefiShellLevel1CommandsLib/UefiShellLevel1CommandsLib.inf
|
||||
NULL|ShellPkg/Library/UefiShellLevel3CommandsLib/UefiShellLevel3CommandsLib.inf
|
||||
NULL|ShellPkg/Library/UefiShellDriver1CommandsLib/UefiShellDriver1CommandsLib.inf
|
||||
NULL|ShellPkg/Library/UefiShellInstall1CommandsLib/UefiShellInstall1CommandsLib.inf
|
||||
NULL|ShellPkg/Library/UefiShellDebug1CommandsLib/UefiShellDebug1CommandsLib.inf
|
||||
NULL|ShellPkg/Library/UefiShellNetwork1CommandsLib/UefiShellNetwork1CommandsLib.inf
|
||||
HandleParsingLib|ShellPkg/Library/UefiHandleParsingLib/UefiHandleParsingLib.inf
|
||||
FileHandleLib|ShellPkg/Library/UefiFileHandleLib/UefiFileHandleLib.inf
|
||||
ShellLib|ShellPkg/Library/UefiShellLib/UefiShellLib.inf
|
||||
SortLib|ShellPkg/Library/UefiSortLib/UefiSortLib.inf
|
||||
|
||||
<PcdsFixedAtBuild>
|
||||
gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0xFF
|
||||
gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize|FALSE
|
||||
gEfiMdePkgTokenSpaceGuid.PcdUefiLibMaxPrintBufferSize|16000
|
||||
}
|
||||
!endif
|
||||
|
||||
#
|
||||
# Bds
|
||||
#
|
||||
MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
|
||||
ArmPlatformPkg/Bds/Bds.inf
|
||||
|
|
@ -0,0 +1,301 @@
|
|||
# FLASH layout file for ARM VE.
|
||||
#
|
||||
# Copyright (c) 2011, ARM Limited. All rights reserved.
|
||||
#
|
||||
# This program and the accompanying materials
|
||||
# are licensed and made available under the terms and conditions of the BSD License
|
||||
# which accompanies this distribution. The full text of the license may be found at
|
||||
# http://opensource.org/licenses/bsd-license.php
|
||||
#
|
||||
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
#
|
||||
|
||||
################################################################################
|
||||
#
|
||||
# FD Section
|
||||
# The [FD] Section is made up of the definition statements and a
|
||||
# description of what goes into the Flash Device Image. Each FD section
|
||||
# defines one flash "device" image. A flash device image may be one of
|
||||
# the following: Removable media bootable image (like a boot floppy
|
||||
# image,) an Option ROM image (that would be "flashed" into an add-in
|
||||
# card,) a System "Flash" image (that would be burned into a system's
|
||||
# flash) or an Update ("Capsule") image that will be used to update and
|
||||
# existing system flash.
|
||||
#
|
||||
################################################################################
|
||||
|
||||
[FD.RTSM_VE_Cortex-A15_EFI]
|
||||
BaseAddress = 0x08000000|gArmTokenSpaceGuid.PcdFdBaseAddress # The base address of the Firmware in NOR Flash.
|
||||
Size = 0x00280000|gArmTokenSpaceGuid.PcdFdSize # The size in bytes of the FLASH Device
|
||||
ErasePolarity = 1
|
||||
|
||||
# This one is tricky, it must be: BlockSize * NumBlocks = Size
|
||||
BlockSize = 0x00001000
|
||||
NumBlocks = 0x280
|
||||
|
||||
################################################################################
|
||||
#
|
||||
# Following are lists of FD Region layout which correspond to the locations of different
|
||||
# images within the flash device.
|
||||
#
|
||||
# Regions must be defined in ascending order and may not overlap.
|
||||
#
|
||||
# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by
|
||||
# the pipe "|" character, followed by the size of the region, also in hex with the leading
|
||||
# "0x" characters. Like:
|
||||
# Offset|Size
|
||||
# PcdOffsetCName|PcdSizeCName
|
||||
# RegionType <FV, DATA, or FILE>
|
||||
#
|
||||
################################################################################
|
||||
|
||||
0x00000000|0x00080000
|
||||
gArmTokenSpaceGuid.PcdSecureFvBaseAddress|gArmTokenSpaceGuid.PcdSecureFvBaseSize
|
||||
FV = FVMAIN_SEC
|
||||
|
||||
0x00080000|0x00280000
|
||||
gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvBaseSize
|
||||
FV = FVMAIN_COMPACT
|
||||
|
||||
|
||||
################################################################################
|
||||
#
|
||||
# FV Section
|
||||
#
|
||||
# [FV] section is used to define what components or modules are placed within a flash
|
||||
# device file. This section also defines order the components and modules are positioned
|
||||
# within the image. The [FV] section consists of define statements, set statements and
|
||||
# module statements.
|
||||
#
|
||||
################################################################################
|
||||
|
||||
[FV.FVMAIN_SEC]
|
||||
FvAlignment = 8
|
||||
ERASE_POLARITY = 1
|
||||
MEMORY_MAPPED = TRUE
|
||||
STICKY_WRITE = TRUE
|
||||
LOCK_CAP = TRUE
|
||||
LOCK_STATUS = TRUE
|
||||
WRITE_DISABLED_CAP = TRUE
|
||||
WRITE_ENABLED_CAP = TRUE
|
||||
WRITE_STATUS = TRUE
|
||||
WRITE_LOCK_CAP = TRUE
|
||||
WRITE_LOCK_STATUS = TRUE
|
||||
READ_DISABLED_CAP = TRUE
|
||||
READ_ENABLED_CAP = TRUE
|
||||
READ_STATUS = TRUE
|
||||
READ_LOCK_CAP = TRUE
|
||||
READ_LOCK_STATUS = TRUE
|
||||
|
||||
INF ArmPlatformPkg/Sec/Sec.inf
|
||||
|
||||
|
||||
[FV.FvMain]
|
||||
BlockSize = 0x40
|
||||
NumBlocks = 0 # This FV gets compressed so make it just big enough
|
||||
FvAlignment = 8 # FV alignment and FV attributes setting.
|
||||
ERASE_POLARITY = 1
|
||||
MEMORY_MAPPED = TRUE
|
||||
STICKY_WRITE = TRUE
|
||||
LOCK_CAP = TRUE
|
||||
LOCK_STATUS = TRUE
|
||||
WRITE_DISABLED_CAP = TRUE
|
||||
WRITE_ENABLED_CAP = TRUE
|
||||
WRITE_STATUS = TRUE
|
||||
WRITE_LOCK_CAP = TRUE
|
||||
WRITE_LOCK_STATUS = TRUE
|
||||
READ_DISABLED_CAP = TRUE
|
||||
READ_ENABLED_CAP = TRUE
|
||||
READ_STATUS = TRUE
|
||||
READ_LOCK_CAP = TRUE
|
||||
READ_LOCK_STATUS = TRUE
|
||||
|
||||
INF MdeModulePkg/Core/Dxe/DxeMain.inf
|
||||
|
||||
#
|
||||
# PI DXE Drivers producing Architectural Protocols (EFI Services)
|
||||
#
|
||||
INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf
|
||||
INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
|
||||
INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
|
||||
INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
|
||||
INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf
|
||||
INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
|
||||
INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
|
||||
INF EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf
|
||||
INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf
|
||||
INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
|
||||
|
||||
INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
|
||||
|
||||
#
|
||||
# Multiple Console IO support
|
||||
#
|
||||
INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
|
||||
INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
|
||||
INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
|
||||
INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
|
||||
INF EmbeddedPkg/SerialDxe/SerialDxe.inf
|
||||
|
||||
INF ArmPkg/Drivers/PL390Gic/PL390GicDxe.inf
|
||||
INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf
|
||||
INF ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.inf
|
||||
INF ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/PL111LcdGraphicsOutputDxe.inf
|
||||
INF ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf
|
||||
|
||||
#
|
||||
# Semi-hosting filesystem
|
||||
#
|
||||
INF ArmPkg/Filesystem/SemihostFs/SemihostFs.inf
|
||||
|
||||
#
|
||||
# FAT filesystem + GPT/MBR partitioning
|
||||
#
|
||||
INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
|
||||
INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
|
||||
INF FatPkg/EnhancedFatDxe/Fat.inf
|
||||
INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
|
||||
|
||||
#
|
||||
# UEFI application (Shell Embedded Boot Loader)
|
||||
#
|
||||
INF EmbeddedPkg/Ebl/Ebl.inf
|
||||
|
||||
!if $(EDK2_ARMVE_UEFI2_SHELL) == 1
|
||||
INF ShellPkg/Application/Shell/Shell.inf
|
||||
!endif
|
||||
|
||||
#
|
||||
# Bds
|
||||
#
|
||||
INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
|
||||
INF ArmPlatformPkg/Bds/Bds.inf
|
||||
|
||||
|
||||
[FV.FVMAIN_COMPACT]
|
||||
FvAlignment = 8
|
||||
ERASE_POLARITY = 1
|
||||
MEMORY_MAPPED = TRUE
|
||||
STICKY_WRITE = TRUE
|
||||
LOCK_CAP = TRUE
|
||||
LOCK_STATUS = TRUE
|
||||
WRITE_DISABLED_CAP = TRUE
|
||||
WRITE_ENABLED_CAP = TRUE
|
||||
WRITE_STATUS = TRUE
|
||||
WRITE_LOCK_CAP = TRUE
|
||||
WRITE_LOCK_STATUS = TRUE
|
||||
READ_DISABLED_CAP = TRUE
|
||||
READ_ENABLED_CAP = TRUE
|
||||
READ_STATUS = TRUE
|
||||
READ_LOCK_CAP = TRUE
|
||||
READ_LOCK_STATUS = TRUE
|
||||
|
||||
!if $(EDK2_SKIP_PEICORE) == 1
|
||||
INF ArmPlatformPkg/PrePi/PeiUniCore.inf
|
||||
!else
|
||||
INF ArmPlatformPkg/PrePeiCore/PrePeiCoreUniCore.inf
|
||||
INF MdeModulePkg/Core/Pei/PeiMain.inf
|
||||
INF ArmPlatformPkg/PlatformPei/PlatformPeim.inf
|
||||
INF ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf
|
||||
INF ArmPkg/Drivers/CpuPei/CpuPei.inf
|
||||
INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
|
||||
INF IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf
|
||||
INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
|
||||
INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
|
||||
!endif
|
||||
|
||||
FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
|
||||
SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
|
||||
SECTION FV_IMAGE = FVMAIN
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
################################################################################
|
||||
#
|
||||
# Rules are use with the [FV] section's module INF type to define
|
||||
# how an FFS file is created for a given INF file. The following Rule are the default
|
||||
# rules for the different module type. User can add the customized rules to define the
|
||||
# content of the FFS file.
|
||||
#
|
||||
################################################################################
|
||||
|
||||
|
||||
############################################################################
|
||||
# Example of a DXE_DRIVER FFS file with a Checksum encapsulation section #
|
||||
############################################################################
|
||||
#
|
||||
#[Rule.Common.DXE_DRIVER]
|
||||
# FILE DRIVER = $(NAMED_GUID) {
|
||||
# DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
|
||||
# COMPRESS PI_STD {
|
||||
# GUIDED {
|
||||
# PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
|
||||
# UI STRING="$(MODULE_NAME)" Optional
|
||||
# VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
|
||||
# }
|
||||
# }
|
||||
# }
|
||||
#
|
||||
############################################################################
|
||||
|
||||
[Rule.Common.SEC]
|
||||
FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {
|
||||
TE TE Align = 32 $(INF_OUTPUT)/$(MODULE_NAME).efi
|
||||
}
|
||||
|
||||
[Rule.Common.PEI_CORE]
|
||||
FILE PEI_CORE = $(NAMED_GUID) {
|
||||
TE TE $(INF_OUTPUT)/$(MODULE_NAME).efi
|
||||
UI STRING ="$(MODULE_NAME)" Optional
|
||||
}
|
||||
|
||||
[Rule.Common.PEIM]
|
||||
FILE PEIM = $(NAMED_GUID) {
|
||||
PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
|
||||
TE TE $(INF_OUTPUT)/$(MODULE_NAME).efi
|
||||
UI STRING="$(MODULE_NAME)" Optional
|
||||
}
|
||||
|
||||
[Rule.Common.PEIM.TIANOCOMPRESSED]
|
||||
FILE PEIM = $(NAMED_GUID) DEBUG_MYTOOLS_IA32 {
|
||||
PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
|
||||
GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {
|
||||
PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
|
||||
UI STRING="$(MODULE_NAME)" Optional
|
||||
}
|
||||
}
|
||||
|
||||
[Rule.Common.DXE_CORE]
|
||||
FILE DXE_CORE = $(NAMED_GUID) {
|
||||
PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
|
||||
UI STRING="$(MODULE_NAME)" Optional
|
||||
}
|
||||
|
||||
[Rule.Common.UEFI_DRIVER]
|
||||
FILE DRIVER = $(NAMED_GUID) {
|
||||
DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
|
||||
PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
|
||||
UI STRING="$(MODULE_NAME)" Optional
|
||||
}
|
||||
|
||||
[Rule.Common.DXE_DRIVER]
|
||||
FILE DRIVER = $(NAMED_GUID) {
|
||||
DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
|
||||
PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
|
||||
UI STRING="$(MODULE_NAME)" Optional
|
||||
}
|
||||
|
||||
[Rule.Common.DXE_RUNTIME_DRIVER]
|
||||
FILE DRIVER = $(NAMED_GUID) {
|
||||
DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
|
||||
PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
|
||||
UI STRING="$(MODULE_NAME)" Optional
|
||||
}
|
||||
|
||||
[Rule.Common.UEFI_APPLICATION]
|
||||
FILE APPLICATION = $(NAMED_GUID) {
|
||||
UI STRING ="$(MODULE_NAME)" Optional
|
||||
PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
|
||||
}
|
||||
|
|
@ -0,0 +1,301 @@
|
|||
#
|
||||
# Copyright (c) 2011, ARM Limited. All rights reserved.
|
||||
#
|
||||
# This program and the accompanying materials
|
||||
# are licensed and made available under the terms and conditions of the BSD License
|
||||
# which accompanies this distribution. The full text of the license may be found at
|
||||
# http://opensource.org/licenses/bsd-license.php
|
||||
#
|
||||
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
#
|
||||
#
|
||||
|
||||
################################################################################
|
||||
#
|
||||
# Defines Section - statements that will be processed to create a Makefile.
|
||||
#
|
||||
################################################################################
|
||||
[Defines]
|
||||
PLATFORM_NAME = ArmVExpressPkg-RTSM-A15_MPCore
|
||||
PLATFORM_GUID = 3a91a0f8-3af4-409d-a71d-a199dc134357
|
||||
PLATFORM_VERSION = 0.1
|
||||
DSC_SPECIFICATION = 0x00010005
|
||||
OUTPUT_DIRECTORY = Build/ArmVExpress-RTSM-A15_MPCore
|
||||
SUPPORTED_ARCHITECTURES = ARM
|
||||
BUILD_TARGETS = DEBUG|RELEASE
|
||||
SKUID_IDENTIFIER = DEFAULT
|
||||
FLASH_DEFINITION = ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-RTSM-A15_MPCore.fdf
|
||||
|
||||
!include ArmPlatformPkg/ArmVExpressPkg/ArmVExpress.dsc.inc
|
||||
|
||||
[LibraryClasses.common]
|
||||
ArmLib|ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.inf
|
||||
ArmCpuLib|ArmPkg/Drivers/ArmCpuLib/ArmCortexA15Lib/ArmCortexA15Lib.inf
|
||||
ArmPlatformLib|ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLib.inf
|
||||
|
||||
ArmPlatformSysConfigLib|ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSysConfigLib/ArmVExpressSysConfigLib.inf
|
||||
NorFlashPlatformLib|ArmPlatformPkg/ArmVExpressPkg/Library/NorFlashArmVExpressLib/NorFlashArmVExpressLib.inf
|
||||
LcdPlatformLib|ArmPlatformPkg/ArmVExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpressLib.inf
|
||||
|
||||
#DebugAgentTimerLib|ArmPlatformPkg/ArmVExpressPkg/Library/DebugAgentTimerLib/DebugAgentTimerLib.inf
|
||||
|
||||
# ARM PL390 General Interrupt Driver in Secure and Non-secure
|
||||
ArmGicSecLib|ArmPkg/Drivers/PL390Gic/PL390GicSecLib.inf
|
||||
ArmGicLib|ArmPkg/Drivers/PL390Gic/PL390GicLib.inf
|
||||
|
||||
TimerLib|ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.inf
|
||||
|
||||
[LibraryClasses.common.SEC]
|
||||
ArmLib|ArmPkg/Library/ArmLib/ArmV7/ArmV7LibSec.inf
|
||||
ArmPlatformLib|ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressSecLib.inf
|
||||
[BuildOptions]
|
||||
RVCT:*_*_ARM_PLATFORM_FLAGS == --cpu Cortex-A15 -I$(WORKSPACE)/ArmPlatformPkg/ArmVExpressPkg/Include -I$(WORKSPACE)/ArmPlatformPkg/ArmVExpressPkg/Include/Platform/RTSM
|
||||
|
||||
GCC:*_*_ARM_PLATFORM_FLAGS == -mcpu=cortex-a15 -mfpu=neon -I$(WORKSPACE)/ArmPlatformPkg/ArmVExpressPkg/Include -I$(WORKSPACE)/ArmPlatformPkg/ArmVExpressPkg/Include/Platform/RTSM
|
||||
|
||||
XCODE:*_*_ARM_PLATFORM_FLAGS = -I$(WORKSPACE)/ArmPlatformPkg/ArmVExpressPkg/Include -I$(WORKSPACE)/ArmPlatformPkg/ArmVExpressPkg/Include/Platform/RTSM
|
||||
|
||||
################################################################################
|
||||
#
|
||||
# Pcd Section - list of all EDK II PCD Entries defined by this Platform
|
||||
#
|
||||
################################################################################
|
||||
|
||||
[PcdsFeatureFlag.common]
|
||||
!ifdef $(EDK2_SKIP_PEICORE)
|
||||
gArmPlatformTokenSpaceGuid.PcdSystemMemoryInitializeInSec|TRUE
|
||||
gArmPlatformTokenSpaceGuid.PcdSendSgiToBringUpSecondaryCores|TRUE
|
||||
!endif
|
||||
|
||||
## If TRUE, Graphics Output Protocol will be installed on virtual handle created by ConsplitterDxe.
|
||||
# It could be set FALSE to save size.
|
||||
gEfiMdeModulePkgTokenSpaceGuid.PcdConOutGopSupport|TRUE
|
||||
|
||||
[PcdsFixedAtBuild.common]
|
||||
gArmPlatformTokenSpaceGuid.PcdFirmwareVendor|"ARM Versatile Express"
|
||||
|
||||
gEmbeddedTokenSpaceGuid.PcdEmbeddedPrompt|"ArmVExpress-RTSM"
|
||||
|
||||
#
|
||||
# NV Storage PCDs. Use base of 0x0C000000 for NOR1
|
||||
#
|
||||
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|0x0FFC0000
|
||||
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize|0x00010000
|
||||
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|0x0FFD0000
|
||||
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize|0x00010000
|
||||
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|0x0FFE0000
|
||||
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize|0x00010000
|
||||
|
||||
gArmTokenSpaceGuid.PcdVFPEnabled|1
|
||||
|
||||
# Stacks for MPCores in Secure World
|
||||
gArmPlatformTokenSpaceGuid.PcdCPUCoresSecStackBase|0x2E009000
|
||||
gArmPlatformTokenSpaceGuid.PcdCPUCoreSecPrimaryStackSize|0x1000
|
||||
|
||||
# Stacks for MPCores in Monitor Mode
|
||||
gArmPlatformTokenSpaceGuid.PcdCPUCoresSecMonStackBase|0x2E008000
|
||||
gArmPlatformTokenSpaceGuid.PcdCPUCoreSecMonStackSize|0x100
|
||||
|
||||
# Stacks for MPCores in Normal World
|
||||
gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase|0x2E000000
|
||||
gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize|0x4000
|
||||
|
||||
# System Memory (1GB)
|
||||
gArmTokenSpaceGuid.PcdSystemMemoryBase|0x80000000
|
||||
gArmTokenSpaceGuid.PcdSystemMemorySize|0x40000000
|
||||
|
||||
# Size of the region used by UEFI in permanent memory (Reserved 64MB)
|
||||
gArmPlatformTokenSpaceGuid.PcdSystemMemoryUefiRegionSize|0x04000000
|
||||
|
||||
#
|
||||
# ARM Pcds
|
||||
#
|
||||
gArmTokenSpaceGuid.PcdArmUncachedMemoryMask|0x0000000040000000
|
||||
|
||||
#
|
||||
# ARM PrimeCell
|
||||
#
|
||||
|
||||
## SP805 Watchdog - Motherboard Watchdog
|
||||
gArmPlatformTokenSpaceGuid.PcdSP805WatchdogBase|0x1C0F0000
|
||||
|
||||
## PL011 - Serial Terminal
|
||||
gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x1c090000
|
||||
gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate|38400
|
||||
gEfiMdePkgTokenSpaceGuid.PcdUartDefaultDataBits|8
|
||||
gEfiMdePkgTokenSpaceGuid.PcdUartDefaultParity|1
|
||||
gEfiMdePkgTokenSpaceGuid.PcdUartDefaultStopBits|1
|
||||
gArmPlatformTokenSpaceGuid.PcdUartDefaultReceiveFifoDepth|32
|
||||
gArmPlatformTokenSpaceGuid.PcdUartDefaultTimeout|1000000
|
||||
|
||||
## PL031 RealTimeClock
|
||||
gArmPlatformTokenSpaceGuid.PcdPL031RtcBase|0x1C170000
|
||||
|
||||
## PL111 Versatile Express Motherboard controller
|
||||
gArmPlatformTokenSpaceGuid.PcdPL111LcdBase|0x1C1F0000
|
||||
|
||||
#
|
||||
# ARM PL390 General Interrupt Controller
|
||||
#
|
||||
gArmTokenSpaceGuid.PcdGicDistributorBase|0x2C001000
|
||||
gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0x2C002000
|
||||
|
||||
#
|
||||
# ARM OS Loader
|
||||
#
|
||||
# Versatile Express machine type (ARM VERSATILE EXPRESS = 2272) required for ARM Linux:
|
||||
gArmTokenSpaceGuid.PcdArmMachineType|2272
|
||||
gArmPlatformTokenSpaceGuid.PcdDefaultBootDescription|L"NorFlash"
|
||||
gArmPlatformTokenSpaceGuid.PcdDefaultBootDevicePath|L"VenHw(1F15DA3C-37FF-4070-B471-BB4AF12A724A)/MemoryMapped(0x0,0x46000000,0x46400000)"
|
||||
gArmPlatformTokenSpaceGuid.PcdDefaultBootArgument|""
|
||||
gArmPlatformTokenSpaceGuid.PcdDefaultBootType|1
|
||||
|
||||
# Use the serial console (ConIn & ConOut) and the Graphic driver (ConOut)
|
||||
gArmPlatformTokenSpaceGuid.PcdDefaultConOutPaths|L"VenHw(D3987D4B-971A-435F-8CAF-4967EB627241)/Uart(38400,8,N,1)/VenPcAnsi();VenHw(407B4008-BF5B-11DF-9547-CF16E0D72085)"
|
||||
gArmPlatformTokenSpaceGuid.PcdDefaultConInPaths|L"VenHw(D3987D4B-971A-435F-8CAF-4967EB627241)/Uart(38400,8,N,1)/VenPcAnsi()"
|
||||
|
||||
#
|
||||
# ARM L2x0 PCDs
|
||||
#
|
||||
gArmTokenSpaceGuid.PcdL2x0ControllerBase|0x1E00A000
|
||||
|
||||
#
|
||||
# ARM Architectual Timer Frequency
|
||||
#
|
||||
gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz|60000000
|
||||
|
||||
|
||||
################################################################################
|
||||
#
|
||||
# Components Section - list of all EDK II Modules needed by this Platform
|
||||
#
|
||||
################################################################################
|
||||
[Components.common]
|
||||
|
||||
#
|
||||
# SEC
|
||||
#
|
||||
ArmPlatformPkg/Sec/Sec.inf
|
||||
|
||||
#
|
||||
# PEI Phase modules
|
||||
#
|
||||
!ifdef $(EDK2_SKIP_PEICORE)
|
||||
ArmPlatformPkg/PrePi/PeiMPCore.inf {
|
||||
<LibraryClasses>
|
||||
ArmLib|ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.inf
|
||||
ArmPlatformLib|ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLib.inf
|
||||
ArmPlatformGlobalVariableLib|ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/PrePi/PrePiArmPlatformGlobalVariableLib.inf
|
||||
}
|
||||
!else
|
||||
ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf {
|
||||
<LibraryClasses>
|
||||
ArmPlatformGlobalVariableLib|ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Pei/PeiArmPlatformGlobalVariableLib.inf
|
||||
}
|
||||
MdeModulePkg/Core/Pei/PeiMain.inf
|
||||
MdeModulePkg/Universal/PCD/Pei/Pcd.inf {
|
||||
<LibraryClasses>
|
||||
PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
|
||||
}
|
||||
ArmPlatformPkg/PlatformPei/PlatformPeim.inf
|
||||
ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf
|
||||
ArmPkg/Drivers/CpuPei/CpuPei.inf
|
||||
IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf
|
||||
Nt32Pkg/BootModePei/BootModePei.inf
|
||||
MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
|
||||
MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf {
|
||||
<LibraryClasses>
|
||||
NULL|IntelFrameworkModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf
|
||||
}
|
||||
!endif
|
||||
|
||||
#
|
||||
# DXE
|
||||
#
|
||||
MdeModulePkg/Core/Dxe/DxeMain.inf {
|
||||
<LibraryClasses>
|
||||
PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
|
||||
NULL|MdeModulePkg/Library/DxeCrc32GuidedSectionExtractLib/DxeCrc32GuidedSectionExtractLib.inf
|
||||
}
|
||||
|
||||
#
|
||||
# Architectural Protocols
|
||||
#
|
||||
ArmPkg/Drivers/CpuDxe/CpuDxe.inf
|
||||
MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
|
||||
MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
|
||||
MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
|
||||
MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf
|
||||
MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
|
||||
MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
|
||||
EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf
|
||||
EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf
|
||||
EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
|
||||
|
||||
MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
|
||||
MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
|
||||
MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
|
||||
MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
|
||||
EmbeddedPkg/SerialDxe/SerialDxe.inf
|
||||
|
||||
MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
|
||||
|
||||
ArmPkg/Drivers/PL390Gic/PL390GicDxe.inf
|
||||
ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.inf
|
||||
ArmPkg/Drivers/TimerDxe/TimerDxe.inf
|
||||
ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/PL111LcdGraphicsOutputDxe.inf
|
||||
ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf
|
||||
|
||||
#
|
||||
# Semi-hosting filesystem
|
||||
#
|
||||
ArmPkg/Filesystem/SemihostFs/SemihostFs.inf
|
||||
|
||||
#
|
||||
# Multimedia Card Interface
|
||||
#
|
||||
EmbeddedPkg/Universal/MmcDxe/MmcDxe.inf
|
||||
ArmPlatformPkg/Drivers/PL180MciDxe/PL180MciDxe.inf
|
||||
|
||||
#
|
||||
# FAT filesystem + GPT/MBR partitioning
|
||||
#
|
||||
MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
|
||||
MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
|
||||
FatPkg/EnhancedFatDxe/Fat.inf
|
||||
MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
|
||||
|
||||
#
|
||||
# Application
|
||||
#
|
||||
EmbeddedPkg/Ebl/Ebl.inf
|
||||
|
||||
!ifdef $(EDK2_ARMVE_UEFI2_SHELL)
|
||||
ShellPkg/Application/Shell/Shell.inf {
|
||||
<LibraryClasses>
|
||||
ShellCommandLib|ShellPkg/Library/UefiShellCommandLib/UefiShellCommandLib.inf
|
||||
NULL|ShellPkg/Library/UefiShellLevel2CommandsLib/UefiShellLevel2CommandsLib.inf
|
||||
NULL|ShellPkg/Library/UefiShellLevel1CommandsLib/UefiShellLevel1CommandsLib.inf
|
||||
NULL|ShellPkg/Library/UefiShellLevel3CommandsLib/UefiShellLevel3CommandsLib.inf
|
||||
NULL|ShellPkg/Library/UefiShellDriver1CommandsLib/UefiShellDriver1CommandsLib.inf
|
||||
NULL|ShellPkg/Library/UefiShellInstall1CommandsLib/UefiShellInstall1CommandsLib.inf
|
||||
NULL|ShellPkg/Library/UefiShellDebug1CommandsLib/UefiShellDebug1CommandsLib.inf
|
||||
NULL|ShellPkg/Library/UefiShellNetwork1CommandsLib/UefiShellNetwork1CommandsLib.inf
|
||||
HandleParsingLib|ShellPkg/Library/UefiHandleParsingLib/UefiHandleParsingLib.inf
|
||||
FileHandleLib|ShellPkg/Library/UefiFileHandleLib/UefiFileHandleLib.inf
|
||||
ShellLib|ShellPkg/Library/UefiShellLib/UefiShellLib.inf
|
||||
SortLib|ShellPkg/Library/UefiSortLib/UefiSortLib.inf
|
||||
|
||||
<PcdsFixedAtBuild>
|
||||
gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0xFF
|
||||
gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize|FALSE
|
||||
gEfiMdePkgTokenSpaceGuid.PcdUefiLibMaxPrintBufferSize|16000
|
||||
}
|
||||
!endif
|
||||
|
||||
#
|
||||
# Bds
|
||||
#
|
||||
MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
|
||||
ArmPlatformPkg/Bds/Bds.inf
|
||||
|
|
@ -0,0 +1,301 @@
|
|||
# FLASH layout file for ARM VE.
|
||||
#
|
||||
# Copyright (c) 2011, ARM Limited. All rights reserved.
|
||||
#
|
||||
# This program and the accompanying materials
|
||||
# are licensed and made available under the terms and conditions of the BSD License
|
||||
# which accompanies this distribution. The full text of the license may be found at
|
||||
# http://opensource.org/licenses/bsd-license.php
|
||||
#
|
||||
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
#
|
||||
|
||||
################################################################################
|
||||
#
|
||||
# FD Section
|
||||
# The [FD] Section is made up of the definition statements and a
|
||||
# description of what goes into the Flash Device Image. Each FD section
|
||||
# defines one flash "device" image. A flash device image may be one of
|
||||
# the following: Removable media bootable image (like a boot floppy
|
||||
# image,) an Option ROM image (that would be "flashed" into an add-in
|
||||
# card,) a System "Flash" image (that would be burned into a system's
|
||||
# flash) or an Update ("Capsule") image that will be used to update and
|
||||
# existing system flash.
|
||||
#
|
||||
################################################################################
|
||||
|
||||
[FD.RTSM_VE_Cortex-A15_MPCore_EFI]
|
||||
BaseAddress = 0x08000000|gArmTokenSpaceGuid.PcdFdBaseAddress # The base address of the Firmware in NOR Flash.
|
||||
Size = 0x00280000|gArmTokenSpaceGuid.PcdFdSize # The size in bytes of the FLASH Device
|
||||
ErasePolarity = 1
|
||||
|
||||
# This one is tricky, it must be: BlockSize * NumBlocks = Size
|
||||
BlockSize = 0x00001000
|
||||
NumBlocks = 0x280
|
||||
|
||||
################################################################################
|
||||
#
|
||||
# Following are lists of FD Region layout which correspond to the locations of different
|
||||
# images within the flash device.
|
||||
#
|
||||
# Regions must be defined in ascending order and may not overlap.
|
||||
#
|
||||
# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by
|
||||
# the pipe "|" character, followed by the size of the region, also in hex with the leading
|
||||
# "0x" characters. Like:
|
||||
# Offset|Size
|
||||
# PcdOffsetCName|PcdSizeCName
|
||||
# RegionType <FV, DATA, or FILE>
|
||||
#
|
||||
################################################################################
|
||||
|
||||
0x00000000|0x00080000
|
||||
gArmTokenSpaceGuid.PcdSecureFvBaseAddress|gArmTokenSpaceGuid.PcdSecureFvBaseSize
|
||||
FV = FVMAIN_SEC
|
||||
|
||||
0x00080000|0x00280000
|
||||
gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvBaseSize
|
||||
FV = FVMAIN_COMPACT
|
||||
|
||||
|
||||
################################################################################
|
||||
#
|
||||
# FV Section
|
||||
#
|
||||
# [FV] section is used to define what components or modules are placed within a flash
|
||||
# device file. This section also defines order the components and modules are positioned
|
||||
# within the image. The [FV] section consists of define statements, set statements and
|
||||
# module statements.
|
||||
#
|
||||
################################################################################
|
||||
|
||||
[FV.FVMAIN_SEC]
|
||||
FvAlignment = 8
|
||||
ERASE_POLARITY = 1
|
||||
MEMORY_MAPPED = TRUE
|
||||
STICKY_WRITE = TRUE
|
||||
LOCK_CAP = TRUE
|
||||
LOCK_STATUS = TRUE
|
||||
WRITE_DISABLED_CAP = TRUE
|
||||
WRITE_ENABLED_CAP = TRUE
|
||||
WRITE_STATUS = TRUE
|
||||
WRITE_LOCK_CAP = TRUE
|
||||
WRITE_LOCK_STATUS = TRUE
|
||||
READ_DISABLED_CAP = TRUE
|
||||
READ_ENABLED_CAP = TRUE
|
||||
READ_STATUS = TRUE
|
||||
READ_LOCK_CAP = TRUE
|
||||
READ_LOCK_STATUS = TRUE
|
||||
|
||||
INF ArmPlatformPkg/Sec/Sec.inf
|
||||
|
||||
|
||||
[FV.FvMain]
|
||||
BlockSize = 0x40
|
||||
NumBlocks = 0 # This FV gets compressed so make it just big enough
|
||||
FvAlignment = 8 # FV alignment and FV attributes setting.
|
||||
ERASE_POLARITY = 1
|
||||
MEMORY_MAPPED = TRUE
|
||||
STICKY_WRITE = TRUE
|
||||
LOCK_CAP = TRUE
|
||||
LOCK_STATUS = TRUE
|
||||
WRITE_DISABLED_CAP = TRUE
|
||||
WRITE_ENABLED_CAP = TRUE
|
||||
WRITE_STATUS = TRUE
|
||||
WRITE_LOCK_CAP = TRUE
|
||||
WRITE_LOCK_STATUS = TRUE
|
||||
READ_DISABLED_CAP = TRUE
|
||||
READ_ENABLED_CAP = TRUE
|
||||
READ_STATUS = TRUE
|
||||
READ_LOCK_CAP = TRUE
|
||||
READ_LOCK_STATUS = TRUE
|
||||
|
||||
INF MdeModulePkg/Core/Dxe/DxeMain.inf
|
||||
|
||||
#
|
||||
# PI DXE Drivers producing Architectural Protocols (EFI Services)
|
||||
#
|
||||
INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf
|
||||
INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
|
||||
INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
|
||||
INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
|
||||
INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf
|
||||
INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
|
||||
INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
|
||||
INF EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf
|
||||
INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf
|
||||
INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
|
||||
|
||||
INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
|
||||
|
||||
#
|
||||
# Multiple Console IO support
|
||||
#
|
||||
INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
|
||||
INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
|
||||
INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
|
||||
INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
|
||||
INF EmbeddedPkg/SerialDxe/SerialDxe.inf
|
||||
|
||||
INF ArmPkg/Drivers/PL390Gic/PL390GicDxe.inf
|
||||
INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf
|
||||
INF ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.inf
|
||||
INF ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/PL111LcdGraphicsOutputDxe.inf
|
||||
INF ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf
|
||||
|
||||
#
|
||||
# Semi-hosting filesystem
|
||||
#
|
||||
INF ArmPkg/Filesystem/SemihostFs/SemihostFs.inf
|
||||
|
||||
#
|
||||
# FAT filesystem + GPT/MBR partitioning
|
||||
#
|
||||
INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
|
||||
INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
|
||||
INF FatPkg/EnhancedFatDxe/Fat.inf
|
||||
INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
|
||||
|
||||
#
|
||||
# UEFI application (Shell Embedded Boot Loader)
|
||||
#
|
||||
INF EmbeddedPkg/Ebl/Ebl.inf
|
||||
|
||||
!if $(EDK2_ARMVE_UEFI2_SHELL) == 1
|
||||
INF ShellPkg/Application/Shell/Shell.inf
|
||||
!endif
|
||||
|
||||
#
|
||||
# Bds
|
||||
#
|
||||
INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
|
||||
INF ArmPlatformPkg/Bds/Bds.inf
|
||||
|
||||
|
||||
[FV.FVMAIN_COMPACT]
|
||||
FvAlignment = 8
|
||||
ERASE_POLARITY = 1
|
||||
MEMORY_MAPPED = TRUE
|
||||
STICKY_WRITE = TRUE
|
||||
LOCK_CAP = TRUE
|
||||
LOCK_STATUS = TRUE
|
||||
WRITE_DISABLED_CAP = TRUE
|
||||
WRITE_ENABLED_CAP = TRUE
|
||||
WRITE_STATUS = TRUE
|
||||
WRITE_LOCK_CAP = TRUE
|
||||
WRITE_LOCK_STATUS = TRUE
|
||||
READ_DISABLED_CAP = TRUE
|
||||
READ_ENABLED_CAP = TRUE
|
||||
READ_STATUS = TRUE
|
||||
READ_LOCK_CAP = TRUE
|
||||
READ_LOCK_STATUS = TRUE
|
||||
|
||||
!if $(EDK2_SKIP_PEICORE) == 1
|
||||
INF ArmPlatformPkg/PrePi/PeiMPCore.inf
|
||||
!else
|
||||
INF ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf
|
||||
INF MdeModulePkg/Core/Pei/PeiMain.inf
|
||||
INF ArmPlatformPkg/PlatformPei/PlatformPeim.inf
|
||||
INF ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf
|
||||
INF ArmPkg/Drivers/CpuPei/CpuPei.inf
|
||||
INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
|
||||
INF IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf
|
||||
INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
|
||||
INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
|
||||
!endif
|
||||
|
||||
FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
|
||||
SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
|
||||
SECTION FV_IMAGE = FVMAIN
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
################################################################################
|
||||
#
|
||||
# Rules are use with the [FV] section's module INF type to define
|
||||
# how an FFS file is created for a given INF file. The following Rule are the default
|
||||
# rules for the different module type. User can add the customized rules to define the
|
||||
# content of the FFS file.
|
||||
#
|
||||
################################################################################
|
||||
|
||||
|
||||
############################################################################
|
||||
# Example of a DXE_DRIVER FFS file with a Checksum encapsulation section #
|
||||
############################################################################
|
||||
#
|
||||
#[Rule.Common.DXE_DRIVER]
|
||||
# FILE DRIVER = $(NAMED_GUID) {
|
||||
# DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
|
||||
# COMPRESS PI_STD {
|
||||
# GUIDED {
|
||||
# PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
|
||||
# UI STRING="$(MODULE_NAME)" Optional
|
||||
# VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
|
||||
# }
|
||||
# }
|
||||
# }
|
||||
#
|
||||
############################################################################
|
||||
|
||||
[Rule.Common.SEC]
|
||||
FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {
|
||||
TE TE Align = 32 $(INF_OUTPUT)/$(MODULE_NAME).efi
|
||||
}
|
||||
|
||||
[Rule.Common.PEI_CORE]
|
||||
FILE PEI_CORE = $(NAMED_GUID) {
|
||||
TE TE $(INF_OUTPUT)/$(MODULE_NAME).efi
|
||||
UI STRING ="$(MODULE_NAME)" Optional
|
||||
}
|
||||
|
||||
[Rule.Common.PEIM]
|
||||
FILE PEIM = $(NAMED_GUID) {
|
||||
PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
|
||||
TE TE $(INF_OUTPUT)/$(MODULE_NAME).efi
|
||||
UI STRING="$(MODULE_NAME)" Optional
|
||||
}
|
||||
|
||||
[Rule.Common.PEIM.TIANOCOMPRESSED]
|
||||
FILE PEIM = $(NAMED_GUID) DEBUG_MYTOOLS_IA32 {
|
||||
PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
|
||||
GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {
|
||||
PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
|
||||
UI STRING="$(MODULE_NAME)" Optional
|
||||
}
|
||||
}
|
||||
|
||||
[Rule.Common.DXE_CORE]
|
||||
FILE DXE_CORE = $(NAMED_GUID) {
|
||||
PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
|
||||
UI STRING="$(MODULE_NAME)" Optional
|
||||
}
|
||||
|
||||
[Rule.Common.UEFI_DRIVER]
|
||||
FILE DRIVER = $(NAMED_GUID) {
|
||||
DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
|
||||
PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
|
||||
UI STRING="$(MODULE_NAME)" Optional
|
||||
}
|
||||
|
||||
[Rule.Common.DXE_DRIVER]
|
||||
FILE DRIVER = $(NAMED_GUID) {
|
||||
DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
|
||||
PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
|
||||
UI STRING="$(MODULE_NAME)" Optional
|
||||
}
|
||||
|
||||
[Rule.Common.DXE_RUNTIME_DRIVER]
|
||||
FILE DRIVER = $(NAMED_GUID) {
|
||||
DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
|
||||
PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
|
||||
UI STRING="$(MODULE_NAME)" Optional
|
||||
}
|
||||
|
||||
[Rule.Common.UEFI_APPLICATION]
|
||||
FILE APPLICATION = $(NAMED_GUID) {
|
||||
UI STRING ="$(MODULE_NAME)" Optional
|
||||
PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
|
||||
}
|
||||
|
|
@ -35,6 +35,8 @@
|
|||
[Sources.common]
|
||||
RTSM.c
|
||||
RTSMMem.c
|
||||
RTSMHelper.asm | RVCT
|
||||
RTSMHelper.S | GCC
|
||||
|
||||
[FeaturePcd]
|
||||
gEmbeddedTokenSpaceGuid.PcdCacheEnable
|
||||
|
|
|
|||
|
|
@ -36,6 +36,8 @@
|
|||
RTSM.c
|
||||
RTSMBoot.asm | RVCT
|
||||
RTSMBoot.S | GCC
|
||||
RTSMHelper.asm | RVCT
|
||||
RTSMHelper.S | GCC
|
||||
|
||||
[Protocols]
|
||||
|
||||
|
|
|
|||
|
|
@ -148,7 +148,7 @@ PrePeiCoreGetMpCoreInfo (
|
|||
UINT32 ProcType;
|
||||
|
||||
ProcType = MmioRead32 (ARM_VE_SYS_PROCID0_REG) & ARM_VE_SYS_PROC_ID_MASK;
|
||||
if (ProcType == ARM_VE_SYS_PROC_ID_CORTEX_A9) {
|
||||
if ((ProcType == ARM_VE_SYS_PROC_ID_CORTEX_A9) || (ProcType == ARM_VE_SYS_PROC_ID_CORTEX_A15)) {
|
||||
// Only support one cluster
|
||||
*CoreCount = ArmGetCpuCountPerCluster ();
|
||||
*ArmCoreTable = mVersatileExpressMpCoreInfoTable;
|
||||
|
|
|
|||
|
|
@ -0,0 +1,71 @@
|
|||
#
|
||||
# Copyright (c) 2011, ARM Limited. All rights reserved.
|
||||
#
|
||||
# This program and the accompanying materials
|
||||
# are licensed and made available under the terms and conditions of the BSD License
|
||||
# which accompanies this distribution. The full text of the license may be found at
|
||||
# http:#opensource.org/licenses/bsd-license.php
|
||||
#
|
||||
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
#
|
||||
#
|
||||
|
||||
#include <AsmMacroIoLib.h>
|
||||
#include <Base.h>
|
||||
#include <Library/PcdLib.h>
|
||||
#include <AutoGen.h>
|
||||
#.include AsmMacroIoLib.inc
|
||||
|
||||
#include <Chipset/ArmCortexA9.h>
|
||||
|
||||
.text
|
||||
.align 2
|
||||
|
||||
GCC_ASM_EXPORT(ArmGetCpuCountPerCluster)
|
||||
|
||||
# IN None
|
||||
# OUT r0 = SCU Base Address
|
||||
ASM_PFX(ArmGetScuBaseAddress):
|
||||
# Read Configuration Base Address Register. ArmCBar cannot be called to get
|
||||
# the Configuration BAR as a stack is not necessary setup. The SCU is at the
|
||||
# offset 0x0000 from the Private Memory Region.
|
||||
mrc p15, 4, r0, c15, c0, 0
|
||||
bx lr
|
||||
|
||||
# IN None
|
||||
# OUT r0 = number of cores present in the system
|
||||
ASM_PFX(ArmGetCpuCountPerCluster):
|
||||
stmfd SP!, {r1-r2}
|
||||
|
||||
# Read CP15 MIDR
|
||||
mrc p15, 0, r1, c0, c0, 0
|
||||
|
||||
# Check if the CPU is A15
|
||||
mov r1, r1, LSR #4
|
||||
LoadConstantToReg (ARM_CPU_TYPE_MASK, r0)
|
||||
and r1, r1, r0
|
||||
|
||||
LoadConstantToReg (ARM_CPU_TYPE_A15, r0)
|
||||
cmp r1, r0
|
||||
beq _Read_cp15_reg
|
||||
|
||||
_CPU_is_not_A15:
|
||||
mov r2, lr @ Save link register
|
||||
bl ArmGetScuBaseAddress @ Read SCU Base Address
|
||||
mov lr, r2 @ Restore link register val
|
||||
ldr r0, [r0, #A9_SCU_CONFIG_OFFSET] @ Read SCU Config reg to get CPU count
|
||||
b _Return
|
||||
|
||||
_Read_cp15_reg:
|
||||
mrc p15, 1, r0, c9, c0, 2 @ Read C9 register of CP15 to get CPU count
|
||||
lsr r0, #24
|
||||
|
||||
_Return:
|
||||
and r0, r0, #3
|
||||
# Add '1' to the number of CPU on the Cluster
|
||||
add r0, r0, #1
|
||||
ldmfd SP!, {r1-r2}
|
||||
bx lr
|
||||
|
||||
ASM_FUNCTION_REMOVE_IF_UNREFERENCED
|
||||
|
|
@ -0,0 +1,73 @@
|
|||
//
|
||||
// Copyright (c) 2011, ARM Limited. All rights reserved.
|
||||
//
|
||||
// This program and the accompanying materials
|
||||
// are licensed and made available under the terms and conditions of the BSD License
|
||||
// which accompanies this distribution. The full text of the license may be found at
|
||||
// http://opensource.org/licenses/bsd-license.php
|
||||
//
|
||||
// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
//
|
||||
//
|
||||
|
||||
#include <AsmMacroIoLib.h>
|
||||
#include <Base.h>
|
||||
#include <Library/PcdLib.h>
|
||||
|
||||
#include <Chipset/ArmCortexA9.h>
|
||||
|
||||
#include <AutoGen.h>
|
||||
|
||||
INCLUDE AsmMacroIoLib.inc
|
||||
|
||||
EXPORT ArmGetCpuCountPerCluster
|
||||
|
||||
AREA RTSMHelper, CODE, READONLY
|
||||
|
||||
// IN None
|
||||
// OUT r0 = SCU Base Address
|
||||
ArmGetScuBaseAddress
|
||||
// Read Configuration Base Address Register. ArmCBar cannot be called to get
|
||||
// the Configuration BAR as a stack is not necessary setup. The SCU is at the
|
||||
// offset 0x0000 from the Private Memory Region.
|
||||
mrc p15, 4, r0, c15, c0, 0
|
||||
bx lr
|
||||
|
||||
// IN None
|
||||
// OUT r0 = number of cores present in the system
|
||||
ArmGetCpuCountPerCluster
|
||||
stmfd SP!, {r1-r2}
|
||||
|
||||
// Read CP15 MIDR
|
||||
mrc p15, 0, r1, c0, c0, 0
|
||||
|
||||
// Check if the CPU is A15
|
||||
mov r1, r1, LSR #4
|
||||
mov r0, #ARM_CPU_TYPE_MASK
|
||||
and r1, r1, r0
|
||||
|
||||
mov r0, #ARM_CPU_TYPE_A15
|
||||
cmp r1, r0
|
||||
beq _Read_cp15_reg
|
||||
|
||||
_CPU_is_not_A15
|
||||
mov r2, lr ; Save link register
|
||||
bl ArmGetScuBaseAddress ; Read SCU Base Address
|
||||
mov lr, r2 ; Restore link register val
|
||||
ldr r0, [r0, #A9_SCU_CONFIG_OFFSET] ; Read SCU Config reg to get CPU count
|
||||
b _Return
|
||||
|
||||
_Read_cp15_reg
|
||||
mrc p15, 1, r0, c9, c0, 2 ; Read C9 register of CP15 to get CPU count
|
||||
lsr r0, #24
|
||||
|
||||
|
||||
_Return
|
||||
and r0, r0, #3
|
||||
// Add '1' to the number of CPU on the Cluster
|
||||
add r0, r0, #1
|
||||
ldmfd SP!, {r1-r2}
|
||||
bx lr
|
||||
|
||||
END
|
||||
Loading…
Reference in New Issue