Vlv2TbltDevicePkg/PlatformInitPei: Workaround unaligned SMRAM size

https://bugzilla.tianocore.org/show_bug.cgi?id=260

The PiSmmCPuDxeSmm module requires the SMRR base address and length
to be aligned.  The memory initialization for Vlv2TbltDevicePkg
produces an SMRAM base address that is on a 16MB boundary and an
SMRAM length of 12MB.  The SMRAM length is rounded up to 16MB.

This is a workaround until the binary module that produces the
gEfiSmmPeiSmramMemoryReserveGuid HOB is updated

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: David Wei <david.wei@intel.com>
Cc: Mang Guo <mang.guo@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
This commit is contained in:
Michael Kinney 2016-11-29 01:05:05 -08:00
parent eadc05bd92
commit 890f11d428
3 changed files with 18 additions and 3 deletions

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@ -1,6 +1,6 @@
/** @file
Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2004 - 2016, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
@ -820,6 +820,19 @@ PlatformEarlyInitEntry (
EFI_PLATFORM_INFO_HOB *PlatformInfo;
EFI_PEI_HOB_POINTERS Hob;
EFI_PLATFORM_CPU_INFO PlatformCpuInfo;
EFI_SMRAM_HOB_DESCRIPTOR_BLOCK *DescriptorBlock;
UINT64 Size;
//
// Make sure last SMRAM region is aligned
//
Hob.Raw = GetFirstGuidHob (&gEfiSmmPeiSmramMemoryReserveGuid);
if (Hob.Raw != NULL) {
DescriptorBlock = GET_GUID_HOB_DATA (Hob.Raw);
Size = DescriptorBlock->Descriptor[DescriptorBlock->NumberOfSmmReservedRegions - 1].PhysicalSize;
Size = LShiftU64 (1, HighBitSet64 (Size - 1) + 1);
DescriptorBlock->Descriptor[DescriptorBlock->NumberOfSmmReservedRegions - 1].PhysicalSize = Size;
}
//
// Initialize SmbusPolicy PPI

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@ -1,6 +1,6 @@
/*++
Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2004 - 2016, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
@ -83,6 +83,7 @@ Abstract:
#include <Ppi/MasterBootMode.h>
#include <Guid/PlatformCpuInfo.h>
#include <Guid/OsSelection.h>
#include <Guid/SmramMemoryReserve.h>
#define SMC_LAN_ON 0x46
#define SMC_LAN_OFF 0x47

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@ -1,6 +1,6 @@
#
#
# Copyright (c) 1999 - 2014, Intel Corporation. All rights reserved
# Copyright (c) 1999 - 2016, Intel Corporation. All rights reserved
#
# This program and the accompanying materials are licensed and made available under
# the terms and conditions of the BSD License that accompanies this distribution.
@ -102,6 +102,7 @@ ENTRY_POINT = PlatformEarlyInitEntry
gEfiNormalSetupGuid
gEfiMemoryTypeInformationGuid
gOsSelectionVariableGuid
gEfiSmmPeiSmramMemoryReserveGuid
[Pcd.common]
gPlatformModuleTokenSpaceGuid.PcdFlashFvMainBase