mirror of https://github.com/acidanthera/audk.git
ArmPkg/ArmLib: Add ArmHasVhe () helper function
Create a helper function to query whether ID_AA64MFR1_EL1 indicates presence of the Virtualization Host Extensions. This feature is only visible in AARCH64 state. Signed-off-by: Leif Lindholm <quic_llindhol@quicinc.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Sami Mujawar <sami.mujawar@arm.com> Cc: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com> Tested-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
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@ -24,6 +24,9 @@
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// Coprocessor Trap Register (CPTR)
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#define AARCH64_CPTR_TFP (1 << 10)
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// ID_AA64MMFR1 - AArch64 Memory Model Feature Register 0 definitions
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#define AARCH64_MMFR1_VH (0xF << 8)
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// ID_AA64PFR0 - AArch64 Processor Feature Register 0 definitions
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#define AARCH64_PFR0_FP (0xF << 16)
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#define AARCH64_PFR0_GIC (0xF << 24)
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@ -764,6 +764,24 @@ ArmHasCcidx (
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VOID
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);
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#ifdef MDE_CPU_AARCH64
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///
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/// AArch64-only ID Register Helper functions
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///
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/**
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Checks whether the CPU implements the Virtualization Host Extensions.
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@retval TRUE FEAT_VHE is implemented.
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@retval FALSE FEAT_VHE is not mplemented.
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**/
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BOOLEAN
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EFIAPI
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ArmHasVhe (
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VOID
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);
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#endif // MDE_CPU_AARCH64
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#ifdef MDE_CPU_ARM
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///
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/// AArch32-only ID Register Helper functions
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@ -104,3 +104,18 @@ ArmHasCcidx (
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Mmfr2 = ArmReadIdAA64Mmfr2 ();
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return (((Mmfr2 >> 20) & 0xF) == 1) ? TRUE : FALSE;
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}
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/**
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Checks whether the CPU implements the Virtualization Host Extensions.
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@retval TRUE FEAT_VHE is implemented.
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@retval FALSE FEAT_VHE is not mplemented.
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**/
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BOOLEAN
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EFIAPI
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ArmHasVhe (
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VOID
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)
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{
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return ((ArmReadIdAA64Mmfr1 () & AARCH64_MMFR1_VH) != 0);
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}
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