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ShellPkg: acpiview: ACPI 6.3 update for MADT parser
The ACPI 6.3 specification introduces a 'SPE overflow Interrupt' field as part of the GICC structure. Update the MADT parser to decode this field and validate the interrupt ID used. References: - ACPI 6.3 Specification - January 2019 - Arm Generic Interrupt Controller Architecture Specification, GIC architecture version 3 and version 4, issue E - Arm Server Base System Architecture 5.0 Signed-off-by: Krzysztof Koch <krzysztof.koch@arm.com> Reviewed-by: Alexei Fedorov <Alexei.Fedorov@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com> Reviewed-by: Zhichao Gao <zhichao.gao@intel.com>
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@ -1,17 +1,21 @@
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/** @file
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MADT table parser
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Copyright (c) 2016 - 2018, ARM Limited. All rights reserved.
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Copyright (c) 2016 - 2019, ARM Limited. All rights reserved.
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SPDX-License-Identifier: BSD-2-Clause-Patent
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@par Reference(s):
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- ACPI 6.2 Specification - Errata A, September 2017
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- ACPI 6.3 Specification - January 2019
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- Arm Generic Interrupt Controller Architecture Specification,
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GIC architecture version 3 and version 4, issue E
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- Arm Server Base System Architecture 5.0
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**/
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#include <IndustryStandard/Acpi.h>
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#include <Library/UefiLib.h>
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#include "AcpiParser.h"
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#include "AcpiTableParser.h"
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#include "MadtParser.h"
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// Local Variables
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STATIC CONST UINT8* MadtInterruptControllerType;
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@ -33,6 +37,21 @@ ValidateGICDSystemVectorBase (
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IN VOID* Context
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);
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/**
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This function validates the SPE Overflow Interrupt in the GICC.
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@param [in] Ptr Pointer to the start of the field data.
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@param [in] Context Pointer to context specific information e.g. this
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could be a pointer to the ACPI table header.
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**/
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STATIC
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VOID
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EFIAPI
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ValidateSpeOverflowInterrupt (
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IN UINT8* Ptr,
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IN VOID* Context
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);
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/**
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An ACPI_PARSER array describing the GICC Interrupt Controller Structure.
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**/
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@ -56,7 +75,9 @@ STATIC CONST ACPI_PARSER GicCParser[] = {
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{L"MPIDR", 8, 68, L"0x%lx", NULL, NULL, NULL, NULL},
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{L"Processor Power Efficiency Class", 1, 76, L"0x%x", NULL, NULL, NULL,
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NULL},
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{L"Reserved", 3, 77, L"%x %x %x", Dump3Chars, NULL, NULL, NULL}
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{L"Reserved", 1, 77, L"0x%x", NULL, NULL, NULL, NULL},
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{L"SPE overflow Interrupt", 2, 78, L"0x%x", NULL, NULL,
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ValidateSpeOverflowInterrupt, NULL}
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};
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/**
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@ -160,6 +181,55 @@ ValidateGICDSystemVectorBase (
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}
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}
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/**
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This function validates the SPE Overflow Interrupt in the GICC.
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@param [in] Ptr Pointer to the start of the field data.
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@param [in] Context Pointer to context specific information e.g. this
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could be a pointer to the ACPI table header.
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**/
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STATIC
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VOID
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EFIAPI
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ValidateSpeOverflowInterrupt (
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IN UINT8* Ptr,
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IN VOID* Context
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)
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{
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UINT16 SpeOverflowInterrupt;
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SpeOverflowInterrupt = *(UINT16*)Ptr;
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// SPE not supported by this processor
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if (SpeOverflowInterrupt == 0) {
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return;
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}
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if ((SpeOverflowInterrupt < ARM_PPI_ID_MIN) ||
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((SpeOverflowInterrupt > ARM_PPI_ID_MAX) &&
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(SpeOverflowInterrupt < ARM_PPI_ID_EXTENDED_MIN)) ||
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(SpeOverflowInterrupt > ARM_PPI_ID_EXTENDED_MAX)) {
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IncrementErrorCount ();
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Print (
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L"\nERROR: SPE Overflow Interrupt ID of %d is not in the allowed PPI ID "
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L"ranges of %d-%d or %d-%d (for GICv3.1 or later).",
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SpeOverflowInterrupt,
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ARM_PPI_ID_MIN,
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ARM_PPI_ID_MAX,
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ARM_PPI_ID_EXTENDED_MIN,
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ARM_PPI_ID_EXTENDED_MAX
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);
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} else if (SpeOverflowInterrupt != ARM_PPI_ID_PMBIRQ) {
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IncrementWarningCount();
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Print (
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L"\nWARNING: SPE Overflow Interrupt ID of %d is not compliant with SBSA "
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L"Level 3 PPI ID assignment: %d.",
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SpeOverflowInterrupt,
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ARM_PPI_ID_PMBIRQ
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);
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}
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}
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/**
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This function parses the ACPI MADT table.
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When trace is enabled this function parses the MADT table and
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@ -233,7 +303,7 @@ ParseAcpiMadt (
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}
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switch (*MadtInterruptControllerType) {
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case EFI_ACPI_6_2_GIC: {
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case EFI_ACPI_6_3_GIC: {
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ParseAcpi (
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TRUE,
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2,
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@ -245,7 +315,7 @@ ParseAcpiMadt (
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break;
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}
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case EFI_ACPI_6_2_GICD: {
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case EFI_ACPI_6_3_GICD: {
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if (++GICDCount > 1) {
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IncrementErrorCount ();
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Print (
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@ -265,7 +335,7 @@ ParseAcpiMadt (
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break;
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}
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case EFI_ACPI_6_2_GIC_MSI_FRAME: {
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case EFI_ACPI_6_3_GIC_MSI_FRAME: {
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ParseAcpi (
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TRUE,
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2,
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@ -277,7 +347,7 @@ ParseAcpiMadt (
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break;
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}
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case EFI_ACPI_6_2_GICR: {
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case EFI_ACPI_6_3_GICR: {
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ParseAcpi (
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TRUE,
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2,
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@ -289,7 +359,7 @@ ParseAcpiMadt (
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break;
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}
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case EFI_ACPI_6_2_GIC_ITS: {
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case EFI_ACPI_6_3_GIC_ITS: {
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ParseAcpi (
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TRUE,
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2,
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@ -0,0 +1,40 @@
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/** @file
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Header file for MADT table parser
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Copyright (c) 2019, ARM Limited. All rights reserved.
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SPDX-License-Identifier: BSD-2-Clause-Patent
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@par Reference(s):
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- Arm Generic Interrupt Controller Architecture Specification,
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GIC architecture version 3 and version 4, issue E
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- Arm Server Base System Architecture 5.0
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**/
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#ifndef MADT_PARSER_H_
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#define MADT_PARSER_H_
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///
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/// Level 3 base server system Private Peripheral Inerrupt (PPI) ID assignments
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///
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#define ARM_PPI_ID_OVERFLOW_INTERRUPT_FROM_CNTP 30
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#define ARM_PPI_ID_OVERFLOW_INTERRUPT_FROM_CNTPS 29
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#define ARM_PPI_ID_OVERFLOW_INTERRUPT_FROM_CNTHV 28
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#define ARM_PPI_ID_OVERFLOW_INTERRUPT_FROM_CNTV 27
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#define ARM_PPI_ID_OVERFLOW_INTERRUPT_FROM_CNTHP 26
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#define ARM_PPI_ID_GIC_MAINTENANCE_INTERRUPT 25
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#define ARM_PPI_ID_CTIIRQ 24
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#define ARM_PPI_ID_PERFORMANCE_MONITORS_INTERRUPT 23
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#define ARM_PPI_ID_COMMIRQ 22
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#define ARM_PPI_ID_PMBIRQ 21
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#define ARM_PPI_ID_CNTHPS 20
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#define ARM_PPI_ID_CNTHVS 19
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///
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/// PPI ID allowed ranges
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///
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#define ARM_PPI_ID_MAX 31
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#define ARM_PPI_ID_MIN 16
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#define ARM_PPI_ID_EXTENDED_MAX 1119
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#define ARM_PPI_ID_EXTENDED_MIN 1056
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#endif // MADT_PARSER_H_
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