mirror of https://github.com/acidanthera/audk.git
MdeModulePkg: BaseSerialPortLib16550: Add Mmio32 support
Some buses doesn't allow 8 bit MMIO read/write, this adds support for 32 bits read/write Signed-off-by: "Tien Hock, Loh" <tien.hock.loh@intel.com> Cc: Jian J Wang <jian.j.wang@intel.com> Reviewed-by: Hao Wu <hao.a.wu@intel.com>
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@ -2,7 +2,7 @@
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16550 UART Serial Port library functions
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(C) Copyright 2014 Hewlett-Packard Development Company, L.P.<BR>
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Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2018, AMD Incorporated. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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@ -62,7 +62,8 @@ typedef struct {
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Read an 8-bit 16550 register. If PcdSerialUseMmio is TRUE, then the value is read from
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MMIO space. If PcdSerialUseMmio is FALSE, then the value is read from I/O space. The
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parameter Offset is added to the base address of the 16550 registers that is specified
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by PcdSerialRegisterBase.
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by PcdSerialRegisterBase. PcdSerialRegisterAccessWidth specifies the MMIO space access
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width and defaults to 8 bit access, and supports 8 or 32 bit access.
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@param Base The base address register of UART device.
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@param Offset The offset of the 16550 register to read.
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@ -77,6 +78,9 @@ SerialPortReadRegister (
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)
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{
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if (PcdGetBool (PcdSerialUseMmio)) {
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if (PcdGet8 (PcdSerialRegisterAccessWidth) == 32) {
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return (UINT8) MmioRead32 (Base + Offset * PcdGet32 (PcdSerialRegisterStride));
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}
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return MmioRead8 (Base + Offset * PcdGet32 (PcdSerialRegisterStride));
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} else {
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return IoRead8 (Base + Offset * PcdGet32 (PcdSerialRegisterStride));
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@ -87,7 +91,8 @@ SerialPortReadRegister (
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Write an 8-bit 16550 register. If PcdSerialUseMmio is TRUE, then the value is written to
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MMIO space. If PcdSerialUseMmio is FALSE, then the value is written to I/O space. The
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parameter Offset is added to the base address of the 16550 registers that is specified
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by PcdSerialRegisterBase.
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by PcdSerialRegisterBase. PcdSerialRegisterAccessWidth specifies the MMIO space access
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width and defaults to 8 bit access, and supports 8 or 32 bit access.
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@param Base The base address register of UART device.
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@param Offset The offset of the 16550 register to write.
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@ -104,6 +109,9 @@ SerialPortWriteRegister (
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)
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{
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if (PcdGetBool (PcdSerialUseMmio)) {
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if (PcdGet8 (PcdSerialRegisterAccessWidth) == 32) {
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return (UINT8) MmioWrite32 (Base + Offset * PcdGet32 (PcdSerialRegisterStride), (UINT8)Value);
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}
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return MmioWrite8 (Base + Offset * PcdGet32 (PcdSerialRegisterStride), Value);
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} else {
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return IoWrite8 (Base + Offset * PcdGet32 (PcdSerialRegisterStride), Value);
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@ -1,7 +1,7 @@
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## @file
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# SerialPortLib instance for 16550 UART.
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#
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# Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
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# Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>
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# SPDX-License-Identifier: BSD-2-Clause-Patent
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#
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##
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@ -29,6 +29,7 @@
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BaseSerialPortLib16550.c
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[Pcd]
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gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterAccessWidth ## SOMETIMES_CONSUMES
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gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseMmio ## CONSUMES
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gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseHardwareFlowControl ## CONSUMES
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gEfiMdeModulePkgTokenSpaceGuid.PcdSerialDetectCable ## SOMETIMES_CONSUMES
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@ -1170,6 +1170,13 @@
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# @Prompt Serial port registers use MMIO.
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gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseMmio|FALSE|BOOLEAN|0x00020000
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## Indicates the access width for 16550 serial port registers.
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# Default is 8-bit access mode.<BR><BR>
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# 8 - 16550 serial port registers are accessed in 8-bit width.<BR>
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# 32 - 16550 serial port registers are accessed in 32-bit width.<BR>
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# @Prompt Serial port register access width.
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gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterAccessWidth|8|UINT8|0x00020007
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## Indicates if the 16550 serial port hardware flow control will be enabled. Default is FALSE.<BR><BR>
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# TRUE - 16550 serial port hardware flow control will be enabled.<BR>
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# FALSE - 16550 serial port hardware flow control will be disabled.<BR>
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