mirror of
https://github.com/acidanthera/audk.git
synced 2025-04-07 19:45:07 +02:00
MdeModulePkg: Supporting S3 in 64bit PEI
https://bugzilla.tianocore.org/show_bug.cgi?id=4195 Transfer from DXE to OS waking vector by calling SwitchStack() when both are in the same execution mode. Reviewed-by: Ray Ni <ray.ni@intel.com> Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Chasel Chiu <chasel.chiu@intel.com> Cc: Nate DeSimone <nathaniel.l.desimone@intel.com> Cc: Star Zeng <star.zeng@intel.com> Cc: Ashraf Ali S <ashraf.ali.s@intel.com> Cc: Chinni B Duggapu <chinni.b.duggapu@intel.com> Signed-off-by: Ted Kuo <ted.kuo@intel.com>
This commit is contained in:
parent
6acf72901a
commit
8bd2028f9a
@ -4,7 +4,7 @@
|
||||
This driver is dispatched by Dxe core and the driver will reload itself to ACPI reserved memory
|
||||
in the entry point. The functionality is to interpret and restore the S3 boot script
|
||||
|
||||
Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>
|
||||
Copyright (c) 2006 - 2022, Intel Corporation. All rights reserved.<BR>
|
||||
Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
|
||||
|
||||
SPDX-License-Identifier: BSD-2-Clause-Patent
|
||||
@ -95,7 +95,7 @@ S3BootScriptExecutorEntryFunction (
|
||||
PeiS3ResumeState->ReturnStatus = (UINT64)(UINTN)Status;
|
||||
if (FeaturePcdGet (PcdDxeIplSwitchToLongMode)) {
|
||||
//
|
||||
// X64 S3 Resume
|
||||
// X64 DXE to IA32 PEI S3 Resume
|
||||
//
|
||||
DEBUG ((DEBUG_INFO, "Call AsmDisablePaging64() to return to S3 Resume in PEI Phase\n"));
|
||||
PeiS3ResumeState->AsmTransferControl = (EFI_PHYSICAL_ADDRESS)(UINTN)AsmTransferControl32;
|
||||
@ -121,7 +121,7 @@ S3BootScriptExecutorEntryFunction (
|
||||
);
|
||||
} else {
|
||||
//
|
||||
// IA32 S3 Resume
|
||||
// IA32 DXE to IA32 PEI S3 Resume / X64 DXE to X64 PEI S3 Resume
|
||||
//
|
||||
DEBUG ((DEBUG_INFO, "Call SwitchStack() to return to S3 Resume in PEI Phase\n"));
|
||||
PeiS3ResumeState->AsmTransferControl = (EFI_PHYSICAL_ADDRESS)(UINTN)AsmTransferControl;
|
||||
@ -156,8 +156,11 @@ S3BootScriptExecutorEntryFunction (
|
||||
//
|
||||
// X64 long mode waking vector
|
||||
//
|
||||
DEBUG ((DEBUG_INFO, "Transfer to 64bit OS waking vector - %x\r\n", (UINTN)Facs->XFirmwareWakingVector));
|
||||
if (FeaturePcdGet (PcdDxeIplSwitchToLongMode)) {
|
||||
DEBUG ((DEBUG_INFO, "Transfer from 64bit DXE to 64bit OS waking vector - %x\r\n", (UINTN)Facs->XFirmwareWakingVector));
|
||||
if (sizeof (UINTN) == sizeof (UINT64)) {
|
||||
//
|
||||
// 64bit DXE calls to 64bit OS S3 waking vector
|
||||
//
|
||||
SwitchStack (
|
||||
(SWITCH_STACK_ENTRY_POINT)(UINTN)Facs->XFirmwareWakingVector,
|
||||
NULL,
|
||||
@ -174,7 +177,10 @@ S3BootScriptExecutorEntryFunction (
|
||||
// IA32 protected mode waking vector (Page disabled)
|
||||
//
|
||||
DEBUG ((DEBUG_INFO, "Transfer to 32bit OS waking vector - %x\r\n", (UINTN)Facs->XFirmwareWakingVector));
|
||||
if (FeaturePcdGet (PcdDxeIplSwitchToLongMode)) {
|
||||
if (sizeof (UINTN) == sizeof (UINT64)) {
|
||||
//
|
||||
// 64bit DXE calls to 32bit OS S3 waking vector
|
||||
//
|
||||
AsmDisablePaging64 (
|
||||
0x10,
|
||||
(UINT32)Facs->XFirmwareWakingVector,
|
||||
@ -183,6 +189,9 @@ S3BootScriptExecutorEntryFunction (
|
||||
(UINT32)TempStackTop
|
||||
);
|
||||
} else {
|
||||
//
|
||||
// 32bit DXE calls to 32bit OS S3 waking vector
|
||||
//
|
||||
SwitchStack (
|
||||
(SWITCH_STACK_ENTRY_POINT)(UINTN)Facs->XFirmwareWakingVector,
|
||||
NULL,
|
||||
|
@ -3,7 +3,7 @@
|
||||
|
||||
Set a IDT entry for interrupt vector 3 for debug purpose for x64 platform
|
||||
|
||||
Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>
|
||||
Copyright (c) 2006 - 2022, Intel Corporation. All rights reserved.<BR>
|
||||
Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
|
||||
|
||||
|
||||
@ -118,7 +118,7 @@ IsLongModeWakingVector (
|
||||
((Facs->OspmFlags & EFI_ACPI_4_0_OSPM_64BIT_WAKE__F) != 0))
|
||||
{
|
||||
// Both BIOS and OS wants 64bit vector
|
||||
if (FeaturePcdGet (PcdDxeIplSwitchToLongMode)) {
|
||||
if (sizeof (UINTN) == sizeof (UINT64)) {
|
||||
return TRUE;
|
||||
}
|
||||
}
|
||||
|
@ -1,7 +1,7 @@
|
||||
/** @file
|
||||
This is the implementation to save ACPI S3 Context.
|
||||
|
||||
Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
|
||||
Copyright (c) 2006 - 2022, Intel Corporation. All rights reserved.<BR>
|
||||
|
||||
SPDX-License-Identifier: BSD-2-Clause-Patent
|
||||
|
||||
@ -97,7 +97,7 @@ IsLongModeWakingVectorSupport (
|
||||
//
|
||||
// BIOS supports 64bit waking vector.
|
||||
//
|
||||
if (FeaturePcdGet (PcdDxeIplSwitchToLongMode)) {
|
||||
if (sizeof (UINTN) == sizeof (UINT64)) {
|
||||
return TRUE;
|
||||
}
|
||||
}
|
||||
@ -110,11 +110,11 @@ IsLongModeWakingVectorSupport (
|
||||
|
||||
@param[in] LongModeWakingVectorSupport Support long mode waking vector or not.
|
||||
|
||||
If BootScriptExector driver will run in 64-bit mode, this function will establish the 1:1
|
||||
If BootScriptExecutor driver will run in 64-bit mode, this function will establish the 1:1
|
||||
virtual to physical mapping page table when long mode waking vector is supported, otherwise
|
||||
create 4G page table when long mode waking vector is not supported and let PF handler to
|
||||
handle > 4G request.
|
||||
If BootScriptExector driver will not run in 64-bit mode, this function will do nothing.
|
||||
If BootScriptExecutor driver will not run in 64-bit mode, this function will do nothing.
|
||||
|
||||
@return Page table base address.
|
||||
|
||||
@ -124,7 +124,7 @@ S3AllocatePageTablesBuffer (
|
||||
IN BOOLEAN LongModeWakingVectorSupport
|
||||
)
|
||||
{
|
||||
if (FeaturePcdGet (PcdDxeIplSwitchToLongMode)) {
|
||||
if ((FeaturePcdGet (PcdDxeIplSwitchToLongMode)) || (sizeof (UINTN) == sizeof (UINT64))) {
|
||||
UINTN ExtraPageTablePages;
|
||||
UINT32 RegEax;
|
||||
UINT32 RegEdx;
|
||||
|
Loading…
x
Reference in New Issue
Block a user