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MdePkg: Add Sec Platform Information2 PPI 

This is a new PPI introduced in PI 1.4 to pass multiple CPU information from
SEC phase to PEI/DXE phases.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17640 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
Jeff Fan 2015-06-16 02:53:43 +00:00 committed by vanjeff
parent 1c8e04591e
commit 8c5f799b4f
2 changed files with 105 additions and 17 deletions
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85
MdePkg/Include/Ppi/SecPlatformInformation2.h Normal file
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@ -0,0 +1,85 @@
/** @file
This file declares Sec Platform Information2 PPI.
This service is the primary handoff state into the PEI Foundation.
This service abstracts platform-specific information for many CPU's.
Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
@par Revision Reference:
This PPI is defined in PI Version 1.4.
**/
#ifndef __SEC_PLATFORM_INFORMATION2_PPI_H__
#define __SEC_PLATFORM_INFORMATION2_PPI_H__
#include <Ppi/SecPlatformInformation.h>
#define EFI_SEC_PLATFORM_INFORMATION2_GUID \
{ \
0x9e9f374b, 0x8f16, 0x4230, {0x98, 0x24, 0x58, 0x46, 0xee, 0x76, 0x6a, 0x97 } \
}
typedef struct _EFI_SEC_PLATFORM_INFORMATION2_PPI EFI_SEC_PLATFORM_INFORMATION2_PPI;
///
/// EFI_SEC_PLATFORM_INFORMATION_CPU.
///
typedef struct {
UINT32 CpuLocation;
EFI_SEC_PLATFORM_INFORMATION_RECORD InfoRecord;
} EFI_SEC_PLATFORM_INFORMATION_CPU;
///
/// EFI_SEC_PLATFORM_INFORMATION_RECORD2.
///
typedef struct {
///
/// The CPU location would be the local APIC ID
///
UINT32 NumberOfCpus;
EFI_SEC_PLATFORM_INFORMATION_CPU CpuInstance[1];
} EFI_SEC_PLATFORM_INFORMATION_RECORD2;
/**
This interface conveys state information out of the Security (SEC) phase into PEI.
This service is published by the SEC phase.
@param PeiServices The pointer to the PEI Services Table.
@param StructureSize The pointer to the variable describing size of the input buffer.
@param PlatformInformationRecord2 The pointer to the EFI_SEC_PLATFORM_INFORMATION_RECORD2.
@retval EFI_SUCCESS The data was successfully returned.
@retval EFI_BUFFER_TOO_SMALL The buffer was too small. The current buffer size needed to
hold the record is returned in StructureSize.
**/
typedef
EFI_STATUS
(EFIAPI *EFI_SEC_PLATFORM_INFORMATION2)(
IN CONST EFI_PEI_SERVICES **PeiServices,
IN OUT UINT64 *StructureSize,
OUT EFI_SEC_PLATFORM_INFORMATION_RECORD2 *PlatformInformationRecord2
);
///
/// This service abstracts platform-specific information for many CPU's.
/// It is the multi-processor equivalent of PlatformInformation for
/// implementations that synchronize all CPU's in the SEC phase.
///
struct _EFI_SEC_PLATFORM_INFORMATION2_PPI {
EFI_SEC_PLATFORM_INFORMATION2 PlatformInformation2;
};
extern EFI_GUID gEfiSecPlatformInformation2PpiGuid;
#endif

3
MdePkg/MdePkg.dec
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@ -855,6 +855,9 @@
## Include/Ppi/BlockIo2.h
gEfiPeiVirtualBlockIo2PpiGuid = { 0x26cc0fad, 0xbeb3, 0x478a, { 0x91, 0xb2, 0xc, 0x18, 0x8f, 0x72, 0x61, 0x98 }}
## Include/Ppi/SecPlatformInformation.h
gEfiSecPlatformInformation2PpiGuid = { 0x9e9f374b, 0x8f16, 0x4230, {0x98, 0x24, 0x58, 0x46, 0xee, 0x76, 0x6a, 0x97 } }
[Protocols]
## Include/Protocol/Pcd.h
gPcdProtocolGuid = { 0x11B34006, 0xD85B, 0x4D0A, { 0xA2, 0x90, 0xD5, 0xA5, 0x71, 0x31, 0x0E, 0xF7 }}