DynamicTablesPkg: Set the Access size for the DBG2 table

The DBG2 table generator set the access size for the UART to
DWORD (4 bytes) by default. However, according to Section B
Generic UART, Arm Base System Architecture 1.0, Platform
Design Document, a Generic UART can have BYTE, WORD or DWORD
access sizes. To address this an AccessSize field has been
introduced in CM_ARM_SERIAL_PORT_INFO object.

This patch updates the DBG2 generator to setup the AccessSize
field in the Generic Address Structure (GAS) for the UART in
the DBG2 table with information provided by the platform.

Signed-off-by: Joey Gouly <joey.gouly@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
This commit is contained in:
Joey Gouly 2021-04-15 13:17:20 +01:00 committed by mergify[bot]
parent a300f2a3f5
commit 8c75a07208
1 changed files with 23 additions and 1 deletions

View File

@ -1,7 +1,7 @@
/** @file
DBG2 Table Generator
Copyright (c) 2017 - 2020, Arm Limited. All rights reserved.<BR>
Copyright (c) 2017 - 2021, Arm Limited. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
@ -420,6 +420,28 @@ BuildDbg2TableEx (
AcpiDbg2.Dbg2DeviceInfo[INDEX_DBG_PORT0].BaseAddressRegister.Address =
SerialPortInfo->BaseAddress;
// Set the access size
if (SerialPortInfo->AccessSize >= EFI_ACPI_6_3_QWORD) {
Status = EFI_INVALID_PARAMETER;
DEBUG ((
DEBUG_ERROR,
"ERROR: DBG2: Access size must be <= 3 (DWORD). Status = %r\n",
Status
));
goto error_handler;
} else if (SerialPortInfo->AccessSize == EFI_ACPI_6_3_UNDEFINED) {
// 0 Undefined (legacy reasons)
// Default to DWORD access size as the access
// size field was introduced at a later date
// and some ConfigurationManager implementations
// may not be providing this field data
AcpiDbg2.Dbg2DeviceInfo[INDEX_DBG_PORT0].BaseAddressRegister.AccessSize =
EFI_ACPI_6_3_DWORD;
} else {
AcpiDbg2.Dbg2DeviceInfo[INDEX_DBG_PORT0].BaseAddressRegister.AccessSize =
SerialPortInfo->AccessSize;
}
// Update the serial port subtype
AcpiDbg2.Dbg2DeviceInfo[INDEX_DBG_PORT0].Dbg2Device.PortSubtype =
SerialPortInfo->PortSubtype;