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Resolved several warnings generated by GCC. 

In PcatPciRootBridge.c -> GetPciExpressBaseAddressForRootBridge,
fixed a hang condition if the PCI Express Base Address HOB is
not present.


git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@6684 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
jljusten 2008-11-23 23:55:02 +00:00
parent d4f59c13fb
commit 8e53d24672
4 changed files with 22 additions and 31 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
DuetPkg/PciRootBridgeNoEnumerationDxe/DeviceIo.c
View File

@ -1,6 +1,6 @@
/*++ /*++
Copyright (c) 2006, Intel Corporation Copyright (c) 2006 - 2008, Intel Corporation
All rights reserved. This program and the accompanying materials All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at which accompanies this distribution. The full text of the license may be found at
@ -141,7 +141,7 @@ Returns:
Status = Private->PciRootBridgeIo->CopyMem ( Status = Private->PciRootBridgeIo->CopyMem (
Private->PciRootBridgeIo, Private->PciRootBridgeIo,
(EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH) Width, (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH) Width,
(UINT64) Buffer, (UINT64)(UINTN) Buffer,
Address, Address,
Count Count
); );
@ -206,7 +206,7 @@ Returns:
Private->PciRootBridgeIo, Private->PciRootBridgeIo,
(EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH) Width, (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH) Width,
Address, Address,
(UINT64) Buffer, (UINT64)(UINTN) Buffer,
Count Count
); );
} else { } else {

8
DuetPkg/PciRootBridgeNoEnumerationDxe/Ia32/PcatIo.c
View File

@ -1,6 +1,6 @@
/*++ /*++
Copyright (c) 2005 - 2006, Intel Corporation Copyright (c) 2005 - 2008, Intel Corporation
All rights reserved. This program and the accompanying materials All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at which accompanies this distribution. The full text of the license may be found at
@ -608,7 +608,7 @@ ScanPciRootBridgeForRoms(
mPciOptionRomTableInstalled = TRUE; mPciOptionRomTableInstalled = TRUE;
} }
Status = IoDev->Configuration(IoDev, &Descriptors); Status = IoDev->Configuration(IoDev, (VOID **)&Descriptors);
if (EFI_ERROR (Status) || Descriptors == NULL) { if (EFI_ERROR (Status) || Descriptors == NULL) {
return EFI_NOT_FOUND; return EFI_NOT_FOUND;
} }
@ -632,7 +632,7 @@ ScanPciRootBridgeForRoms(
// //
// Find Memory Descriptors that are less than 4GB, so the PPB Memory Window can be used for downstream devices // Find Memory Descriptors that are less than 4GB, so the PPB Memory Window can be used for downstream devices
// //
if (Descriptors->AddrRangeMax < 0x100000000) { if (Descriptors->AddrRangeMax < 0x100000000ULL) {
// //
// Find the largest Non-Prefetchable Memory Descriptor that is less than 4GB // Find the largest Non-Prefetchable Memory Descriptor that is less than 4GB
// //
@ -679,7 +679,7 @@ ScanPciRootBridgeForRoms(
Status = gBS->AllocatePool( Status = gBS->AllocatePool(
EfiBootServicesData, EfiBootServicesData,
sizeof(UINT16) * (MaxBus - MinBus + 1) * (PCI_MAX_DEVICE+1) * (PCI_MAX_FUNC+1), sizeof(UINT16) * (MaxBus - MinBus + 1) * (PCI_MAX_DEVICE+1) * (PCI_MAX_FUNC+1),
&Context.CommandRegisterBuffer (VOID **)&Context.CommandRegisterBuffer
); );
if (EFI_ERROR (Status)) { if (EFI_ERROR (Status)) {

31
DuetPkg/PciRootBridgeNoEnumerationDxe/PcatPciRootBridge.c
View File

@ -1,6 +1,6 @@
/*++ /*++
Copyright (c) 2005 - 2006, Intel Corporation Copyright (c) 2005 - 2008, Intel Corporation
All rights reserved. This program and the accompanying materials All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at which accompanies this distribution. The full text of the license may be found at
@ -62,7 +62,7 @@ Returns:
// //
// Initialize gCpuIo now since the chipset init code requires it. // Initialize gCpuIo now since the chipset init code requires it.
// //
Status = gBS->LocateProtocol (&gEfiCpuIoProtocolGuid, NULL, &gCpuIo); Status = gBS->LocateProtocol (&gEfiCpuIoProtocolGuid, NULL, (VOID **)&gCpuIo);
ASSERT_EFI_ERROR (Status); ASSERT_EFI_ERROR (Status);
// //
@ -79,7 +79,7 @@ Returns:
Status = gBS->AllocatePool( Status = gBS->AllocatePool(
EfiBootServicesData, EfiBootServicesData,
sizeof (PCAT_PCI_ROOT_BRIDGE_INSTANCE), sizeof (PCAT_PCI_ROOT_BRIDGE_INSTANCE),
&PrivateData (VOID **)&PrivateData
); );
if (EFI_ERROR (Status)) { if (EFI_ERROR (Status)) {
goto Done; goto Done;
@ -104,10 +104,10 @@ Returns:
PrivateData->IoBase = 0xffffffff; PrivateData->IoBase = 0xffffffff;
PrivateData->MemBase = 0xffffffff; PrivateData->MemBase = 0xffffffff;
PrivateData->Mem32Base = 0xffffffffffffffff; PrivateData->Mem32Base = 0xffffffffffffffffULL;
PrivateData->Pmem32Base = 0xffffffffffffffff; PrivateData->Pmem32Base = 0xffffffffffffffffULL;
PrivateData->Mem64Base = 0xffffffffffffffff; PrivateData->Mem64Base = 0xffffffffffffffffULL;
PrivateData->Pmem64Base = 0xffffffffffffffff; PrivateData->Pmem64Base = 0xffffffffffffffffULL;
// //
// The default mechanism for performing PCI Configuration cycles is to // The default mechanism for performing PCI Configuration cycles is to
@ -217,6 +217,7 @@ Returns:
break; break;
} }
// //
// Increment the number of PCI device found on the primary bus of the PCI root bridge // Increment the number of PCI device found on the primary bus of the PCI root bridge
// //
@ -592,7 +593,7 @@ Returns:
Status = gBS->AllocatePool ( Status = gBS->AllocatePool (
EfiBootServicesData, EfiBootServicesData,
sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) + sizeof (EFI_ACPI_END_TAG_DESCRIPTOR), sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) + sizeof (EFI_ACPI_END_TAG_DESCRIPTOR),
&PrivateData->Configuration (VOID **)&PrivateData->Configuration
); );
if (EFI_ERROR (Status )) { if (EFI_ERROR (Status )) {
return Status; return Status;
@ -621,7 +622,7 @@ Returns:
Status = gBS->AllocatePool ( Status = gBS->AllocatePool (
EfiBootServicesData, EfiBootServicesData,
sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) * NumConfig + sizeof (EFI_ACPI_END_TAG_DESCRIPTOR), sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) * NumConfig + sizeof (EFI_ACPI_END_TAG_DESCRIPTOR),
&PrivateData->Configuration (VOID **)&PrivateData->Configuration
); );
if (EFI_ERROR (Status )) { if (EFI_ERROR (Status )) {
return Status; return Status;
@ -974,24 +975,14 @@ Returns:
UINTN BufferSize; UINTN BufferSize;
UINT32 Index; UINT32 Index;
UINT32 Number; UINT32 Number;
VOID *HobList;
EFI_STATUS Status;
EFI_PEI_HOB_POINTERS GuidHob; EFI_PEI_HOB_POINTERS GuidHob;
//
// Get Hob List from configuration table
//
Status = EfiGetSystemConfigurationTable (&gEfiHobListGuid, &HobList);
if (EFI_ERROR (Status)) {
return 0;
}
// //
// Get PciExpressAddressInfo Hob // Get PciExpressAddressInfo Hob
// //
PciExpressBaseAddressInfo = NULL; PciExpressBaseAddressInfo = NULL;
BufferSize = 0; BufferSize = 0;
GuidHob.Raw = GetNextGuidHob (&gEfiPciExpressBaseAddressGuid, &HobList); GuidHob.Raw = GetFirstGuidHob (&gEfiPciExpressBaseAddressGuid);
if (GuidHob.Raw != NULL) { if (GuidHob.Raw != NULL) {
PciExpressBaseAddressInfo = GET_GUID_HOB_DATA (GuidHob.Guid); PciExpressBaseAddressInfo = GET_GUID_HOB_DATA (GuidHob.Guid);
BufferSize = GET_GUID_HOB_DATA_SIZE (GuidHob.Guid); BufferSize = GET_GUID_HOB_DATA_SIZE (GuidHob.Guid);

8
DuetPkg/PciRootBridgeNoEnumerationDxe/PcatPciRootBridgeIo.c
View File

@ -1,6 +1,6 @@
/*++ /*++
Copyright (c) 2005 - 2007, Intel Corporation Copyright (c) 2005 - 2008, Intel Corporation
All rights reserved. This program and the accompanying materials All rights reserved. This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at which accompanies this distribution. The full text of the license may be found at
@ -635,7 +635,7 @@ PcatRootBridgeIoMap (
// map the DMA transfer to a buffer below 4GB. // map the DMA transfer to a buffer below 4GB.
// //
PhysicalAddress = (EFI_PHYSICAL_ADDRESS)(UINTN)HostAddress; PhysicalAddress = (EFI_PHYSICAL_ADDRESS)(UINTN)HostAddress;
if ((PhysicalAddress + *NumberOfBytes) > 0x100000000) { if ((PhysicalAddress + *NumberOfBytes) > 0x100000000ULL) {
// //
// Common Buffer operations can not be remapped. If the common buffer // Common Buffer operations can not be remapped. If the common buffer
@ -653,7 +653,7 @@ PcatRootBridgeIoMap (
Status = gBS->AllocatePool ( Status = gBS->AllocatePool (
EfiBootServicesData, EfiBootServicesData,
sizeof(MAP_INFO), sizeof(MAP_INFO),
&MapInfo (VOID **)&MapInfo
); );
if (EFI_ERROR (Status)) { if (EFI_ERROR (Status)) {
*NumberOfBytes = 0; *NumberOfBytes = 0;
@ -706,7 +706,7 @@ PcatRootBridgeIoMap (
Status =gBS->AllocatePool ( Status =gBS->AllocatePool (
EfiBootServicesData, EfiBootServicesData,
sizeof(MAP_INFO_INSTANCE), sizeof(MAP_INFO_INSTANCE),
&MapInstance (VOID **)&MapInstance
); );
if (EFI_ERROR(Status)) { if (EFI_ERROR(Status)) {
gBS->FreePages (MapInfo->MappedHostAddress,MapInfo->NumberOfPages); gBS->FreePages (MapInfo->MappedHostAddress,MapInfo->NumberOfPages);