mirror of
https://github.com/acidanthera/audk.git
synced 2025-04-08 17:05:09 +02:00
Fix line ending issue. Update DMA Map primatives to double buffer if buffer does not start on cache line boundary. If buffer is not a multiple of a cache line only whole cache lines will be allowed in the buffer. This is part of the MAP API.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10547 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
andrewfish
parent
d744b79c0f
commit
8e7c9e030f
@ -21,6 +21,8 @@
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#include <Library/UefiBootServicesTableLib.h>
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#include <Library/UncachedMemoryAllocationLib.h>
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#include <Library/IoLib.h>
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#include <Library/BaseMemoryLib.h>
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#include <Library/ArmLib.h>
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#include <Omap3530/Omap3530.h>
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#include <Protocol/Cpu.h>
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@ -30,11 +32,13 @@ typedef struct {
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EFI_PHYSICAL_ADDRESS DeviceAddress;
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UINTN NumberOfBytes;
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DMA_MAP_OPERATION Operation;
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BOOLEAN DoubleBuffer;
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} MAP_INFO_INSTANCE;
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EFI_CPU_ARCH_PROTOCOL *gCpu;
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EFI_CPU_ARCH_PROTOCOL *gCpu;
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UINTN gCacheAlignment = 0;
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/**
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Configure OMAP DMA Channel
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@ -46,21 +50,21 @@ EFI_CPU_ARCH_PROTOCOL *gCpu;
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@retval EFI_INVALID_PARAMETER Channel is not valid
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@retval EFI_DEVICE_ERROR The system hardware could not map the requested information.
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**/
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EFI_STATUS
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EFIAPI
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EnableDmaChannel (
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IN UINTN Channel,
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IN OMAP_DMA4 *DMA4
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)
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{
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UINT32 RegVal;
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if (Channel > DMA4_MAX_CHANNEL) {
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return EFI_INVALID_PARAMETER;
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}
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**/
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EFI_STATUS
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EFIAPI
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EnableDmaChannel (
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IN UINTN Channel,
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IN OMAP_DMA4 *DMA4
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)
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{
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UINT32 RegVal;
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if (Channel > DMA4_MAX_CHANNEL) {
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return EFI_INVALID_PARAMETER;
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}
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/* 1) Configure the transfer parameters in the logical DMA registers */
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/*-------------------------------------------------------------------*/
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@ -135,11 +139,11 @@ EnableDmaChannel (
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/* 2) Start the DMA transfer by Setting the enable bit CCR[7]=1 */
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/*--------------------------------------------------------------*/
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//write enable bit
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MmioOr32 (DMA4_CCR(Channel), DMA4_CCR_ENABLE); //Launch transfer
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return EFI_SUCCESS;
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}
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MmioOr32 (DMA4_CCR(Channel), DMA4_CCR_ENABLE); //Launch transfer
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return EFI_SUCCESS;
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}
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/**
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Turn of DMA channel configured by EnableDma().
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@ -151,43 +155,43 @@ EnableDmaChannel (
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@retval EFI_INVALID_PARAMETER Channel is not valid
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@retval EFI_DEVICE_ERROR The system hardware could not map the requested information.
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**/
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EFI_STATUS
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EFIAPI
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DisableDmaChannel (
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IN UINTN Channel,
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IN UINT32 SuccessMask,
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IN UINT32 ErrorMask
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)
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{
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EFI_STATUS Status = EFI_SUCCESS;
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UINT32 Reg;
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if (Channel > DMA4_MAX_CHANNEL) {
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return EFI_INVALID_PARAMETER;
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}
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do {
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Reg = MmioRead32 (DMA4_CSR(Channel));
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if ((Reg & ErrorMask) != 0) {
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Status = EFI_DEVICE_ERROR;
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DEBUG ((EFI_D_ERROR, "DMA Error (%d) %x\n", Channel, Reg));
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break;
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}
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} while ((Reg & SuccessMask) != SuccessMask);
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// Disable all status bits and clear them
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**/
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EFI_STATUS
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EFIAPI
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DisableDmaChannel (
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IN UINTN Channel,
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IN UINT32 SuccessMask,
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IN UINT32 ErrorMask
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)
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{
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EFI_STATUS Status = EFI_SUCCESS;
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UINT32 Reg;
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if (Channel > DMA4_MAX_CHANNEL) {
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return EFI_INVALID_PARAMETER;
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}
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do {
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Reg = MmioRead32 (DMA4_CSR(Channel));
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if ((Reg & ErrorMask) != 0) {
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Status = EFI_DEVICE_ERROR;
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DEBUG ((EFI_D_ERROR, "DMA Error (%d) %x\n", Channel, Reg));
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break;
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}
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} while ((Reg & SuccessMask) != SuccessMask);
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// Disable all status bits and clear them
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MmioWrite32 (DMA4_CICR (Channel), 0);
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MmioWrite32 (DMA4_CSR (Channel), DMA4_CSR_RESET);
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MmioAnd32 (DMA4_CCR(0), ~(DMA4_CCR_ENABLE | DMA4_CCR_RD_ACTIVE | DMA4_CCR_WR_ACTIVE));
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return Status;
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}
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MmioWrite32 (DMA4_CSR (Channel), DMA4_CSR_RESET);
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MmioAnd32 (DMA4_CCR(0), ~(DMA4_CCR_ENABLE | DMA4_CCR_RD_ACTIVE | DMA4_CCR_WR_ACTIVE));
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return Status;
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}
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/**
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Provides the DMA controller-specific addresses needed to access system memory.
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@ -207,51 +211,76 @@ DisableDmaChannel (
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@retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
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@retval EFI_DEVICE_ERROR The system hardware could not map the requested address.
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**/
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EFI_STATUS
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EFIAPI
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DmaMap (
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IN DMA_MAP_OPERATION Operation,
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**/
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EFI_STATUS
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EFIAPI
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DmaMap (
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IN DMA_MAP_OPERATION Operation,
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IN VOID *HostAddress,
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IN OUT UINTN *NumberOfBytes,
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OUT PHYSICAL_ADDRESS *DeviceAddress,
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OUT VOID **Mapping
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)
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{
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MAP_INFO_INSTANCE *Map;
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if ( HostAddress == NULL || NumberOfBytes == NULL ||
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DeviceAddress == NULL || Mapping == NULL ) {
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return EFI_INVALID_PARAMETER;
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}
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if (Operation >= MapOperationMaximum) {
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return EFI_INVALID_PARAMETER;
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}
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*DeviceAddress = ConvertToPhysicalAddress (HostAddress);
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// Remember range so we can flush on the other side
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Map = AllocatePool (sizeof (MAP_INFO_INSTANCE));
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if (Map == NULL) {
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return EFI_OUT_OF_RESOURCES;
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}
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*Mapping = Map;
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Map->HostAddress = (UINTN)HostAddress;
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Map->DeviceAddress = *DeviceAddress;
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Map->NumberOfBytes = *NumberOfBytes;
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Map->Operation = Operation;
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// EfiCpuFlushTypeWriteBack, EfiCpuFlushTypeInvalidate
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gCpu->FlushDataCache (gCpu, (EFI_PHYSICAL_ADDRESS)(UINTN)HostAddress, *NumberOfBytes, EfiCpuFlushTypeWriteBackInvalidate);
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return EFI_SUCCESS;
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}
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)
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{
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EFI_STATUS Status;
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MAP_INFO_INSTANCE *Map;
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VOID *Buffer;
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if ( HostAddress == NULL || NumberOfBytes == NULL ||
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DeviceAddress == NULL || Mapping == NULL ) {
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return EFI_INVALID_PARAMETER;
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}
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if (Operation >= MapOperationMaximum) {
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return EFI_INVALID_PARAMETER;
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}
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*DeviceAddress = ConvertToPhysicalAddress (HostAddress);
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// Remember range so we can flush on the other side
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Map = AllocatePool (sizeof (MAP_INFO_INSTANCE));
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if (Map == NULL) {
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return EFI_OUT_OF_RESOURCES;
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}
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*Mapping = Map;
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if (((UINTN)HostAddress & (gCacheAlignment - 1)) != 0) {
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Map->DoubleBuffer = TRUE;
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Status = DmaAllocateBuffer (EfiBootServicesData, EFI_SIZE_TO_PAGES (*NumberOfBytes), &Buffer);
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if (EFI_ERROR (Status)) {
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return Status;
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}
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*DeviceAddress = (PHYSICAL_ADDRESS)(UINTN)Buffer;
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} else {
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Map->DoubleBuffer = FALSE;
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}
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*NumberOfBytes &= *NumberOfBytes & ~(gCacheAlignment - 1); // Only do it on full cache lines
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Map->HostAddress = (UINTN)HostAddress;
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Map->DeviceAddress = *DeviceAddress;
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Map->NumberOfBytes = *NumberOfBytes;
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Map->Operation = Operation;
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if (Map->DoubleBuffer) {
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if (Map->Operation == MapOperationBusMasterWrite) {
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CopyMem ((VOID *)(UINTN)Map->DeviceAddress, (VOID *)(UINTN)Map->HostAddress, Map->NumberOfBytes);
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}
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} else {
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// EfiCpuFlushTypeWriteBack, EfiCpuFlushTypeInvalidate
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if (Map->Operation == MapOperationBusMasterWrite || Map->Operation == MapOperationBusMasterRead) {
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gCpu->FlushDataCache (gCpu, (EFI_PHYSICAL_ADDRESS)(UINTN)HostAddress, Map->NumberOfBytes, EfiCpuFlushTypeWriteBackInvalidate);
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}
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}
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return EFI_SUCCESS;
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}
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/**
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Completes the DmaMapBusMasterRead(), DmaMapBusMasterWrite(), or DmaMapBusMasterCommonBuffer()
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operation and releases any corresponding resources.
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@ -261,33 +290,43 @@ DmaMap (
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@retval EFI_SUCCESS The range was unmapped.
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@retval EFI_DEVICE_ERROR The data was not committed to the target system memory.
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**/
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EFI_STATUS
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EFIAPI
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DmaUnmap (
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**/
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EFI_STATUS
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EFIAPI
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DmaUnmap (
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IN VOID *Mapping
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)
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{
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MAP_INFO_INSTANCE *Map;
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if (Mapping == NULL) {
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ASSERT (FALSE);
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return EFI_INVALID_PARAMETER;
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}
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Map = (MAP_INFO_INSTANCE *)Mapping;
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if (Map->Operation == MapOperationBusMasterWrite) {
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//
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// Make sure we read buffer from uncached memory and not the cache
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//
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gCpu->FlushDataCache (gCpu, Map->HostAddress, Map->NumberOfBytes, EfiCpuFlushTypeInvalidate);
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}
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FreePool (Map);
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return EFI_SUCCESS;
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}
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)
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{
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MAP_INFO_INSTANCE *Map;
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if (Mapping == NULL) {
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ASSERT (FALSE);
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return EFI_INVALID_PARAMETER;
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}
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Map = (MAP_INFO_INSTANCE *)Mapping;
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if (Map->DoubleBuffer) {
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if (Map->Operation == MapOperationBusMasterRead) {
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CopyMem ((VOID *)(UINTN)Map->HostAddress, (VOID *)(UINTN)Map->DeviceAddress, Map->NumberOfBytes);
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}
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DmaFreeBuffer (EFI_SIZE_TO_PAGES (Map->NumberOfBytes), (VOID *)(UINTN)Map->DeviceAddress);
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} else {
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if (Map->Operation == MapOperationBusMasterWrite) {
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//
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// Make sure we read buffer from uncached memory and not the cache
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//
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gCpu->FlushDataCache (gCpu, Map->HostAddress, Map->NumberOfBytes, EfiCpuFlushTypeInvalidate);
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}
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}
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FreePool (Map);
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return EFI_SUCCESS;
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}
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/**
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Allocates pages that are suitable for an DmaMap() of type MapOperationBusMasterCommonBuffer.
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mapping.
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@ -304,35 +343,36 @@ DmaUnmap (
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@retval EFI_INVALID_PARAMETER One or more parameters are invalid.
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@retval EFI_OUT_OF_RESOURCES The memory pages could not be allocated.
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**/EFI_STATUS
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EFIAPI
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DmaAllocateBuffer (
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IN EFI_MEMORY_TYPE MemoryType,
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**/
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EFI_STATUS
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EFIAPI
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DmaAllocateBuffer (
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IN EFI_MEMORY_TYPE MemoryType,
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IN UINTN Pages,
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OUT VOID **HostAddress
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)
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{
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if (HostAddress == NULL) {
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return EFI_INVALID_PARAMETER;
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}
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//
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// The only valid memory types are EfiBootServicesData and EfiRuntimeServicesData
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//
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// We used uncached memory to keep coherency
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//
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if (MemoryType == EfiBootServicesData) {
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*HostAddress = UncachedAllocatePages (Pages);
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} else if (MemoryType != EfiRuntimeServicesData) {
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*HostAddress = UncachedAllocateRuntimePages (Pages);
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} else {
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return EFI_INVALID_PARAMETER;
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}
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return EFI_SUCCESS;
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}
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{
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if (HostAddress == NULL) {
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return EFI_INVALID_PARAMETER;
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}
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//
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// The only valid memory types are EfiBootServicesData and EfiRuntimeServicesData
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//
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// We used uncached memory to keep coherency
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//
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if (MemoryType == EfiBootServicesData) {
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*HostAddress = UncachedAllocatePages (Pages);
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} else if (MemoryType != EfiRuntimeServicesData) {
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*HostAddress = UncachedAllocateRuntimePages (Pages);
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} else {
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return EFI_INVALID_PARAMETER;
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}
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return EFI_SUCCESS;
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}
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/**
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Frees memory that was allocated with DmaAllocateBuffer().
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@ -344,35 +384,37 @@ DmaAllocateBuffer (
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was not allocated with DmaAllocateBuffer().
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**/
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EFI_STATUS
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EFIAPI
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DmaFreeBuffer (
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EFI_STATUS
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EFIAPI
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DmaFreeBuffer (
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IN UINTN Pages,
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IN VOID *HostAddress
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)
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{
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if (HostAddress == NULL) {
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return EFI_INVALID_PARAMETER;
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}
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UncachedFreePages (HostAddress, Pages);
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return EFI_SUCCESS;
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}
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EFI_STATUS
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EFIAPI
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OmapDmaLibConstructor (
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IN EFI_HANDLE ImageHandle,
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IN EFI_SYSTEM_TABLE *SystemTable
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)
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{
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EFI_STATUS Status;
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// Get the Cpu protocol for later use
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Status = gBS->LocateProtocol (&gEfiCpuArchProtocolGuid, NULL, (VOID **)&gCpu);
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ASSERT_EFI_ERROR(Status);
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return EFI_SUCCESS;
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}
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{
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if (HostAddress == NULL) {
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return EFI_INVALID_PARAMETER;
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}
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UncachedFreePages (HostAddress, Pages);
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return EFI_SUCCESS;
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}
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EFI_STATUS
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EFIAPI
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OmapDmaLibConstructor (
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IN EFI_HANDLE ImageHandle,
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IN EFI_SYSTEM_TABLE *SystemTable
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)
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{
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EFI_STATUS Status;
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// Get the Cpu protocol for later use
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Status = gBS->LocateProtocol (&gEfiCpuArchProtocolGuid, NULL, (VOID **)&gCpu);
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ASSERT_EFI_ERROR(Status);
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gCacheAlignment = ArmDataCacheLineLength ();
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return Status;
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}
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@ -35,6 +35,8 @@
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MemoryAllocationLib
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UncachedMemoryAllocationLib
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IoLib
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BaseMemoryLib
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ArmLib
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[Protocols]
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