mirror of https://github.com/acidanthera/audk.git
SecurityPkg: Debug code to audit BIOS TPM extend operations
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2858 In V2: Fixed patch format and uncrustify cleanup In V1: Add debug functionality to examine TPM extend operations performed by BIOS and inspect the PCR 00 value prior to any BIOS measurements. Signed-off-by: Rodrigo Gonzalez del Cueto <rodrigo.gonzalez.del.cueto@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jian J Wang <jian.j.wang@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
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@ -1,7 +1,7 @@
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/** @file
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This library is used by other modules to send TPM2 command.
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Copyright (c) 2013 - 2018, Intel Corporation. All rights reserved. <BR>
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Copyright (c) 2013 - 2021, Intel Corporation. All rights reserved. <BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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@ -1113,4 +1113,21 @@ GetDigestFromDigestList (
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OUT VOID *Digest
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);
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/**
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This function will query the TPM to determine which hashing algorithms and
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get the digests of all active and supported PCR banks of a specific PCR register.
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@param[in] PcrHandle The index of the PCR register to be read.
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@param[out] HashList List of digests from PCR register being read.
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@retval EFI_SUCCESS The Pcr was read successfully.
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@retval EFI_DEVICE_ERROR The command was unsuccessful.
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**/
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EFI_STATUS
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EFIAPI
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Tpm2PcrReadForActiveBank (
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IN TPMI_DH_PCR PcrHandle,
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OUT TPML_DIGEST *HashList
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);
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#endif
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@ -1,7 +1,7 @@
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/** @file
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Implement TPM2 Integrity related command.
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Copyright (c) 2013 - 2018, Intel Corporation. All rights reserved. <BR>
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Copyright (c) 2013 - 2021, Intel Corporation. All rights reserved. <BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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@ -138,6 +138,23 @@ Tpm2PcrExtend (
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&Digests->digests[Index].digest,
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DigestSize
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);
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DEBUG_CODE_BEGIN ();
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UINTN Index2;
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DEBUG ((
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DEBUG_VERBOSE,
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"Tpm2PcrExtend - Hash = 0x%04x, Pcr[%02d], digest = ",
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Digests->digests[Index].hashAlg,
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(UINT8)PcrHandle
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));
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for (Index2 = 0; Index2 < DigestSize; Index2++) {
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DEBUG ((DEBUG_VERBOSE, "%02x ", Buffer[Index2]));
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}
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DEBUG ((DEBUG_VERBOSE, "\n"));
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DEBUG_CODE_END ();
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Buffer += DigestSize;
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}
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@ -172,6 +189,11 @@ Tpm2PcrExtend (
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return EFI_DEVICE_ERROR;
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}
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DEBUG_CODE_BEGIN ();
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DEBUG ((DEBUG_VERBOSE, "Tpm2PcrExtend: PCR read after extend...\n"));
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Tpm2PcrReadForActiveBank (PcrHandle, NULL);
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DEBUG_CODE_END ();
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//
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// Unmarshal the response
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//
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@ -705,3 +727,169 @@ Done:
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ZeroMem (&LocalAuthSession.hmac, sizeof (LocalAuthSession.hmac));
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return Status;
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}
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/**
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This function will query the TPM to determine which hashing algorithms and
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get the digests of all active and supported PCR banks of a specific PCR register.
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@param[in] PcrHandle The index of the PCR register to be read.
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@param[out] HashList List of digests from PCR register being read.
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@retval EFI_SUCCESS The Pcr was read successfully.
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@retval EFI_DEVICE_ERROR The command was unsuccessful.
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**/
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EFI_STATUS
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EFIAPI
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Tpm2PcrReadForActiveBank (
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IN TPMI_DH_PCR PcrHandle,
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OUT TPML_DIGEST *HashList
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)
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{
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EFI_STATUS Status;
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TPML_PCR_SELECTION Pcrs;
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TPML_PCR_SELECTION PcrSelectionIn;
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TPML_PCR_SELECTION PcrSelectionOut;
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TPML_DIGEST PcrValues;
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UINT32 PcrUpdateCounter;
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UINT8 PcrIndex;
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UINT32 TpmHashAlgorithmBitmap;
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TPMI_ALG_HASH CurrentPcrBankHash;
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UINT32 ActivePcrBanks;
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UINT32 TcgRegistryHashAlg;
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UINTN Index;
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UINTN Index2;
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PcrIndex = (UINT8)PcrHandle;
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if ((PcrIndex < 0) ||
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(PcrIndex >= IMPLEMENTATION_PCR))
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{
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return EFI_INVALID_PARAMETER;
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}
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ZeroMem (&PcrSelectionIn, sizeof (PcrSelectionIn));
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ZeroMem (&PcrUpdateCounter, sizeof (UINT32));
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ZeroMem (&PcrSelectionOut, sizeof (PcrSelectionOut));
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ZeroMem (&PcrValues, sizeof (PcrValues));
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ZeroMem (&Pcrs, sizeof (TPML_PCR_SELECTION));
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DEBUG ((DEBUG_INFO, "ReadPcr - %02d\n", PcrIndex));
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//
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// Read TPM capabilities
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//
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Status = Tpm2GetCapabilityPcrs (&Pcrs);
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if (EFI_ERROR (Status)) {
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DEBUG ((DEBUG_ERROR, "ReadPcr: Unable to read TPM capabilities\n"));
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return EFI_DEVICE_ERROR;
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}
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//
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// Get Active Pcrs
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//
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Status = Tpm2GetCapabilitySupportedAndActivePcrs (
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&TpmHashAlgorithmBitmap,
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&ActivePcrBanks
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);
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if (EFI_ERROR (Status)) {
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DEBUG ((DEBUG_ERROR, "ReadPcr: Unable to read TPM capabilities and active PCRs\n"));
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return EFI_DEVICE_ERROR;
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}
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//
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// Select from Active PCRs
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//
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for (Index = 0; Index < Pcrs.count; Index++) {
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CurrentPcrBankHash = Pcrs.pcrSelections[Index].hash;
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switch (CurrentPcrBankHash) {
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case TPM_ALG_SHA1:
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DEBUG ((DEBUG_VERBOSE, "HASH_ALG_SHA1 Present\n"));
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TcgRegistryHashAlg = HASH_ALG_SHA1;
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break;
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case TPM_ALG_SHA256:
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DEBUG ((DEBUG_VERBOSE, "HASH_ALG_SHA256 Present\n"));
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TcgRegistryHashAlg = HASH_ALG_SHA256;
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break;
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case TPM_ALG_SHA384:
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DEBUG ((DEBUG_VERBOSE, "HASH_ALG_SHA384 Present\n"));
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TcgRegistryHashAlg = HASH_ALG_SHA384;
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break;
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case TPM_ALG_SHA512:
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DEBUG ((DEBUG_VERBOSE, "HASH_ALG_SHA512 Present\n"));
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TcgRegistryHashAlg = HASH_ALG_SHA512;
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break;
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case TPM_ALG_SM3_256:
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DEBUG ((DEBUG_VERBOSE, "HASH_ALG_SM3 Present\n"));
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TcgRegistryHashAlg = HASH_ALG_SM3_256;
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break;
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default:
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//
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// Unsupported algorithm
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//
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DEBUG ((DEBUG_VERBOSE, "Unknown algorithm present\n"));
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TcgRegistryHashAlg = 0;
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break;
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}
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//
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// Skip unsupported and inactive PCR banks
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//
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if ((TcgRegistryHashAlg & ActivePcrBanks) == 0) {
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DEBUG ((DEBUG_VERBOSE, "Skipping unsupported or inactive bank: 0x%04x\n", CurrentPcrBankHash));
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continue;
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}
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//
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// Select PCR from current active bank
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//
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PcrSelectionIn.pcrSelections[PcrSelectionIn.count].hash = Pcrs.pcrSelections[Index].hash;
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PcrSelectionIn.pcrSelections[PcrSelectionIn.count].sizeofSelect = PCR_SELECT_MAX;
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PcrSelectionIn.pcrSelections[PcrSelectionIn.count].pcrSelect[0] = (PcrIndex < 8) ? 1 << PcrIndex : 0;
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PcrSelectionIn.pcrSelections[PcrSelectionIn.count].pcrSelect[1] = (PcrIndex > 7) && (PcrIndex < 16) ? 1 << (PcrIndex - 8) : 0;
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PcrSelectionIn.pcrSelections[PcrSelectionIn.count].pcrSelect[2] = (PcrIndex > 15) ? 1 << (PcrIndex - 16) : 0;
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PcrSelectionIn.count++;
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}
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//
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// Read PCRs
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//
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Status = Tpm2PcrRead (
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&PcrSelectionIn,
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&PcrUpdateCounter,
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&PcrSelectionOut,
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&PcrValues
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);
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if (EFI_ERROR (Status)) {
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DEBUG ((DEBUG_ERROR, "Tpm2PcrRead failed Status = %r \n", Status));
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return EFI_DEVICE_ERROR;
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}
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for (Index = 0; Index < PcrValues.count; Index++) {
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DEBUG ((
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DEBUG_INFO,
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"ReadPcr - HashAlg = 0x%04x, Pcr[%02d], digest = ",
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PcrSelectionOut.pcrSelections[Index].hash,
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PcrIndex
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));
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for (Index2 = 0; Index2 < PcrValues.digests[Index].size; Index2++) {
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DEBUG ((DEBUG_INFO, "%02x ", PcrValues.digests[Index].buffer[Index2]));
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}
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DEBUG ((DEBUG_INFO, "\n"));
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}
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if (HashList != NULL) {
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CopyMem (
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HashList,
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&PcrValues,
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sizeof (TPML_DIGEST)
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);
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}
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return EFI_SUCCESS;
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}
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@ -1,7 +1,7 @@
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/** @file
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Initialize TPM2 device and measure FVs before handing off control to DXE.
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Copyright (c) 2015 - 2020, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2015 - 2021, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2017, Microsoft Corporation. All rights reserved. <BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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@ -1106,6 +1106,13 @@ PeimEntryMA (
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}
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}
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DEBUG_CODE_BEGIN ();
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//
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// Peek into TPM PCR 00 before any BIOS measurement.
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//
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Tpm2PcrReadForActiveBank (00, NULL);
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DEBUG_CODE_END ();
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//
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// Only install TpmInitializedPpi on success
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//
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