mirror of https://github.com/acidanthera/audk.git
Clean up DxeIpl:
1. Remove the assembly by using IoLib & BaseLib in MdePkg 2. Refine code to pass CYGWIN GCC tool chain build git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@7404 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
parent
3eb90413ba
commit
9008db4a28
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@ -305,7 +305,7 @@ Returns:
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PrintString(" WELCOME TO EFI WORLD!\n");
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EnterDxeMain (StackTop, Handoff->DxeCoreEntryPoint, gHob, PageTableBase);
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PrintString("Fail to enter DXE main!\n");
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//
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// Should never get here
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@ -27,6 +27,7 @@
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#include <Library/BaseMemoryLib.h>
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#include <Library/ReportStatusCodeLib.h>
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#include <Library/PrintLib.h>
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#include <Library/IoLib.h>
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#include <VariableFormat.h>
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#include <CpuIA32.h>
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@ -37,6 +37,7 @@
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BaseMemoryLib
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PrintLib
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ReportStatusCodeLib
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IoLib
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[Sources.common]
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DxeIpl.h
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@ -53,18 +54,14 @@
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Debug.h
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[Sources.x64]
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X64/CpuIoAccess.asm
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X64/EnterDxeCore.asm
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X64/EnterDxeCore.c
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X64/Paging.c
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X64/VirtualMemory.h
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[Sources.Ia32]
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Ia32/CpuIoAccess.asm
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Ia32/EnterDxeCore.asm
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Ia32/EnterDxeCore.c
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Ia32/Paging.c
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Ia32/VirtualMemory.h
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Ia32/CpuIoAccessGnu.c | GCC
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Ia32/EnterDxeCoreGnu.c | GCC
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#[BuildOptions.common]
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#MSFT:*_*_IA32_DLINK_FLAGS = /out:"$(BIN_DIR)\SecMain.exe" /base:0x10000000 /pdb:"$(BIN_DIR)\SecMain.pdb" /LIBPATH:"$(VCINSTALLDIR)\Lib" /LIBPATH:"$(VCINSTALLDIR)\PlatformSdk\Lib" /NOLOGO /SUBSYSTEM:CONSOLE /NODEFAULTLIB /IGNORE:4086 /MAP /OPT:REF /DEBUG /MACHINE:I386 /LTCG Kernel32.lib MSVCRTD.lib Gdi32.lib User32.lib Winmm.lib
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@ -24,7 +24,7 @@ Revision History:
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#include "Debug.h"
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#define EFI_DXE_FILE_GUID \
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{ 0xb1644c1a, 0xc16a, 0x4c5b, 0x88, 0xde, 0xea, 0xfb, 0xa9, 0x7e, 0x74, 0xd8 }
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{ 0xb1644c1a, 0xc16a, 0x4c5b, {0x88, 0xde, 0xea, 0xfb, 0xa9, 0x7e, 0x74, 0xd8 }}
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#define CPUID_EXTENDED_ADD_SIZE 0x80000008
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@ -92,7 +92,7 @@ HOB_TEMPLATE gHobTemplate = {
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0x0, // EFI_PHYSICAL_ADDRESS MemoryBaseAddress;
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0x0, // UINT64 MemoryLength;
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EfiBootServicesData, // EFI_MEMORY_TYPE MemoryType;
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0, 0, 0, 0 // Reserved Reserved[4];
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{0, 0, 0, 0} // Reserved Reserved[4];
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}
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},
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{ // MemoryAllocation for HOB's & Images
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@ -191,10 +191,14 @@ HOB_TEMPLATE gHobTemplate = {
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0x0 // EFI_PHYSICAL_ADDRESS of EntryPoint;
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},
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{ // Memory Map Hints to reduce fragmentation in the memory map
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EFI_HOB_TYPE_GUID_EXTENSION, // Hob type
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sizeof (MEMORY_TYPE_INFORMATION_HOB), // Hob size
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0, // reserved
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EFI_MEMORY_TYPE_INFORMATION_GUID,
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{
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{
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EFI_HOB_TYPE_GUID_EXTENSION, // Hob type
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sizeof (MEMORY_TYPE_INFORMATION_HOB), // Hob size
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0, // reserved
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},
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EFI_MEMORY_TYPE_INFORMATION_GUID
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},
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{
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{
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EfiACPIReclaimMemory,
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@ -239,31 +243,47 @@ HOB_TEMPLATE gHobTemplate = {
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}
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},
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{ // Pointer to ACPI Table
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EFI_HOB_TYPE_GUID_EXTENSION, // Hob type
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sizeof (TABLE_HOB), // Hob size
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0, // reserved
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EFI_ACPI_TABLE_GUID,
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{
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{
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EFI_HOB_TYPE_GUID_EXTENSION, // Hob type
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sizeof (TABLE_HOB), // Hob size
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0 // reserved
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},
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EFI_ACPI_TABLE_GUID
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},
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0
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},
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{ // Pointer to ACPI20 Table
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EFI_HOB_TYPE_GUID_EXTENSION, // Hob type
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sizeof (TABLE_HOB), // Hob size
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0, // reserved
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EFI_ACPI_20_TABLE_GUID,
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{
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{
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EFI_HOB_TYPE_GUID_EXTENSION, // Hob type
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sizeof (TABLE_HOB), // Hob size
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0 // reserved
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},
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EFI_ACPI_20_TABLE_GUID
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},
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0
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},
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{ // Pointer to SMBIOS Table
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EFI_HOB_TYPE_GUID_EXTENSION, // Hob type
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sizeof (TABLE_HOB), // Hob size
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0, // reserved
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EFI_SMBIOS_TABLE_GUID,
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{
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{
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EFI_HOB_TYPE_GUID_EXTENSION, // Hob type
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sizeof (TABLE_HOB), // Hob size
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0 // reserved
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},
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EFI_SMBIOS_TABLE_GUID
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},
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0
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},
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{ // Pointer to MPS Table
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EFI_HOB_TYPE_GUID_EXTENSION, // Hob type
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sizeof (TABLE_HOB), // Hob size
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0, // reserved
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EFI_MPS_TABLE_GUID,
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{
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{
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EFI_HOB_TYPE_GUID_EXTENSION, // Hob type
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sizeof (TABLE_HOB), // Hob size
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0, // reserved
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},
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EFI_MPS_TABLE_GUID
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},
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0
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},
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/**
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},
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**/
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{ // Pointer to ReportStatusCode
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EFI_HOB_TYPE_GUID_EXTENSION, // Hob type
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sizeof (PROTOCOL_HOB), // Hob size
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0, // reserved
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EFI_STATUS_CODE_RUNTIME_PROTOCOL_GUID,
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{
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{
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EFI_HOB_TYPE_GUID_EXTENSION, // Hob type
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sizeof (PROTOCOL_HOB), // Hob size
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0 // reserved
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},
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EFI_STATUS_CODE_RUNTIME_PROTOCOL_GUID
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},
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NULL
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},
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{ // EFILDR Memory Descriptor
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EFI_HOB_TYPE_GUID_EXTENSION, // Hob type
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sizeof (MEMORY_DESC_HOB), // Hob size
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0, // reserved
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EFI_LDR_MEMORY_DESCRIPTOR_GUID,
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{
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{
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EFI_HOB_TYPE_GUID_EXTENSION, // Hob type
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sizeof (MEMORY_DESC_HOB), // Hob size
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0 // reserved
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},
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EFI_LDR_MEMORY_DESCRIPTOR_GUID
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},
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0,
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NULL
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},
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{ // Pci Express Base Address Hob
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EFI_HOB_TYPE_GUID_EXTENSION, // Hob type
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sizeof (PCI_EXPRESS_BASE_HOB), // Hob size
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0, // reserved
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EFI_PCI_EXPRESS_BASE_ADDRESS_GUID,
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{
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{
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EFI_HOB_TYPE_GUID_EXTENSION, // Hob type
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sizeof (PCI_EXPRESS_BASE_HOB), // Hob size
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0 // reserved
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},
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EFI_PCI_EXPRESS_BASE_ADDRESS_GUID
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},
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{
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0,
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0,
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@ -330,12 +362,18 @@ HOB_TEMPLATE gHobTemplate = {
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}
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},
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{ // Acpi Description Hob
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EFI_HOB_TYPE_GUID_EXTENSION, // Hob type
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sizeof (ACPI_DESCRIPTION_HOB), // Hob size
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0, // reserved
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EFI_ACPI_DESCRIPTION_GUID,
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{
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0,
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{
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EFI_HOB_TYPE_GUID_EXTENSION, // Hob type
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sizeof (ACPI_DESCRIPTION_HOB), // Hob size
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0 // reserved
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},
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EFI_ACPI_DESCRIPTION_GUID
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},
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{
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{
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0,
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},
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}
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},
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{ // NV Storage FV Resource
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NV_STORAGE_FVB_SIZE // ResourceLength
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},
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{ // FVB holding NV Storage
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EFI_HOB_TYPE_GUID_EXTENSION, // Hob type
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sizeof (FVB_HOB),
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0,
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EFI_FLASH_MAP_HOB_GUID,
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{
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0, 0, 0, // Reserved[3]
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{
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EFI_HOB_TYPE_GUID_EXTENSION, // Hob type
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sizeof (FVB_HOB),
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0
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},
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EFI_FLASH_MAP_HOB_GUID
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},
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{
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{0, 0, 0}, // Reserved[3]
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EFI_FLASH_AREA_GUID_DEFINED, // AreaType
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EFI_SYSTEM_NV_DATA_HOB_GUID, // AreaTypeGuid
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1,
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{
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EFI_FLASH_AREA_FV | EFI_FLASH_AREA_MEMMAPPED_FV, // SubAreaData.Attributes
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0, // SubAreaData.Reserved
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0, // SubAreaData.Base (Fixed later)
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NV_STORAGE_FVB_SIZE, // SubAreaData.Length
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EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL_GUID // SubAreaData.FileSystem
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{
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EFI_FLASH_AREA_FV | EFI_FLASH_AREA_MEMMAPPED_FV, // SubAreaData.Attributes
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0, // SubAreaData.Reserved
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0, // SubAreaData.Base (Fixed later)
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NV_STORAGE_FVB_SIZE, // SubAreaData.Length
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EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL_GUID // SubAreaData.FileSystem
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}
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},
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0, // VolumeSignature (Fixed later)
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NV_STORAGE_FILE_PATH, // Mapped file without padding
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}
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},
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{ // NV Storage Hob
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EFI_HOB_TYPE_GUID_EXTENSION, // Hob type
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sizeof (FVB_HOB), // Hob size
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0, // reserved
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EFI_FLASH_MAP_HOB_GUID,
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{
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0, 0, 0, // Reserved[3]
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{
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EFI_HOB_TYPE_GUID_EXTENSION, // Hob type
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sizeof (FVB_HOB), // Hob size
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0 // reserved
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},
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EFI_FLASH_MAP_HOB_GUID
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},
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{
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{0, 0, 0}, // Reserved[3]
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EFI_FLASH_AREA_EFI_VARIABLES, // AreaType
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{ 0 }, // AreaTypeGuid
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1,
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{
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EFI_FLASH_AREA_SUBFV | EFI_FLASH_AREA_MEMMAPPED_FV, // SubAreaData.Attributes
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0, // SubAreaData.Reserved
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0, // SubAreaData.Base (Fixed later)
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NV_STORAGE_SIZE, // SubAreaData.Length
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EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL_GUID // SubAreaData.FileSystem
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{
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EFI_FLASH_AREA_SUBFV | EFI_FLASH_AREA_MEMMAPPED_FV, // SubAreaData.Attributes
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0, // SubAreaData.Reserved
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0, // SubAreaData.Base (Fixed later)
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NV_STORAGE_SIZE, // SubAreaData.Length
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EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL_GUID // SubAreaData.FileSystem
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}
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},
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0,
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NV_STORAGE_FILE_PATH,
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@ -404,21 +454,27 @@ HOB_TEMPLATE gHobTemplate = {
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}
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},
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{ // FVB holding FTW spaces including Working & Spare space
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EFI_HOB_TYPE_GUID_EXTENSION, // Hob type
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sizeof (FVB_HOB),
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0,
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EFI_FLASH_MAP_HOB_GUID,
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{
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0, 0, 0, // Reserved[3]
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{
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EFI_HOB_TYPE_GUID_EXTENSION, // Hob type
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sizeof (FVB_HOB),
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0
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},
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EFI_FLASH_MAP_HOB_GUID
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},
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{
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{0, 0, 0}, // Reserved[3]
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EFI_FLASH_AREA_GUID_DEFINED, // AreaType
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EFI_SYSTEM_NV_DATA_HOB_GUID, // AreaTypeGuid
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1,
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{
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EFI_FLASH_AREA_FV | EFI_FLASH_AREA_MEMMAPPED_FV, // SubAreaData.Attributes
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0, // SubAreaData.Reserved
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0, // SubAreaData.Base (Fixed later)
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NV_FTW_FVB_SIZE, // SubAreaData.Length
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EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL_GUID // SubAreaData.FileSystem
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{
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EFI_FLASH_AREA_FV | EFI_FLASH_AREA_MEMMAPPED_FV, // SubAreaData.Attributes
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0, // SubAreaData.Reserved
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0, // SubAreaData.Base (Fixed later)
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NV_FTW_FVB_SIZE, // SubAreaData.Length
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EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL_GUID // SubAreaData.FileSystem
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}
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},
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0,
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L"", // Empty String indicates using memory
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@ -427,21 +483,27 @@ HOB_TEMPLATE gHobTemplate = {
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}
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},
|
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{ // NV Ftw working Hob
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EFI_HOB_TYPE_GUID_EXTENSION, // Hob type
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sizeof (FVB_HOB), // Hob size
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||||
0, // reserved
|
||||
EFI_FLASH_MAP_HOB_GUID,
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{
|
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0, 0, 0, // Reserved[3]
|
||||
{
|
||||
EFI_HOB_TYPE_GUID_EXTENSION, // Hob type
|
||||
sizeof (FVB_HOB), // Hob size
|
||||
0 // reserved
|
||||
},
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EFI_FLASH_MAP_HOB_GUID
|
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},
|
||||
{
|
||||
{0, 0, 0}, // Reserved[3]
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EFI_FLASH_AREA_FTW_STATE, // AreaType
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{ 0 }, // AreaTypeGuid
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1,
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{
|
||||
EFI_FLASH_AREA_SUBFV | EFI_FLASH_AREA_MEMMAPPED_FV, // SubAreaData.Attributes
|
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0, // SubAreaData.Reserved
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0, // SubAreaData.Base (Fixed later)
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NV_FTW_WORKING_SIZE, // SubAreaData.Length
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EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL_GUID // SubAreaData.FileSystem
|
||||
{
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||||
EFI_FLASH_AREA_SUBFV | EFI_FLASH_AREA_MEMMAPPED_FV, // SubAreaData.Attributes
|
||||
0, // SubAreaData.Reserved
|
||||
0, // SubAreaData.Base (Fixed later)
|
||||
NV_FTW_WORKING_SIZE, // SubAreaData.Length
|
||||
EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL_GUID // SubAreaData.FileSystem
|
||||
}
|
||||
},
|
||||
0, // VolumeSignature
|
||||
L"",
|
||||
|
@ -450,21 +512,27 @@ HOB_TEMPLATE gHobTemplate = {
|
|||
}
|
||||
},
|
||||
{ // NV Ftw spare Hob
|
||||
EFI_HOB_TYPE_GUID_EXTENSION, // Hob type
|
||||
sizeof (FVB_HOB), // Hob size
|
||||
0, // reserved
|
||||
EFI_FLASH_MAP_HOB_GUID,
|
||||
{
|
||||
0, 0, 0, // Reserved[3]
|
||||
{
|
||||
EFI_HOB_TYPE_GUID_EXTENSION, // Hob type
|
||||
sizeof (FVB_HOB), // Hob size
|
||||
0 // reserved
|
||||
},
|
||||
EFI_FLASH_MAP_HOB_GUID
|
||||
},
|
||||
{
|
||||
{0, 0, 0}, // Reserved[3]
|
||||
EFI_FLASH_AREA_FTW_BACKUP, // AreaType
|
||||
{ 0 }, // AreaTypeGuid
|
||||
1,
|
||||
{
|
||||
EFI_FLASH_AREA_SUBFV | EFI_FLASH_AREA_MEMMAPPED_FV, // SubAreaData.Attributes
|
||||
0, // SubAreaData.Reserved
|
||||
0, // SubAreaData.Base (Fixed later)
|
||||
NV_FTW_SPARE_SIZE, // SubAreaData.Length
|
||||
EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL_GUID // SubAreaData.FileSystem
|
||||
{
|
||||
EFI_FLASH_AREA_SUBFV | EFI_FLASH_AREA_MEMMAPPED_FV, // SubAreaData.Attributes
|
||||
0, // SubAreaData.Reserved
|
||||
0, // SubAreaData.Base (Fixed later)
|
||||
NV_FTW_SPARE_SIZE, // SubAreaData.Length
|
||||
EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL_GUID // SubAreaData.FileSystem
|
||||
}
|
||||
},
|
||||
0,
|
||||
L"",
|
||||
|
|
|
@ -32,7 +32,7 @@ Revision History:
|
|||
#define NV_STORAGE_STATE 0x19000
|
||||
|
||||
#define EFI_LDR_MEMORY_DESCRIPTOR_GUID \
|
||||
{ 0x7701d7e5, 0x7d1d, 0x4432, 0xa4, 0x68, 0x67, 0x3d, 0xab, 0x8a, 0xde, 0x60 }
|
||||
{ 0x7701d7e5, 0x7d1d, 0x4432, {0xa4, 0x68, 0x67, 0x3d, 0xab, 0x8a, 0xde, 0x60}}
|
||||
|
||||
#pragma pack(1)
|
||||
|
||||
|
|
|
@ -1,62 +0,0 @@
|
|||
title CpuIoAccess.asm
|
||||
;------------------------------------------------------------------------------
|
||||
;
|
||||
; Copyright (c) 2006, Intel Corporation
|
||||
; All rights reserved. This program and the accompanying materials
|
||||
; are licensed and made available under the terms and conditions of the BSD License
|
||||
; which accompanies this distribution. The full text of the license may be found at
|
||||
; http://opensource.org/licenses/bsd-license.php
|
||||
;
|
||||
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
;
|
||||
; Module Name:
|
||||
; CpuIoAccess.asm
|
||||
;
|
||||
; Abstract:
|
||||
; CPU IO Abstraction
|
||||
;
|
||||
;------------------------------------------------------------------------------
|
||||
|
||||
.686
|
||||
.MODEL FLAT,C
|
||||
.CODE
|
||||
|
||||
|
||||
UINT8 TYPEDEF BYTE
|
||||
UINT16 TYPEDEF WORD
|
||||
UINT32 TYPEDEF DWORD
|
||||
UINT64 TYPEDEF QWORD
|
||||
UINTN TYPEDEF UINT32
|
||||
|
||||
|
||||
|
||||
;------------------------------------------------------------------------------
|
||||
; UINT8
|
||||
; CpuIoRead8 (
|
||||
; IN UINT16 Port
|
||||
; )
|
||||
;------------------------------------------------------------------------------
|
||||
CpuIoRead8 PROC PUBLIC Port:UINT16
|
||||
mov dx, Port
|
||||
in al, dx
|
||||
ret
|
||||
CpuIoRead8 ENDP
|
||||
|
||||
|
||||
;------------------------------------------------------------------------------
|
||||
; VOID
|
||||
; CpuIoWrite8 (
|
||||
; IN UINT16 Port,
|
||||
; IN UINT32 Data
|
||||
; )
|
||||
;------------------------------------------------------------------------------
|
||||
CpuIoWrite8 PROC PUBLIC Port:UINT16, Data:UINT32
|
||||
mov eax, Data
|
||||
mov dx, Port
|
||||
out dx, al
|
||||
ret
|
||||
CpuIoWrite8 ENDP
|
||||
|
||||
|
||||
END
|
|
@ -1,27 +0,0 @@
|
|||
UINT8
|
||||
EFIAPI
|
||||
CpuIoRead8 (
|
||||
IN UINT16 Port
|
||||
)
|
||||
{
|
||||
UINT8 Data;
|
||||
asm ( "inb %1, %0"
|
||||
: "=a"(Data)
|
||||
: "d"(Port)
|
||||
);
|
||||
return Data;
|
||||
}
|
||||
|
||||
VOID
|
||||
EFIAPI
|
||||
CpuIoWrite8 (
|
||||
IN UINT16 Port,
|
||||
IN UINT32 Data
|
||||
)
|
||||
{
|
||||
asm ( "outb %1, %0"
|
||||
: /* No outputs */
|
||||
: "d"(Port)
|
||||
, "a"((UINT8)Data)
|
||||
);
|
||||
}
|
|
@ -1,64 +0,0 @@
|
|||
TITLE EnterDxeCore.asm: Assembly code for the entering DxeCore
|
||||
;------------------------------------------------------------------------------
|
||||
;*
|
||||
;* Copyright 2006, Intel Corporation
|
||||
;* All rights reserved. This program and the accompanying materials
|
||||
;* are licensed and made available under the terms and conditions of the BSD License
|
||||
;* which accompanies this distribution. The full text of the license may be found at
|
||||
;* http://opensource.org/licenses/bsd-license.php
|
||||
;*
|
||||
;* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
;* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
;*
|
||||
;* EnterDxeCore.asm
|
||||
;*
|
||||
;* Abstract:
|
||||
;*
|
||||
;------------------------------------------------------------------------------
|
||||
|
||||
.686p
|
||||
.model flat
|
||||
|
||||
.code
|
||||
.stack
|
||||
.MMX
|
||||
.XMM
|
||||
|
||||
;
|
||||
; VOID
|
||||
; EnterDxeMain (
|
||||
; IN VOID *StackTop,
|
||||
; IN VOID *DxeCoreEntryPoint,
|
||||
; IN VOID *Hob,
|
||||
; IN VOID *PageTable
|
||||
; )
|
||||
;
|
||||
EnterDxeMain PROC C \
|
||||
StackTop:DWORD, \
|
||||
DxeCoreEntryPoint:DWORD, \
|
||||
Hob:DWORD, \
|
||||
PageTable:DWORD
|
||||
|
||||
mov eax, PageTable
|
||||
; mov cr3, eax ; load page table
|
||||
; mov eax, cr4
|
||||
; bts eax, 4 ; enable CR4.PSE
|
||||
; mov cr4, eax
|
||||
; mov eax, cr0
|
||||
; bts eax, 31 ; enable CR0.PG
|
||||
; mov cr0, eax
|
||||
mov ecx, DxeCoreEntryPoint
|
||||
mov eax, StackTop
|
||||
mov esp, eax
|
||||
mov edx, Hob
|
||||
push edx
|
||||
push 0
|
||||
jmp ecx
|
||||
|
||||
; should never get here
|
||||
jmp $
|
||||
ret
|
||||
|
||||
EnterDxeMain ENDP
|
||||
|
||||
END
|
|
@ -0,0 +1,31 @@
|
|||
/** @file
|
||||
IA32 specific code to enter DxeCore
|
||||
|
||||
Copyright (c) 2006 - 2007, Intel Corporation
|
||||
All rights reserved. This program and the accompanying materials
|
||||
are licensed and made available under the terms and conditions of the BSD License
|
||||
which accompanies this distribution. The full text of the license may be found at
|
||||
http://opensource.org/licenses/bsd-license.php
|
||||
|
||||
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
|
||||
**/
|
||||
|
||||
#include "DxeIpl.h"
|
||||
|
||||
VOID
|
||||
EnterDxeMain (
|
||||
IN VOID *StackTop,
|
||||
IN VOID *DxeCoreEntryPoint,
|
||||
IN VOID *Hob,
|
||||
IN VOID *PageTable
|
||||
)
|
||||
{
|
||||
SwitchStack (
|
||||
(SWITCH_STACK_ENTRY_POINT)(UINTN)DxeCoreEntryPoint,
|
||||
Hob,
|
||||
NULL,
|
||||
StackTop
|
||||
);
|
||||
}
|
|
@ -1,16 +0,0 @@
|
|||
VOID
|
||||
EnterDxeMain (
|
||||
IN VOID *StackTop,
|
||||
IN VOID *DxeCoreEntryPoint,
|
||||
IN VOID *Hob,
|
||||
IN VOID *PageTable
|
||||
)
|
||||
{
|
||||
__asm__ ( "movl %0, %%esp \n\t"
|
||||
"pushl %2 \n\t"
|
||||
"pushl $0 \n\t"
|
||||
"movl %1, %%ecx \n\t"
|
||||
"jmp %%ecx"
|
||||
::"q"(StackTop), "q"(DxeCoreEntryPoint), "q"(Hob)
|
||||
);
|
||||
}
|
|
@ -542,21 +542,6 @@ STATUS_CODE_LOOKUP_TABLE mOperationToken[] = {
|
|||
};
|
||||
|
||||
|
||||
//
|
||||
// Private function declarations
|
||||
//
|
||||
UINT8
|
||||
CpuIoRead8 (
|
||||
UINT16 Port
|
||||
);
|
||||
|
||||
VOID
|
||||
CpuIoWrite8 (
|
||||
UINT16 Port,
|
||||
UINT32 Data
|
||||
);
|
||||
|
||||
|
||||
EFI_STATUS
|
||||
MatchString (
|
||||
IN STATUS_CODE_LOOKUP_TABLE *Table,
|
||||
|
@ -648,10 +633,10 @@ Returns:
|
|||
// Wait for the serail port to be ready.
|
||||
//
|
||||
do {
|
||||
Data = CpuIoRead8 ((UINT16) (gComBase + LSR_OFFSET));
|
||||
Data = IoRead8 (gComBase + LSR_OFFSET);
|
||||
} while ((Data & LSR_TXRDY) == 0);
|
||||
|
||||
CpuIoWrite8 (gComBase, Character);
|
||||
IoWrite8 (gComBase, Character);
|
||||
}
|
||||
|
||||
VOID
|
||||
|
@ -865,19 +850,19 @@ Returns:
|
|||
// Set communications format
|
||||
//
|
||||
OutputData = (UINT8)((DLAB << 7) | ((gBreakSet << 6) | ((gParity << 3) | ((gStop << 2) | Data))));
|
||||
CpuIoWrite8 ((UINT16) (gComBase + LCR_OFFSET), OutputData);
|
||||
IoWrite8 (gComBase + LCR_OFFSET, OutputData);
|
||||
|
||||
//
|
||||
// Configure baud rate
|
||||
//
|
||||
CpuIoWrite8 ((UINT16) (gComBase + BAUD_HIGH_OFFSET), (UINT8)(Divisor >> 8));
|
||||
CpuIoWrite8 ((UINT16) (gComBase + BAUD_LOW_OFFSET), (UINT8)(Divisor & 0xff));
|
||||
IoWrite8 (gComBase + BAUD_HIGH_OFFSET, (UINT8)(Divisor >> 8));
|
||||
IoWrite8 (gComBase + BAUD_LOW_OFFSET, (UINT8)(Divisor & 0xff));
|
||||
|
||||
//
|
||||
// Switch back to bank 0
|
||||
//
|
||||
OutputData = (UINT8)((~DLAB<<7)|((gBreakSet<<6)|((gParity<<3)|((gStop<<2)| Data))));
|
||||
CpuIoWrite8 ((UINT16) (gComBase + LCR_OFFSET), OutputData);
|
||||
IoWrite8 (gComBase + LCR_OFFSET, OutputData);
|
||||
|
||||
*ReportStatusCode = SerialReportStatusCode;
|
||||
}
|
||||
|
|
|
@ -1,52 +0,0 @@
|
|||
title CpuIoAccess.asm
|
||||
;------------------------------------------------------------------------------
|
||||
;
|
||||
; Copyright (c) 2006 - 2007, Intel Corporation
|
||||
; All rights reserved. This program and the accompanying materials
|
||||
; are licensed and made available under the terms and conditions of the BSD License
|
||||
; which accompanies this distribution. The full text of the license may be found at
|
||||
; http://opensource.org/licenses/bsd-license.php
|
||||
;
|
||||
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
;
|
||||
; Module Name:
|
||||
; CpuIoAccess.asm
|
||||
;
|
||||
; Abstract:
|
||||
; CPU IO Abstraction
|
||||
;
|
||||
;------------------------------------------------------------------------------
|
||||
|
||||
|
||||
.code
|
||||
|
||||
;------------------------------------------------------------------------------
|
||||
; UINT8
|
||||
; CpuIoRead8 (
|
||||
; UINT16 Port // rcx
|
||||
; )
|
||||
;------------------------------------------------------------------------------
|
||||
CpuIoRead8 PROC PUBLIC
|
||||
xor eax, eax
|
||||
mov dx, cx
|
||||
in al, dx
|
||||
ret
|
||||
CpuIoRead8 ENDP
|
||||
|
||||
;------------------------------------------------------------------------------
|
||||
; VOID
|
||||
; CpuIoWrite8 (
|
||||
; UINT16 Port, // rcx
|
||||
; UINT32 Data // rdx
|
||||
; )
|
||||
;------------------------------------------------------------------------------
|
||||
CpuIoWrite8 PROC PUBLIC
|
||||
mov eax, edx
|
||||
mov dx, cx
|
||||
out dx, al
|
||||
ret
|
||||
CpuIoWrite8 ENDP
|
||||
|
||||
|
||||
END
|
|
@ -1,45 +0,0 @@
|
|||
TITLE EnterDxeCore.asm: Assembly code for the entering DxeCore
|
||||
;------------------------------------------------------------------------------
|
||||
;*
|
||||
;* Copyright 2006, Intel Corporation
|
||||
;* All rights reserved. This program and the accompanying materials
|
||||
;* are licensed and made available under the terms and conditions of the BSD License
|
||||
;* which accompanies this distribution. The full text of the license may be found at
|
||||
;* http://opensource.org/licenses/bsd-license.php
|
||||
;*
|
||||
;* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
;* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
;*
|
||||
;* EnterDxeCore.asm
|
||||
;*
|
||||
;* Abstract:
|
||||
;*
|
||||
;------------------------------------------------------------------------------
|
||||
|
||||
.code
|
||||
|
||||
;
|
||||
; VOID
|
||||
; EnterDxeMain (
|
||||
; IN VOID *StackTop, // rcx
|
||||
; IN VOID *DxeCoreEntryPoint, // rdx
|
||||
; IN VOID *Hob, // r8
|
||||
; IN VOID *PageTable // r9
|
||||
; )
|
||||
;
|
||||
EnterDxeMain PROC
|
||||
|
||||
mov cr3, r9
|
||||
sub rcx, 32
|
||||
mov rsp, rcx
|
||||
mov rcx, r8
|
||||
push 0
|
||||
jmp rdx
|
||||
|
||||
; should never get here
|
||||
jmp $
|
||||
ret
|
||||
|
||||
EnterDxeMain ENDP
|
||||
|
||||
END
|
|
@ -0,0 +1,32 @@
|
|||
/** @file
|
||||
x64 specific code to enter DxeCore
|
||||
|
||||
Copyright (c) 2006 - 2007, Intel Corporation
|
||||
All rights reserved. This program and the accompanying materials
|
||||
are licensed and made available under the terms and conditions of the BSD License
|
||||
which accompanies this distribution. The full text of the license may be found at
|
||||
http://opensource.org/licenses/bsd-license.php
|
||||
|
||||
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
|
||||
**/
|
||||
|
||||
#include "DxeIpl.h"
|
||||
|
||||
VOID
|
||||
EnterDxeMain (
|
||||
IN VOID *StackTop,
|
||||
IN VOID *DxeCoreEntryPoint,
|
||||
IN VOID *Hob,
|
||||
IN VOID *PageTable
|
||||
)
|
||||
{
|
||||
AsmWriteCr3 ((UINTN) PageTable);
|
||||
SwitchStack (
|
||||
(SWITCH_STACK_ENTRY_POINT)(UINTN)DxeCoreEntryPoint,
|
||||
Hob,
|
||||
NULL,
|
||||
StackTop
|
||||
);
|
||||
}
|
Loading…
Reference in New Issue