diff --git a/ArmPkg/ArmPkg.dec b/ArmPkg/ArmPkg.dec
index d7a4826d93..75960ed8df 100644
--- a/ArmPkg/ArmPkg.dec
+++ b/ArmPkg/ArmPkg.dec
@@ -2,7 +2,7 @@
 # ARM processor package.
 #
 # Copyright (c) 2009 - 2010, Apple Inc. All rights reserved.<BR>
-# Copyright (c) 2011 - 2014, ARM Limited. All rights reserved.
+# Copyright (c) 2011 - 2015, ARM Limited. All rights reserved.
 #
 #    This program and the accompanying materials
 #    are licensed and made available under the terms and conditions of the BSD License
@@ -240,5 +240,7 @@
   # ARM Generic Interrupt Controller
   #
   gArmTokenSpaceGuid.PcdGicDistributorBase|0|UINT32|0x0000000C
+  # Base address for the GIC Redistributor region that contains the boot CPU
+  gArmTokenSpaceGuid.PcdGicRedistributorsBase|0|UINT32|0x0000000E
   gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0|UINT32|0x0000000D
   gArmTokenSpaceGuid.PcdGicSgiIntId|0|UINT32|0x00000025
diff --git a/ArmPkg/Drivers/ArmGic/ArmGicDxe.inf b/ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
index 2d46706a76..92f3b1d312 100644
--- a/ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
+++ b/ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
@@ -52,6 +52,7 @@
 
 [Pcd.common]
   gArmTokenSpaceGuid.PcdGicDistributorBase
+  gArmTokenSpaceGuid.PcdGicRedistributorsBase
   gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase
 
 [Depex]
diff --git a/ArmPkg/Drivers/ArmGic/GicV3/ArmGicV3Dxe.c b/ArmPkg/Drivers/ArmGic/GicV3/ArmGicV3Dxe.c
index f756d30803..51212811e3 100644
--- a/ArmPkg/Drivers/ArmGic/GicV3/ArmGicV3Dxe.c
+++ b/ArmPkg/Drivers/ArmGic/GicV3/ArmGicV3Dxe.c
@@ -1,6 +1,6 @@
 /** @file
 *
-*  Copyright (c) 2011-2014, ARM Limited. All rights reserved.
+*  Copyright (c) 2011-2015, ARM Limited. All rights reserved.
 *
 *  This program and the accompanying materials
 *  are licensed and made available under the terms and conditions of the BSD License
@@ -20,6 +20,7 @@
 extern EFI_HARDWARE_INTERRUPT_PROTOCOL gHardwareInterruptV3Protocol;
 
 STATIC UINTN mGicDistributorBase;
+STATIC UINTN mGicRedistributorsBase;
 
 /**
   Enable interrupt source Source.
@@ -243,8 +244,9 @@ GicV3DxeInitialize (
   // Make sure the Interrupt Controller Protocol is not already installed in the system.
   ASSERT_PROTOCOL_ALREADY_INSTALLED (NULL, &gHardwareInterruptProtocolGuid);
 
-  mGicDistributorBase = PcdGet32 (PcdGicDistributorBase);
-  mGicNumInterrupts = ArmGicGetMaxNumInterrupts (mGicDistributorBase);
+  mGicDistributorBase    = PcdGet32 (PcdGicDistributorBase);
+  mGicRedistributorsBase = PcdGet32 (PcdGicRedistributorsBase);
+  mGicNumInterrupts      = ArmGicGetMaxNumInterrupts (mGicDistributorBase);
 
   for (Index = 0; Index < mGicNumInterrupts; Index++) {
     GicV3DisableInterruptSource (&gHardwareInterruptV3Protocol, Index);
diff --git a/ArmPkg/Include/Library/ArmGicLib.h b/ArmPkg/Include/Library/ArmGicLib.h
index d00159b356..6cd93a1f54 100644
--- a/ArmPkg/Include/Library/ArmGicLib.h
+++ b/ArmPkg/Include/Library/ArmGicLib.h
@@ -1,6 +1,6 @@
 /** @file
 *
-*  Copyright (c) 2011-2014, ARM Limited. All rights reserved.
+*  Copyright (c) 2011-2015, ARM Limited. All rights reserved.
 *
 *  This program and the accompanying materials
 *  are licensed and made available under the terms and conditions of the BSD License
@@ -30,7 +30,7 @@ typedef enum {
 #define ARM_GIC_ICDICTR         0x004 // Interrupt Controller Type Register
 #define ARM_GIC_ICDIIDR         0x008 // Implementer Identification Register
 
-// Each reg base below repeats for VE_NUM_ARM_GIC_REG_PER_INT_BITS (see GIC spec)
+// Each reg base below repeats for Number of interrupts / 4 (see GIC spec)
 #define ARM_GIC_ICDISR          0x080 // Interrupt Security Registers
 #define ARM_GIC_ICDISER         0x100 // Interrupt Set-Enable Registers
 #define ARM_GIC_ICDICER         0x180 // Interrupt Clear-Enable Registers
@@ -38,10 +38,10 @@ typedef enum {
 #define ARM_GIC_ICDICPR         0x280 // Interrupt Clear-Pending Registers
 #define ARM_GIC_ICDABR          0x300 // Active Bit Registers
 
-// Each reg base below repeats for VE_NUM_ARM_GIC_REG_PER_INT_BYTES
+// Each reg base below repeats for Number of interrupts / 4
 #define ARM_GIC_ICDIPR          0x400 // Interrupt Priority Registers
 
-// Each reg base below repeats for VE_NUM_ARM_GIC_INTERRUPTS
+// Each reg base below repeats for Number of interrupts
 #define ARM_GIC_ICDIPTR         0x800 // Interrupt Processor Target Registers
 #define ARM_GIC_ICDICFR         0xC00 // Interrupt Configuration Registers
 
@@ -50,6 +50,23 @@ typedef enum {
 // just one of these
 #define ARM_GIC_ICDSGIR         0xF00 // Software Generated Interrupt Register
 
+// GICv3 specific registers
+#define ARM_GICD_IROUTER        0x6100 // Interrupt Routing Registers
+
+//
+// GIC Redistributor
+//
+
+#define ARM_GICR_CTLR_FRAME_SIZE    SIZE_64KB
+#define ARM_GICR_SGI_PPI_FRAME_SIZE SIZE_64KB
+
+// GIC Redistributor Control frame
+#define ARM_GICR_TYPER          0x0008  // Redistributor Type Register
+
+// GIC SGI & PPI Redistributor frame
+#define ARM_GICR_ISENABLER      0x0100  // Interrupt Set-Enable Registers
+#define ARM_GICR_ICENABLER      0x0180  // Interrupt Clear-Enable Registers
+
 //
 // GIC Cpu interface
 //
diff --git a/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-FVP-AArch64.dsc b/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-FVP-AArch64.dsc
index 7cc4e27271..3ae6b327c1 100644
--- a/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-FVP-AArch64.dsc
+++ b/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-FVP-AArch64.dsc
@@ -1,5 +1,5 @@
 #
-#  Copyright (c) 2011-2014, ARM Limited. All rights reserved.
+#  Copyright (c) 2011-2015, ARM Limited. All rights reserved.
 #
 #  This program and the accompanying materials
 #  are licensed and made available under the terms and conditions of the BSD License
@@ -157,6 +157,7 @@
   gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0x2C002000
 !else
   gArmTokenSpaceGuid.PcdGicDistributorBase|0x2f000000
+  gArmTokenSpaceGuid.PcdGicRedistributorsBase|0x2f100000
   gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0x2C000000
 !endif