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ARM Packages: use GCC_ASM_EXPORT to export functions 

This ensures the .type directive is used to mark them as function symbols

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Brendan Jackman <brendan.jackman@arm.com>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15506 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
Brendan Jackman 2014-05-08 14:55:52 +00:00 committed by oliviermartin
parent 45440744c4
commit 919a3a026c
9 changed files with 40 additions and 40 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

10
ArmPkg/Drivers/CpuDxe/AArch64/ExceptionSupport.S
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@ -95,11 +95,11 @@
UINT64 Padding;0x328 // Required for stack alignment
*/
ASM_GLOBAL ASM_PFX(ExceptionHandlersStart)
ASM_GLOBAL ASM_PFX(ExceptionHandlersEnd)
ASM_GLOBAL ASM_PFX(CommonExceptionEntry)
ASM_GLOBAL ASM_PFX(AsmCommonExceptionEntry)
ASM_GLOBAL ASM_PFX(CommonCExceptionHandler)
GCC_ASM_EXPORT(ExceptionHandlersStart)
GCC_ASM_EXPORT(ExceptionHandlersEnd)
GCC_ASM_EXPORT(CommonExceptionEntry)
GCC_ASM_EXPORT(AsmCommonExceptionEntry)
GCC_ASM_EXPORT(CommonCExceptionHandler)
.text
.align 11

40
ArmPkg/Library/ArmLib/AArch64/AArch64ArchTimerSupport.S
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@ -15,26 +15,26 @@
.text
.align 2
ASM_GLOBAL ASM_PFX(ArmReadCntFrq)
ASM_GLOBAL ASM_PFX(ArmWriteCntFrq)
ASM_GLOBAL ASM_PFX(ArmReadCntPct)
ASM_GLOBAL ASM_PFX(ArmReadCntkCtl)
ASM_GLOBAL ASM_PFX(ArmWriteCntkCtl)
ASM_GLOBAL ASM_PFX(ArmReadCntpTval)
ASM_GLOBAL ASM_PFX(ArmWriteCntpTval)
ASM_GLOBAL ASM_PFX(ArmReadCntpCtl)
ASM_GLOBAL ASM_PFX(ArmWriteCntpCtl)
ASM_GLOBAL ASM_PFX(ArmReadCntvTval)
ASM_GLOBAL ASM_PFX(ArmWriteCntvTval)
ASM_GLOBAL ASM_PFX(ArmReadCntvCtl)
ASM_GLOBAL ASM_PFX(ArmWriteCntvCtl)
ASM_GLOBAL ASM_PFX(ArmReadCntvCt)
ASM_GLOBAL ASM_PFX(ArmReadCntpCval)
ASM_GLOBAL ASM_PFX(ArmWriteCntpCval)
ASM_GLOBAL ASM_PFX(ArmReadCntvCval)
ASM_GLOBAL ASM_PFX(ArmWriteCntvCval)
ASM_GLOBAL ASM_PFX(ArmReadCntvOff)
ASM_GLOBAL ASM_PFX(ArmWriteCntvOff)
GCC_ASM_EXPORT(ArmReadCntFrq)
GCC_ASM_EXPORT(ArmWriteCntFrq)
GCC_ASM_EXPORT(ArmReadCntPct)
GCC_ASM_EXPORT(ArmReadCntkCtl)
GCC_ASM_EXPORT(ArmWriteCntkCtl)
GCC_ASM_EXPORT(ArmReadCntpTval)
GCC_ASM_EXPORT(ArmWriteCntpTval)
GCC_ASM_EXPORT(ArmReadCntpCtl)
GCC_ASM_EXPORT(ArmWriteCntpCtl)
GCC_ASM_EXPORT(ArmReadCntvTval)
GCC_ASM_EXPORT(ArmWriteCntvTval)
GCC_ASM_EXPORT(ArmReadCntvCtl)
GCC_ASM_EXPORT(ArmWriteCntvCtl)
GCC_ASM_EXPORT(ArmReadCntvCt)
GCC_ASM_EXPORT(ArmReadCntpCval)
GCC_ASM_EXPORT(ArmWriteCntpCval)
GCC_ASM_EXPORT(ArmReadCntvCval)
GCC_ASM_EXPORT(ArmWriteCntvCval)
GCC_ASM_EXPORT(ArmReadCntvOff)
GCC_ASM_EXPORT(ArmWriteCntvOff)
ASM_PFX(ArmReadCntFrq):
mrs x0, cntfrq_el0 // Read CNTFRQ

2
ArmPkg/Library/BdsLib/AArch64/BdsLinuxLoaderHelper.S
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@ -25,7 +25,7 @@
.text
.align 3
ASM_GLOBAL ASM_PFX(SecondariesPenStart)
GCC_ASM_EXPORT(SecondariesPenStart)
ASM_GLOBAL SecondariesPenEnd
ASM_PFX(SecondariesPenStart):

2
ArmPkg/Library/CompilerIntrinsicsLib/AArch64/memcpy.S
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@ -31,7 +31,7 @@
.align 2
ASM_GLOBAL ASM_PFX(memcpy)
GCC_ASM_EXPORT(memcpy)
// Taken from Newlib BSD implementation.

8
ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/AArch64/RTSMFoundationBoot.S
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@ -20,10 +20,10 @@
.text
.align 3
ASM_GLOBAL ASM_PFX(ArmPlatformSecBootAction)
ASM_GLOBAL ASM_PFX(ArmPlatformSecBootMemoryInit)
ASM_GLOBAL ASM_PFX(ArmSecMpCoreSecondariesWrite)
ASM_GLOBAL ASM_PFX(ArmSecMpCoreSecondariesRead)
GCC_ASM_EXPORT(ArmPlatformSecBootAction)
GCC_ASM_EXPORT(ArmPlatformSecBootMemoryInit)
GCC_ASM_EXPORT(ArmSecMpCoreSecondariesWrite)
GCC_ASM_EXPORT(ArmSecMpCoreSecondariesRead)
/**
Call at the beginning of the platform boot up

2
ArmPlatformPkg/PrePeiCore/AArch64/Exception.S
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@ -18,7 +18,7 @@
.text
.align 11
ASM_GLOBAL ASM_PFX(PeiVectorTable)
GCC_ASM_EXPORT(PeiVectorTable)
//============================================================
//Default Exception Handlers

4
ArmPlatformPkg/PrePeiCore/AArch64/Helper.S
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@ -18,8 +18,8 @@
.text
.align 3
ASM_GLOBAL ASM_PFX(SetupExceptionLevel1)
ASM_GLOBAL ASM_PFX(SetupExceptionLevel2)
GCC_ASM_EXPORT(SetupExceptionLevel1)
GCC_ASM_EXPORT(SetupExceptionLevel2)
// Setup EL1 while in EL1
ASM_PFX(SetupExceptionLevel1):

2
ArmPlatformPkg/PrePeiCore/AArch64/SwitchStack.S
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@ -17,7 +17,7 @@
.text
.align 3
ASM_GLOBAL ASM_PFX(SecSwitchStack)
GCC_ASM_EXPORT(SecSwitchStack)

10
ArmPlatformPkg/Sec/AArch64/Helper.S
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@ -18,11 +18,11 @@
.text
.align 3
ASM_GLOBAL ASM_PFX(SwitchToNSExceptionLevel1)
ASM_GLOBAL ASM_PFX(enter_monitor_mode)
ASM_GLOBAL ASM_PFX(return_from_exception)
ASM_GLOBAL ASM_PFX(copy_cpsr_into_spsr)
ASM_GLOBAL ASM_PFX(set_non_secure_mode)
GCC_ASM_EXPORT(SwitchToNSExceptionLevel1)
GCC_ASM_EXPORT(enter_monitor_mode)
GCC_ASM_EXPORT(return_from_exception)
GCC_ASM_EXPORT(copy_cpsr_into_spsr)
GCC_ASM_EXPORT(set_non_secure_mode)
// Switch from EL3 to NS-EL1
ASM_PFX(SwitchToNSExceptionLevel1):