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ShellPkg: Update smbiosview for LoongArch 

According to SMBIOS spec3.6, LoongArch information support has been added,
so this patch is submitted for display as information in smbiosview.

Cc: Zhichao Gao <zhichao.gao@intel.com>
Cc: Chao Li <lichao@loongson.cn>
Signed-off-by: Dongyan Qian <qiandongyan@loongson.cn>
Reviewed-by: Chao Li <lichao@loongson.cn>
Reviewed-by: Zhichao Gao <zhichao.gao@intel.com>
This commit is contained in:
Dongyan Qian 2024-01-16 14:50:15 +08:00 committed by mergify[bot]
parent a3aab12c34
commit 927ea1364d
2 changed files with 76 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

68
ShellPkg/Library/UefiShellDebug1CommandsLib/SmbiosView/PrintInfo.c
View File

@ -2610,6 +2610,74 @@ DisplayProcessorFamily2 (
Print (L"RISC-V RV128\n"); Print (L"RISC-V RV128\n");
break; break;
case 0x258:
Print (L"LoongArch\n");
break;
case 0x259:
Print (L"Loongson1\n");
break;
case 0x25A:
Print (L"Loongson2\n");
break;
case 0x25B:
Print (L"Loongson3\n");
break;
case 0x25C:
Print (L"Loongson2K\n");
break;
case 0x25D:
Print (L"Loongson3A\n");
break;
case 0x25E:
Print (L"Loongson3B\n");
break;
case 0x25F:
Print (L"Loongson3C\n");
break;
case 0x260:
Print (L"Loongson3D\n");
break;
case 0x261:
Print (L"Loongson3E\n");
break;
case 0x262:
Print (L"DualCoreLoongson2K\n");
break;
case 0x26C:
Print (L"QuadCoreLoongson3A\n");
break;
case 0x26D:
Print (L"MultiCoreLoongson3A\n");
break;
case 0x26E:
Print (L"QuadCoreLoongson3B\n");
break;
case 0x26F:
Print (L"MultiCoreLoongson3B\n");
break;
case 0x270:
Print (L"MultiCoreLoongson3C\n");
break;
case 0x271:
Print (L"MultiCoreLoongson3D\n");
break;
default: default:
ShellPrintHiiEx (-1, -1, NULL, STRING_TOKEN (STR_SMBIOSVIEW_PRINTINFO_UNDEFINED_PROC_FAMILY), gShellDebug1HiiHandle); ShellPrintHiiEx (-1, -1, NULL, STRING_TOKEN (STR_SMBIOSVIEW_PRINTINFO_UNDEFINED_PROC_FAMILY), gShellDebug1HiiHandle);
} }

8
ShellPkg/Library/UefiShellDebug1CommandsLib/SmbiosView/QueryTable.c
View File

@ -3652,6 +3652,14 @@ TABLE_ITEM ProcessorArchitectureTypesTable[] = {
{ {
8, 8,
L" 128-bit RISC-V (RV128) " L" 128-bit RISC-V (RV128) "
},
{
9,
L" 32-bit LoongArch (LoongArch32) "
},
{
10,
L" 64-bit LoongArch (LoongArch64) "
} }
}; };