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ArmPkg: Add register encoding definition for MMFR2 

Add register encoding definition for Memory Model Feature Register 2.
We need to define it here because we build for ARMv8.0, which doesn't
have it.

Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
Reviewed-by: Leif Lindholm <leif@nuviainc.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
This commit is contained in:
Rebecca Cran 2021-02-07 17:52:36 -07:00 committed by mergify[bot]
parent 4e1f316cec
commit 92bdb2a9c6
1 changed files with 4 additions and 0 deletions
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4
ArmPkg/Include/Chipset/AArch64.h
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@ -112,6 +112,10 @@
#define ARM_VECTOR_LOW_A32_FIQ 0x700
#define ARM_VECTOR_LOW_A32_SERR 0x780
// The ID_AA64MMFR2_EL1 register was added in ARMv8.2. Since we
// build for ARMv8.0, we need to define the register here.
#define ID_AA64MMFR2_EL1 S3_0_C0_C7_2
#define VECTOR_BASE(tbl) \
.section .text.##tbl##,"ax"; \
.align 11; \