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UefiCpuPkg: Correct some typos. 

Correct some typos.

Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Signed-off-by: Guomin Jiang <guomin.jiang@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
This commit is contained in:
Guomin Jiang 2020-07-07 15:46:45 +08:00 committed by mergify[bot]
parent d7c9de51d2
commit 92c19c68cb
6 changed files with 10 additions and 10 deletions
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2
UefiCpuPkg/CpuMpPei/CpuMpPei.h
View File

@ -424,7 +424,7 @@ InitializeCpuMpWorker (
); );
/** /**
Enabl/setup stack guard for each processor if PcdCpuStackGuard is set to TRUE. Enable/setup stack guard for each processor if PcdCpuStackGuard is set to TRUE.
Doing this in the memory-discovered callback is to make sure the Stack Guard Doing this in the memory-discovered callback is to make sure the Stack Guard
feature to cover as most PEI code as possible. feature to cover as most PEI code as possible.

4
UefiCpuPkg/CpuMpPei/CpuPaging.c
View File

@ -153,7 +153,7 @@ GetPhysicalAddressWidth (
Get the type of top level page table. Get the type of top level page table.
@retval Page512G PML4 paging. @retval Page512G PML4 paging.
@retval Page1G PAE paing. @retval Page1G PAE paging.
**/ **/
PAGE_ATTRIBUTE PAGE_ATTRIBUTE
@ -583,7 +583,7 @@ SetupStackGuardPage (
} }
/** /**
Enabl/setup stack guard for each processor if PcdCpuStackGuard is set to TRUE. Enable/setup stack guard for each processor if PcdCpuStackGuard is set to TRUE.
Doing this in the memory-discovered callback is to make sure the Stack Guard Doing this in the memory-discovered callback is to make sure the Stack Guard
feature to cover as most PEI code as possible. feature to cover as most PEI code as possible.

4
UefiCpuPkg/Library/CpuExceptionHandlerLib/CpuExceptionCommon.h
View File

@ -90,8 +90,8 @@ AsmGetTemplateAddressMap (
**/ **/
VOID VOID
ArchUpdateIdtEntry ( ArchUpdateIdtEntry (
IN IA32_IDT_GATE_DESCRIPTOR *IdtEntry, OUT IA32_IDT_GATE_DESCRIPTOR *IdtEntry,
IN UINTN InterruptHandler IN UINTN InterruptHandler
); );
/** /**

4
UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchExceptionHandler.c
View File

@ -18,8 +18,8 @@
**/ **/
VOID VOID
ArchUpdateIdtEntry ( ArchUpdateIdtEntry (
IN IA32_IDT_GATE_DESCRIPTOR *IdtEntry, OUT IA32_IDT_GATE_DESCRIPTOR *IdtEntry,
IN UINTN InterruptHandler IN UINTN InterruptHandler
) )
{ {
IdtEntry->Bits.OffsetLow = (UINT16)(UINTN)InterruptHandler; IdtEntry->Bits.OffsetLow = (UINT16)(UINTN)InterruptHandler;

2
UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuException.c
View File

@ -87,7 +87,7 @@ InitializeCpuExceptionHandlers (
IdtEntryCount = (IdtDescriptor.Limit + 1) / sizeof (IA32_IDT_GATE_DESCRIPTOR); IdtEntryCount = (IdtDescriptor.Limit + 1) / sizeof (IA32_IDT_GATE_DESCRIPTOR);
if (IdtEntryCount > CPU_EXCEPTION_NUM) { if (IdtEntryCount > CPU_EXCEPTION_NUM) {
// //
// CPU exeption library only setup CPU_EXCEPTION_NUM exception handler at most // CPU exception library only setup CPU_EXCEPTION_NUM exception handler at most
// //
IdtEntryCount = CPU_EXCEPTION_NUM; IdtEntryCount = CPU_EXCEPTION_NUM;
} }

4
UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchExceptionHandler.c
View File

@ -17,8 +17,8 @@
**/ **/
VOID VOID
ArchUpdateIdtEntry ( ArchUpdateIdtEntry (
IN IA32_IDT_GATE_DESCRIPTOR *IdtEntry, OUT IA32_IDT_GATE_DESCRIPTOR *IdtEntry,
IN UINTN InterruptHandler IN UINTN InterruptHandler
) )
{ {
IdtEntry->Bits.OffsetLow = (UINT16)(UINTN)InterruptHandler; IdtEntry->Bits.OffsetLow = (UINT16)(UINTN)InterruptHandler;