DynamicTablesPkg: Move Pci Config Space Info to Arm namespace

Move Pci Config Space Info object from Arm Namespace to the
Arch Common namespace.

Correspondingly also update the following modules to reflect the
changes introduced by the move:
 - MCFG generator
 - SSDT PCIe generator
 - SSDT PCIe support library
 - ConfigurationManagerObjectParser
 - Dynamic Plat Repo TokenFixer map
 - FdtHwInfoParserLib/Pci/ArmPciConfigSpaceParser

Cc: Pierre Gondois <Pierre.Gondois@arm.com>
Cc: Yeo Reum Yun <YeoReum.Yun@arm.com>
Cc: AbdulLateef Attar <AbdulLateef.Attar@amd.com>
Cc: Jeshua Smith <jeshuas@nvidia.com>
Cc: Jeff Brasen <jbrasen@nvidia.com>
Cc: Girish Mahadevan <gmahadevan@nvidia.com>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
This commit is contained in:
Sami Mujawar 2024-03-08 11:24:00 +00:00 committed by mergify[bot]
parent 4f29b082e8
commit 93bb65dcfc
11 changed files with 183 additions and 182 deletions

View File

@ -28,6 +28,7 @@ typedef enum ArchCommonObjectID {
EArchCommonObjHypervisorVendorIdentity, ///< 5 - Hypervisor Vendor Id
EArchCommonObjFixedFeatureFlags, ///< 6 - Fixed feature flags for FADT
EArchCommonObjCmRef, ///< 7 - CM Object Reference
EArchCommonObjPciConfigSpaceInfo, ///< 8 - PCI Configuration Space Info
EArchCommonObjMax
} EARCH_COMMON_OBJECT_ID;
@ -114,6 +115,33 @@ typedef struct CmArchCommonObjRef {
CM_OBJECT_TOKEN ReferenceToken;
} CM_ARCH_COMMON_OBJ_REF;
/** A structure that describes the
PCI Configuration Space information for the Platform.
ID: EArchCommonObjPciConfigSpaceInfo
*/
typedef struct CmArchCommonPciConfigSpaceInfo {
/// The physical base address for the PCI segment
UINT64 BaseAddress;
/// The PCI segment group number
UINT16 PciSegmentGroupNumber;
/// The start bus number
UINT8 StartBusNumber;
/// The end bus number
UINT8 EndBusNumber;
/// Optional field: Reference Token for address mapping.
/// Token identifying a CM_ARCH_COMMON_OBJ_REF structure.
CM_OBJECT_TOKEN AddressMapToken;
/// Optional field: Reference Token for interrupt mapping.
/// Token identifying a CM_ARCH_COMMON_OBJ_REF structure.
CM_OBJECT_TOKEN InterruptMapToken;
} CM_ARCH_COMMON_PCI_CONFIG_SPACE_INFO;
#pragma pack()
#endif // ARCH_COMMON_NAMESPACE_OBJECTS_H_

View File

@ -39,37 +39,36 @@ typedef enum ArmObjectID {
EArmObjPlatformGTBlockInfo, ///< 8 - Platform GT Block Info
EArmObjGTBlockTimerFrameInfo, ///< 9 - Generic Timer Block Frame Info
EArmObjPlatformGenericWatchdogInfo, ///< 10 - Platform Generic Watchdog
EArmObjPciConfigSpaceInfo, ///< 11 - PCI Configuration Space Info
EArmObjItsGroup, ///< 12 - ITS Group
EArmObjNamedComponent, ///< 13 - Named Component
EArmObjRootComplex, ///< 14 - Root Complex
EArmObjSmmuV1SmmuV2, ///< 15 - SMMUv1 or SMMUv2
EArmObjSmmuV3, ///< 16 - SMMUv3
EArmObjPmcg, ///< 17 - PMCG
EArmObjGicItsIdentifierArray, ///< 18 - GIC ITS Identifier Array
EArmObjIdMappingArray, ///< 19 - ID Mapping Array
EArmObjSmmuInterruptArray, ///< 20 - SMMU Interrupt Array
EArmObjProcHierarchyInfo, ///< 21 - Processor Hierarchy Info
EArmObjCacheInfo, ///< 22 - Cache Info
EArmObjMemoryAffinityInfo, ///< 23 - Memory Affinity Info
EArmObjDeviceHandleAcpi, ///< 24 - Device Handle Acpi
EArmObjDeviceHandlePci, ///< 25 - Device Handle Pci
EArmObjGenericInitiatorAffinityInfo, ///< 26 - Generic Initiator Affinity
EArmObjCmn600Info, ///< 27 - CMN-600 Info
EArmObjLpiInfo, ///< 28 - Lpi Info
EArmObjPciAddressMapInfo, ///< 29 - Pci Address Map Info
EArmObjPciInterruptMapInfo, ///< 30 - Pci Interrupt Map Info
EArmObjRmr, ///< 31 - Reserved Memory Range Node
EArmObjMemoryRangeDescriptor, ///< 32 - Memory Range Descriptor
EArmObjCpcInfo, ///< 33 - Continuous Performance Control Info
EArmObjPccSubspaceType0Info, ///< 34 - Pcc Subspace Type 0 Info
EArmObjPccSubspaceType1Info, ///< 35 - Pcc Subspace Type 2 Info
EArmObjPccSubspaceType2Info, ///< 36 - Pcc Subspace Type 2 Info
EArmObjPccSubspaceType3Info, ///< 37 - Pcc Subspace Type 3 Info
EArmObjPccSubspaceType4Info, ///< 38 - Pcc Subspace Type 4 Info
EArmObjPccSubspaceType5Info, ///< 39 - Pcc Subspace Type 5 Info
EArmObjEtInfo, ///< 40 - Embedded Trace Extension/Module Info
EArmObjPsdInfo, ///< 41 - P-State Dependency (PSD) Info
EArmObjItsGroup, ///< 11 - ITS Group
EArmObjNamedComponent, ///< 12 - Named Component
EArmObjRootComplex, ///< 13 - Root Complex
EArmObjSmmuV1SmmuV2, ///< 14 - SMMUv1 or SMMUv2
EArmObjSmmuV3, ///< 15 - SMMUv3
EArmObjPmcg, ///< 16 - PMCG
EArmObjGicItsIdentifierArray, ///< 17 - GIC ITS Identifier Array
EArmObjIdMappingArray, ///< 18 - ID Mapping Array
EArmObjSmmuInterruptArray, ///< 19 - SMMU Interrupt Array
EArmObjProcHierarchyInfo, ///< 20 - Processor Hierarchy Info
EArmObjCacheInfo, ///< 21 - Cache Info
EArmObjMemoryAffinityInfo, ///< 22 - Memory Affinity Info
EArmObjDeviceHandleAcpi, ///< 23 - Device Handle Acpi
EArmObjDeviceHandlePci, ///< 24 - Device Handle Pci
EArmObjGenericInitiatorAffinityInfo, ///< 25 - Generic Initiator Affinity
EArmObjCmn600Info, ///< 26 - CMN-600 Info
EArmObjLpiInfo, ///< 27 - Lpi Info
EArmObjPciAddressMapInfo, ///< 28 - Pci Address Map Info
EArmObjPciInterruptMapInfo, ///< 29 - Pci Interrupt Map Info
EArmObjRmr, ///< 30 - Reserved Memory Range Node
EArmObjMemoryRangeDescriptor, ///< 31 - Memory Range Descriptor
EArmObjCpcInfo, ///< 32 - Continuous Performance Control Info
EArmObjPccSubspaceType0Info, ///< 33 - Pcc Subspace Type 0 Info
EArmObjPccSubspaceType1Info, ///< 34 - Pcc Subspace Type 2 Info
EArmObjPccSubspaceType2Info, ///< 35 - Pcc Subspace Type 2 Info
EArmObjPccSubspaceType3Info, ///< 36 - Pcc Subspace Type 3 Info
EArmObjPccSubspaceType4Info, ///< 37 - Pcc Subspace Type 4 Info
EArmObjPccSubspaceType5Info, ///< 38 - Pcc Subspace Type 5 Info
EArmObjEtInfo, ///< 39 - Embedded Trace Extension/Module Info
EArmObjPsdInfo, ///< 40 - P-State Dependency (PSD) Info
EArmObjMax
} EARM_OBJECT_ID;
@ -408,33 +407,6 @@ typedef struct CmArmGenericWatchdogInfo {
UINT32 Flags;
} CM_ARM_GENERIC_WATCHDOG_INFO;
/** A structure that describes the
PCI Configuration Space information for the Platform.
ID: EArmObjPciConfigSpaceInfo
*/
typedef struct CmArmPciConfigSpaceInfo {
/// The physical base address for the PCI segment
UINT64 BaseAddress;
/// The PCI segment group number
UINT16 PciSegmentGroupNumber;
/// The start bus number
UINT8 StartBusNumber;
/// The end bus number
UINT8 EndBusNumber;
/// Optional field: Reference Token for address mapping.
/// Token identifying a CM_ARCH_COMMON_OBJ_REF structure.
CM_OBJECT_TOKEN AddressMapToken;
/// Optional field: Reference Token for interrupt mapping.
/// Token identifying a CM_ARCH_COMMON_OBJ_REF structure.
CM_OBJECT_TOKEN InterruptMapToken;
} CM_ARM_PCI_CONFIG_SPACE_INFO;
/** A structure that describes the
ITS Group node for the Platform.

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@ -43,8 +43,8 @@ typedef struct MappingTable {
EFI_STATUS
EFIAPI
AddOscMethod (
IN CONST CM_ARM_PCI_CONFIG_SPACE_INFO *PciInfo,
IN OUT AML_OBJECT_NODE_HANDLE PciNode
IN CONST CM_ARCH_COMMON_PCI_CONFIG_SPACE_INFO *PciInfo,
IN OUT AML_OBJECT_NODE_HANDLE PciNode
);
/** Generate Pci slots devices.
@ -66,10 +66,10 @@ AddOscMethod (
EFI_STATUS
EFIAPI
GeneratePciSlots (
IN CONST CM_ARM_PCI_CONFIG_SPACE_INFO *PciInfo,
IN CONST MAPPING_TABLE *MappingTable,
IN UINT32 Uid,
IN OUT AML_OBJECT_NODE_HANDLE PciNode
IN CONST CM_ARCH_COMMON_PCI_CONFIG_SPACE_INFO *PciInfo,
IN CONST MAPPING_TABLE *MappingTable,
IN UINT32 Uid,
IN OUT AML_OBJECT_NODE_HANDLE PciNode
);
#endif // SSDT_PCIE_SUPPORT_LIB_H_

View File

@ -27,7 +27,7 @@
Requirements:
The following Configuration Manager Object(s) are required by
this Generator:
- EArmObjPciConfigSpaceInfo
- EArchCommonObjPciConfigSpaceInfo
*/
#pragma pack(1)
@ -51,9 +51,9 @@ typedef
/** Retrieve the PCI Configuration Space Information.
*/
GET_OBJECT_LIST (
EObjNameSpaceArm,
EArmObjPciConfigSpaceInfo,
CM_ARM_PCI_CONFIG_SPACE_INFO
EObjNameSpaceArchCommon,
EArchCommonObjPciConfigSpaceInfo,
CM_ARCH_COMMON_PCI_CONFIG_SPACE_INFO
);
/** Add the PCI Enhanced Configuration Space Information to the MCFG Table.
@ -68,10 +68,10 @@ GET_OBJECT_LIST (
STATIC
VOID
AddPciConfigurationSpaceList (
IN MCFG_TABLE *CONST Mcfg,
IN CONST UINT32 PciCfgSpaceOffset,
IN CONST CM_ARM_PCI_CONFIG_SPACE_INFO *PciCfgSpaceInfoList,
IN UINT32 PciCfgSpaceCount
IN MCFG_TABLE *CONST Mcfg,
IN CONST UINT32 PciCfgSpaceOffset,
IN CONST CM_ARCH_COMMON_PCI_CONFIG_SPACE_INFO *PciCfgSpaceInfoList,
IN UINT32 PciCfgSpaceCount
)
{
MCFG_CFG_SPACE_ADDR *PciCfgSpace;
@ -126,11 +126,11 @@ BuildMcfgTable (
OUT EFI_ACPI_DESCRIPTION_HEADER **CONST Table
)
{
EFI_STATUS Status;
UINT32 TableSize;
UINT32 ConfigurationSpaceCount;
CM_ARM_PCI_CONFIG_SPACE_INFO *PciConfigSpaceInfoList;
MCFG_TABLE *Mcfg;
EFI_STATUS Status;
UINT32 TableSize;
UINT32 ConfigurationSpaceCount;
CM_ARCH_COMMON_PCI_CONFIG_SPACE_INFO *PciConfigSpaceInfoList;
MCFG_TABLE *Mcfg;
ASSERT (This != NULL);
ASSERT (AcpiTableInfo != NULL);
@ -154,7 +154,7 @@ BuildMcfgTable (
}
*Table = NULL;
Status = GetEArmObjPciConfigSpaceInfo (
Status = GetEArchCommonObjPciConfigSpaceInfo (
CfgMgrProtocol,
CM_NULL_TOKEN,
&PciConfigSpaceInfoList,

View File

@ -43,7 +43,7 @@ Requirements:
The following Configuration Manager Object(s) are required by
this Generator:
- EArchCommonObjCmRef
- EArmObjPciConfigSpaceInfo
- EArchCommonObjPciConfigSpaceInfo
- EArmObjPciAddressMapInfo
- EArmObjPciInterruptMapInfo
*/
@ -61,9 +61,9 @@ GET_OBJECT_LIST (
Configuration Space Information from the Configuration Manager.
*/
GET_OBJECT_LIST (
EObjNameSpaceArm,
EArmObjPciConfigSpaceInfo,
CM_ARM_PCI_CONFIG_SPACE_INFO
EObjNameSpaceArchCommon,
EArchCommonObjPciConfigSpaceInfo,
CM_ARCH_COMMON_PCI_CONFIG_SPACE_INFO
);
/** This macro expands to a function that retrieves the Pci
@ -208,9 +208,9 @@ STATIC
EFI_STATUS
EFIAPI
GeneratePciDeviceInfo (
IN CONST CM_ARM_PCI_CONFIG_SPACE_INFO *PciInfo,
IN UINT32 Uid,
IN OUT AML_OBJECT_NODE_HANDLE PciNode
IN CONST CM_ARCH_COMMON_PCI_CONFIG_SPACE_INFO *PciInfo,
IN UINT32 Uid,
IN OUT AML_OBJECT_NODE_HANDLE PciNode
)
{
EFI_STATUS Status;
@ -305,7 +305,7 @@ EFIAPI
GeneratePrt (
IN ACPI_PCI_GENERATOR *Generator,
IN CONST EDKII_CONFIGURATION_MANAGER_PROTOCOL *CONST CfgMgrProtocol,
IN CONST CM_ARM_PCI_CONFIG_SPACE_INFO *PciInfo,
IN CONST CM_ARCH_COMMON_PCI_CONFIG_SPACE_INFO *PciInfo,
IN UINT32 Uid,
IN OUT AML_OBJECT_NODE_HANDLE PciNode
)
@ -451,7 +451,7 @@ EFIAPI
GeneratePciCrs (
IN ACPI_PCI_GENERATOR *Generator,
IN CONST EDKII_CONFIGURATION_MANAGER_PROTOCOL *CONST CfgMgrProtocol,
IN CONST CM_ARM_PCI_CONFIG_SPACE_INFO *PciInfo,
IN CONST CM_ARCH_COMMON_PCI_CONFIG_SPACE_INFO *PciInfo,
IN OUT AML_OBJECT_NODE_HANDLE PciNode
)
{
@ -693,7 +693,7 @@ EFIAPI
ReserveEcamSpace (
IN ACPI_PCI_GENERATOR *Generator,
IN CONST EDKII_CONFIGURATION_MANAGER_PROTOCOL *CONST CfgMgrProtocol,
IN CONST CM_ARM_PCI_CONFIG_SPACE_INFO *PciInfo,
IN CONST CM_ARCH_COMMON_PCI_CONFIG_SPACE_INFO *PciInfo,
IN OUT AML_OBJECT_NODE_HANDLE PciNode
)
{
@ -760,7 +760,7 @@ EFIAPI
GeneratePciDevice (
IN ACPI_PCI_GENERATOR *Generator,
IN CONST EDKII_CONFIGURATION_MANAGER_PROTOCOL *CONST CfgMgrProtocol,
IN CONST CM_ARM_PCI_CONFIG_SPACE_INFO *PciInfo,
IN CONST CM_ARCH_COMMON_PCI_CONFIG_SPACE_INFO *PciInfo,
IN UINT32 Uid,
IN OUT AML_ROOT_NODE_HANDLE *RootNode
)
@ -863,7 +863,7 @@ BuildSsdtPciTable (
IN ACPI_PCI_GENERATOR *Generator,
IN CONST EDKII_CONFIGURATION_MANAGER_PROTOCOL *CONST CfgMgrProtocol,
IN CONST CM_STD_OBJ_ACPI_TABLE_INFO *CONST AcpiTableInfo,
IN CONST CM_ARM_PCI_CONFIG_SPACE_INFO *PciInfo,
IN CONST CM_ARCH_COMMON_PCI_CONFIG_SPACE_INFO *PciInfo,
IN UINT32 Uid,
OUT EFI_ACPI_DESCRIPTION_HEADER **Table
)
@ -971,13 +971,13 @@ BuildSsdtPciTableEx (
OUT UINTN *CONST TableCount
)
{
EFI_STATUS Status;
CM_ARM_PCI_CONFIG_SPACE_INFO *PciInfo;
UINT32 PciCount;
UINTN Index;
EFI_ACPI_DESCRIPTION_HEADER **TableList;
ACPI_PCI_GENERATOR *Generator;
UINT32 Uid;
EFI_STATUS Status;
CM_ARCH_COMMON_PCI_CONFIG_SPACE_INFO *PciInfo;
UINT32 PciCount;
UINTN Index;
EFI_ACPI_DESCRIPTION_HEADER **TableList;
ACPI_PCI_GENERATOR *Generator;
UINT32 Uid;
ASSERT (This != NULL);
ASSERT (AcpiTableInfo != NULL);
@ -990,7 +990,7 @@ BuildSsdtPciTableEx (
*TableCount = 0;
Generator = (ACPI_PCI_GENERATOR *)This;
Status = GetEArmObjPciConfigSpaceInfo (
Status = GetEArchCommonObjPciConfigSpaceInfo (
CfgMgrProtocol,
CM_NULL_TOKEN,
&PciInfo,

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@ -154,37 +154,36 @@ CM_OBJECT_TOKEN_FIXER TokenFixer[EArmObjMax] = {
NULL, ///< 8 - Platform GT Block Info
NULL, ///< 9 - Generic Timer Block Frame Info
NULL, ///< 10 - Platform Generic Watchdog
NULL, ///< 11 - PCI Configuration Space Info
TokenFixerItsGroup, ///< 12 - ITS Group
TokenFixerNamedComponentNode, ///< 13 - Named Component
TokenFixerRootComplexNode, ///< 14 - Root Complex
TokenFixerNotImplemented, ///< 15 - SMMUv1 or SMMUv2
TokenFixerSmmuV3Node, ///< 16 - SMMUv3
TokenFixerNotImplemented, ///< 17 - PMCG
NULL, ///< 18 - GIC ITS Identifier Array
NULL, ///< 19 - ID Mapping Array
NULL, ///< 20 - SMMU Interrupt Array
TokenFixerNotImplemented, ///< 21 - Processor Hierarchy Info
TokenFixerNotImplemented, ///< 22 - Cache Info
NULL, ///< 23 - Memory Affinity Info
NULL, ///< 24 - Device Handle Acpi
NULL, ///< 25 - Device Handle Pci
NULL, ///< 26 - Generic Initiator Affinity
NULL, ///< 27 - CMN-600 Info
NULL, ///< 28 - Lpi Info
NULL, ///< 29 - Pci Address Map Info
NULL, ///< 30 - Pci Interrupt Map Info
NULL, ///< 31 - Reserved Memory Range Node
NULL, ///< 32 - Memory Range Descriptor
NULL, ///< 33 - Continuous Performance Control Info
NULL, ///< 34 - Pcc Subspace Type 0 Info
TokenFixerItsGroup, ///< 11 - ITS Group
TokenFixerNamedComponentNode, ///< 12 - Named Component
TokenFixerRootComplexNode, ///< 13 - Root Complex
TokenFixerNotImplemented, ///< 14 - SMMUv1 or SMMUv2
TokenFixerSmmuV3Node, ///< 15 - SMMUv3
TokenFixerNotImplemented, ///< 16 - PMCG
NULL, ///< 17 - GIC ITS Identifier Array
NULL, ///< 18 - ID Mapping Array
NULL, ///< 19 - SMMU Interrupt Array
TokenFixerNotImplemented, ///< 20 - Processor Hierarchy Info
TokenFixerNotImplemented, ///< 21 - Cache Info
NULL, ///< 22 - Memory Affinity Info
NULL, ///< 23 - Device Handle Acpi
NULL, ///< 24 - Device Handle Pci
NULL, ///< 25 - Generic Initiator Affinity
NULL, ///< 26 - CMN-600 Info
NULL, ///< 27 - Lpi Info
NULL, ///< 28 - Pci Address Map Info
NULL, ///< 29 - Pci Interrupt Map Info
NULL, ///< 30 - Reserved Memory Range Node
NULL, ///< 31 - Memory Range Descriptor
NULL, ///< 32 - Continuous Performance Control Info
NULL, ///< 33 - Pcc Subspace Type 0 Info
NULL, ///< 34 - Pcc Subspace Type 2 Info
NULL, ///< 35 - Pcc Subspace Type 2 Info
NULL, ///< 36 - Pcc Subspace Type 2 Info
NULL, ///< 37 - Pcc Subspace Type 3 Info
NULL, ///< 38 - Pcc Subspace Type 4 Info
NULL, ///< 39 - Pcc Subspace Type 5 Info
NULL, ///< 40 - Embedded Trace Extension/Module Info
NULL ///< 41 - P-State Dependency (PSD) Info
NULL, ///< 36 - Pcc Subspace Type 3 Info
NULL, ///< 37 - Pcc Subspace Type 4 Info
NULL, ///< 38 - Pcc Subspace Type 5 Info
NULL, ///< 39 - Embedded Trace Extension/Module Info
NULL ///< 40 - P-State Dependency (PSD) Info
};
/** CmObj token fixer.

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@ -53,10 +53,10 @@
EFI_STATUS
EFIAPI
GeneratePciSlots (
IN CONST CM_ARM_PCI_CONFIG_SPACE_INFO *PciInfo,
IN CONST MAPPING_TABLE *MappingTable,
IN UINT32 Uid,
IN OUT AML_OBJECT_NODE_HANDLE PciNode
IN CONST CM_ARCH_COMMON_PCI_CONFIG_SPACE_INFO *PciInfo,
IN CONST MAPPING_TABLE *MappingTable,
IN UINT32 Uid,
IN OUT AML_OBJECT_NODE_HANDLE PciNode
)
{
EFI_STATUS Status;
@ -132,8 +132,8 @@ GeneratePciSlots (
EFI_STATUS
EFIAPI
AddOscMethod (
IN CONST CM_ARM_PCI_CONFIG_SPACE_INFO *PciInfo,
IN OUT AML_OBJECT_NODE_HANDLE PciNode
IN CONST CM_ARCH_COMMON_PCI_CONFIG_SPACE_INFO *PciInfo,
IN OUT AML_OBJECT_NODE_HANDLE PciNode
)
{
EFI_STATUS Status;

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@ -182,9 +182,9 @@ STATIC CONST CM_OBJ_PARSER CmArmGenericWatchdogInfoParser[] = {
{ "Flags", 4, "0x%x", NULL }
};
/** A parser for EArmObjPciConfigSpaceInfo.
/** A parser for EArchCommonObjPciConfigSpaceInfo.
*/
STATIC CONST CM_OBJ_PARSER CmArmPciConfigSpaceInfoParser[] = {
STATIC CONST CM_OBJ_PARSER CmArchCommonPciConfigSpaceInfoParser[] = {
{ "BaseAddress", 8, "0x%llx", NULL },
{ "PciSegmentGroupNumber", 2, "0x%x", NULL },
{ "StartBusNumber", 1, "0x%x", NULL },
@ -678,6 +678,7 @@ STATIC CONST CM_OBJ_PARSER_ARRAY ArchCommonNamespaceObjectParser[] = {
CM_PARSER_ADD_OBJECT (EArchCommonObjHypervisorVendorIdentity, CmArchCommonHypervisorVendorIdentityParser),
CM_PARSER_ADD_OBJECT (EArchCommonObjFixedFeatureFlags, CmArchCommonFixedFeatureFlagsParser),
CM_PARSER_ADD_OBJECT (EArchCommonObjCmRef, CmArchCommonObjRefParser),
CM_PARSER_ADD_OBJECT (EArchCommonObjPciConfigSpaceInfo, CmArchCommonPciConfigSpaceInfoParser),
CM_PARSER_ADD_OBJECT_RESERVED (EArchCommonObjMax)
};
@ -695,7 +696,6 @@ STATIC CONST CM_OBJ_PARSER_ARRAY ArmNamespaceObjectParser[] = {
CM_PARSER_ADD_OBJECT (EArmObjPlatformGTBlockInfo, CmArmGTBlockInfoParser),
CM_PARSER_ADD_OBJECT (EArmObjGTBlockTimerFrameInfo, CmArmGTBlockTimerFrameInfoParser),
CM_PARSER_ADD_OBJECT (EArmObjPlatformGenericWatchdogInfo, CmArmGenericWatchdogInfoParser),
CM_PARSER_ADD_OBJECT (EArmObjPciConfigSpaceInfo, CmArmPciConfigSpaceInfoParser),
CM_PARSER_ADD_OBJECT (EArmObjItsGroup, CmArmItsGroupNodeParser),
CM_PARSER_ADD_OBJECT (EArmObjNamedComponent, CmArmNamedComponentNodeParser),
CM_PARSER_ADD_OBJECT (EArmObjRootComplex, CmArmRootComplexNodeParser),

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@ -468,7 +468,7 @@ ParseIrqMap (
@param [in] Fdt Pointer to a Flattened Device Tree (Fdt).
@param [in] HostPciNode Offset of a host-pci node.
@param [in, out] PciInfo The CM_ARM_PCI_CONFIG_SPACE_INFO to populate.
@param [in, out] PciInfo The CM_ARCH_COMMON_PCI_CONFIG_SPACE_INFO to populate.
@retval EFI_SUCCESS The function completed successfully.
@retval EFI_ABORTED An error occurred.
@ -579,7 +579,7 @@ PciNodeParser (
/** Add the parsed Pci information to the Configuration Manager.
CmObj of the following types are concerned:
- EArmObjPciConfigSpaceInfo
- EArchCommonObjPciConfigSpaceInfo
- EArmObjPciAddressMapInfo
- EArmObjPciInterruptMapInfo
@ -599,8 +599,8 @@ PciInfoAdd (
IN PCI_PARSER_TABLE *PciTableInfo
)
{
EFI_STATUS Status;
CM_ARM_PCI_CONFIG_SPACE_INFO *PciConfigSpaceInfo;
EFI_STATUS Status;
CM_ARCH_COMMON_PCI_CONFIG_SPACE_INFO *PciConfigSpaceInfo;
if ((FdtParserHandle == NULL) ||
(PciTableInfo == NULL))
@ -640,9 +640,11 @@ PciInfoAdd (
// Add the configuration space CmObj to the Configuration Manager.
Status = AddSingleCmObj (
FdtParserHandle,
CREATE_CM_ARM_OBJECT_ID (EArmObjPciConfigSpaceInfo),
CREATE_CM_ARCH_COMMON_OBJECT_ID (
EArchCommonObjPciConfigSpaceInfo
),
&PciTableInfo->PciConfigSpaceInfo,
sizeof (CM_ARM_PCI_CONFIG_SPACE_INFO),
sizeof (CM_ARCH_COMMON_PCI_CONFIG_SPACE_INFO),
NULL
);
ASSERT_EFI_ERROR (Status);
@ -682,15 +684,15 @@ FreeParserTable (
return EFI_SUCCESS;
}
/** CM_ARM_PCI_CONFIG_SPACE_INFO parser function.
/** CM_ARCH_COMMON_PCI_CONFIG_SPACE_INFO parser function.
The following structure is populated:
typedef struct CmArmPciConfigSpaceInfo {
typedef struct CmArchCommonPciConfigSpaceInfo {
UINT64 BaseAddress; // {Populated}
UINT16 PciSegmentGroupNumber; // {Populated}
UINT8 StartBusNumber; // {Populated}
UINT8 EndBusNumber; // {Populated}
} CM_ARM_PCI_CONFIG_SPACE_INFO;
} CM_ARCH_COMMON_PCI_CONFIG_SPACE_INFO;
typedef struct CmArmPciAddressMapInfo {
UINT8 SpaceCode; // {Populated}

View File

@ -83,24 +83,24 @@ typedef enum PciMappingTable {
*/
typedef struct PciParserTable {
/// PCI Configuration Space Info
CM_ARM_PCI_CONFIG_SPACE_INFO PciConfigSpaceInfo;
CM_ARCH_COMMON_PCI_CONFIG_SPACE_INFO PciConfigSpaceInfo;
/// Store the address mapping and interrupt mapping as CmObjDesc
/// before adding them to the Configuration Manager.
CM_OBJ_DESCRIPTOR Mapping[PciMappingTableMax];
CM_OBJ_DESCRIPTOR Mapping[PciMappingTableMax];
} PCI_PARSER_TABLE;
#pragma pack()
/** CM_ARM_PCI_CONFIG_SPACE_INFO parser function.
/** CM_ARCH_COMMON_PCI_CONFIG_SPACE_INFO parser function.
The following structure is populated:
typedef struct CmArmPciConfigSpaceInfo {
typedef struct CmArchCommonPciConfigSpaceInfo {
UINT64 BaseAddress; // {Populated}
UINT16 PciSegmentGroupNumber; // {Populated}
UINT8 StartBusNumber; // {Populated}
UINT8 EndBusNumber; // {Populated}
} CM_ARM_PCI_CONFIG_SPACE_INFO;
} CM_ARCH_COMMON_PCI_CONFIG_SPACE_INFO;
typedef struct CmArmPciAddressMapInfo {
UINT8 SpaceCode; // {Populated}

View File

@ -451,37 +451,36 @@ The CM_OBJECT_ID type is used to identify the Configuration Manager
| 8 | Platform GT Block Info | |
| 9 | Generic Timer Block Frame Info | |
| 10 | Platform Generic Watchdog | |
| 11 | PCI Configuration Space Info | Move to Arch Common NS |
| 12 | ITS Group | |
| 13 | Named Component | |
| 14 | Root Complex | |
| 15 | SMMUv1 or SMMUv2 | |
| 16 | SMMUv3 | |
| 17 | PMCG | |
| 18 | GIC ITS Identifier Array | |
| 19 | ID Mapping Array | |
| 20 | SMMU Interrupt Array | |
| 21 | Processor Hierarchy Info | Move to Arch Common NS |
| 22 | Cache Info | Move to Arch Common NS |
| 23 | Memory Affinity Info | Move to Arch Common NS |
| 24 | Device Handle Acpi | Move to Arch Common NS |
| 25 | Device Handle PCI | Move to Arch Common NS |
| 26 | Generic Initiator Affinity Info | Move to Arch Common NS |
| 27 | CMN 600 Info | |
| 28 | Low Power Idle State Info | Move to Arch Common NS |
| 29 | PCI Address Map Info | Move to Arch Common NS |
| 30 | PCI Interrupt Map Info | Move to Arch Common NS |
| 31 | Reserved Memory Range Node | |
| 32 | Memory Range Descriptor | |
| 33 | Continuous Performance Control Info | Move to Arch Common NS |
| 34 | Pcc Subspace Type 0 Info | Move to Arch Common NS |
| 35 | Pcc Subspace Type 1 Info | Move to Arch Common NS |
| 36 | Pcc Subspace Type 2 Info | Move to Arch Common NS |
| 37 | Pcc Subspace Type 3 Info | Move to Arch Common NS |
| 38 | Pcc Subspace Type 4 Info | Move to Arch Common NS |
| 39 | Pcc Subspace Type 5 Info | Move to Arch Common NS |
| 40 | Embedded Trace Extension/Module Info | |
| 41 | P-State Dependency (PSD) Info | Move to Arch Common NS |
| 11 | ITS Group | |
| 12 | Named Component | |
| 13 | Root Complex | |
| 14 | SMMUv1 or SMMUv2 | |
| 15 | SMMUv3 | |
| 16 | PMCG | |
| 17 | GIC ITS Identifier Array | |
| 18 | ID Mapping Array | |
| 19 | SMMU Interrupt Array | |
| 20 | Processor Hierarchy Info | Move to Arch Common NS |
| 21 | Cache Info | Move to Arch Common NS |
| 22 | Memory Affinity Info | Move to Arch Common NS |
| 23 | Device Handle Acpi | Move to Arch Common NS |
| 24 | Device Handle PCI | Move to Arch Common NS |
| 25 | Generic Initiator Affinity Info | Move to Arch Common NS |
| 26 | CMN 600 Info | |
| 27 | Low Power Idle State Info | Move to Arch Common NS |
| 28 | PCI Address Map Info | Move to Arch Common NS |
| 29 | PCI Interrupt Map Info | Move to Arch Common NS |
| 30 | Reserved Memory Range Node | |
| 31 | Memory Range Descriptor | |
| 32 | Continuous Performance Control Info | Move to Arch Common NS |
| 33 | Pcc Subspace Type 0 Info | Move to Arch Common NS |
| 34 | Pcc Subspace Type 1 Info | Move to Arch Common NS |
| 35 | Pcc Subspace Type 2 Info | Move to Arch Common NS |
| 36 | Pcc Subspace Type 3 Info | Move to Arch Common NS |
| 37 | Pcc Subspace Type 4 Info | Move to Arch Common NS |
| 38 | Pcc Subspace Type 5 Info | Move to Arch Common NS |
| 39 | Embedded Trace Extension/Module Info | |
| 40 | P-State Dependency (PSD) Info | Move to Arch Common NS |
| `*` | All other values are reserved. | |
#### Object ID's in the Arch Common Namespace:
@ -496,4 +495,5 @@ The CM_OBJECT_ID type is used to identify the Configuration Manager
| 5 | Hypervisor Vendor Id | |
| 6 | Fixed feature flags for FADT | |
| 7 | CM Object Reference | |
| 8 | PCI Configuration Space Info | |
| `*` | All other values are reserved. | |