mirror of https://github.com/acidanthera/audk.git
DynamicTablesPkg: Move Pci Config Space Info to Arm namespace
Move Pci Config Space Info object from Arm Namespace to the Arch Common namespace. Correspondingly also update the following modules to reflect the changes introduced by the move: - MCFG generator - SSDT PCIe generator - SSDT PCIe support library - ConfigurationManagerObjectParser - Dynamic Plat Repo TokenFixer map - FdtHwInfoParserLib/Pci/ArmPciConfigSpaceParser Cc: Pierre Gondois <Pierre.Gondois@arm.com> Cc: Yeo Reum Yun <YeoReum.Yun@arm.com> Cc: AbdulLateef Attar <AbdulLateef.Attar@amd.com> Cc: Jeshua Smith <jeshuas@nvidia.com> Cc: Jeff Brasen <jbrasen@nvidia.com> Cc: Girish Mahadevan <gmahadevan@nvidia.com> Cc: Leif Lindholm <quic_llindhol@quicinc.com> Cc: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com> Signed-off-by: Sami Mujawar <sami.mujawar@arm.com> Signed-off-by: Pierre Gondois <pierre.gondois@arm.com> Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
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@ -28,6 +28,7 @@ typedef enum ArchCommonObjectID {
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EArchCommonObjHypervisorVendorIdentity, ///< 5 - Hypervisor Vendor Id
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EArchCommonObjFixedFeatureFlags, ///< 6 - Fixed feature flags for FADT
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EArchCommonObjCmRef, ///< 7 - CM Object Reference
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EArchCommonObjPciConfigSpaceInfo, ///< 8 - PCI Configuration Space Info
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EArchCommonObjMax
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} EARCH_COMMON_OBJECT_ID;
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@ -114,6 +115,33 @@ typedef struct CmArchCommonObjRef {
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CM_OBJECT_TOKEN ReferenceToken;
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} CM_ARCH_COMMON_OBJ_REF;
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/** A structure that describes the
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PCI Configuration Space information for the Platform.
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ID: EArchCommonObjPciConfigSpaceInfo
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*/
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typedef struct CmArchCommonPciConfigSpaceInfo {
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/// The physical base address for the PCI segment
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UINT64 BaseAddress;
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/// The PCI segment group number
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UINT16 PciSegmentGroupNumber;
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/// The start bus number
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UINT8 StartBusNumber;
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/// The end bus number
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UINT8 EndBusNumber;
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/// Optional field: Reference Token for address mapping.
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/// Token identifying a CM_ARCH_COMMON_OBJ_REF structure.
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CM_OBJECT_TOKEN AddressMapToken;
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/// Optional field: Reference Token for interrupt mapping.
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/// Token identifying a CM_ARCH_COMMON_OBJ_REF structure.
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CM_OBJECT_TOKEN InterruptMapToken;
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} CM_ARCH_COMMON_PCI_CONFIG_SPACE_INFO;
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#pragma pack()
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#endif // ARCH_COMMON_NAMESPACE_OBJECTS_H_
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@ -39,37 +39,36 @@ typedef enum ArmObjectID {
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EArmObjPlatformGTBlockInfo, ///< 8 - Platform GT Block Info
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EArmObjGTBlockTimerFrameInfo, ///< 9 - Generic Timer Block Frame Info
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EArmObjPlatformGenericWatchdogInfo, ///< 10 - Platform Generic Watchdog
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EArmObjPciConfigSpaceInfo, ///< 11 - PCI Configuration Space Info
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EArmObjItsGroup, ///< 12 - ITS Group
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EArmObjNamedComponent, ///< 13 - Named Component
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EArmObjRootComplex, ///< 14 - Root Complex
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EArmObjSmmuV1SmmuV2, ///< 15 - SMMUv1 or SMMUv2
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EArmObjSmmuV3, ///< 16 - SMMUv3
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EArmObjPmcg, ///< 17 - PMCG
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EArmObjGicItsIdentifierArray, ///< 18 - GIC ITS Identifier Array
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EArmObjIdMappingArray, ///< 19 - ID Mapping Array
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EArmObjSmmuInterruptArray, ///< 20 - SMMU Interrupt Array
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EArmObjProcHierarchyInfo, ///< 21 - Processor Hierarchy Info
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EArmObjCacheInfo, ///< 22 - Cache Info
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EArmObjMemoryAffinityInfo, ///< 23 - Memory Affinity Info
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EArmObjDeviceHandleAcpi, ///< 24 - Device Handle Acpi
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EArmObjDeviceHandlePci, ///< 25 - Device Handle Pci
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EArmObjGenericInitiatorAffinityInfo, ///< 26 - Generic Initiator Affinity
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EArmObjCmn600Info, ///< 27 - CMN-600 Info
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EArmObjLpiInfo, ///< 28 - Lpi Info
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EArmObjPciAddressMapInfo, ///< 29 - Pci Address Map Info
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EArmObjPciInterruptMapInfo, ///< 30 - Pci Interrupt Map Info
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EArmObjRmr, ///< 31 - Reserved Memory Range Node
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EArmObjMemoryRangeDescriptor, ///< 32 - Memory Range Descriptor
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EArmObjCpcInfo, ///< 33 - Continuous Performance Control Info
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EArmObjPccSubspaceType0Info, ///< 34 - Pcc Subspace Type 0 Info
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EArmObjPccSubspaceType1Info, ///< 35 - Pcc Subspace Type 2 Info
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EArmObjPccSubspaceType2Info, ///< 36 - Pcc Subspace Type 2 Info
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EArmObjPccSubspaceType3Info, ///< 37 - Pcc Subspace Type 3 Info
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EArmObjPccSubspaceType4Info, ///< 38 - Pcc Subspace Type 4 Info
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EArmObjPccSubspaceType5Info, ///< 39 - Pcc Subspace Type 5 Info
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EArmObjEtInfo, ///< 40 - Embedded Trace Extension/Module Info
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EArmObjPsdInfo, ///< 41 - P-State Dependency (PSD) Info
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EArmObjItsGroup, ///< 11 - ITS Group
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EArmObjNamedComponent, ///< 12 - Named Component
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EArmObjRootComplex, ///< 13 - Root Complex
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EArmObjSmmuV1SmmuV2, ///< 14 - SMMUv1 or SMMUv2
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EArmObjSmmuV3, ///< 15 - SMMUv3
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EArmObjPmcg, ///< 16 - PMCG
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EArmObjGicItsIdentifierArray, ///< 17 - GIC ITS Identifier Array
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EArmObjIdMappingArray, ///< 18 - ID Mapping Array
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EArmObjSmmuInterruptArray, ///< 19 - SMMU Interrupt Array
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EArmObjProcHierarchyInfo, ///< 20 - Processor Hierarchy Info
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EArmObjCacheInfo, ///< 21 - Cache Info
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EArmObjMemoryAffinityInfo, ///< 22 - Memory Affinity Info
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EArmObjDeviceHandleAcpi, ///< 23 - Device Handle Acpi
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EArmObjDeviceHandlePci, ///< 24 - Device Handle Pci
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EArmObjGenericInitiatorAffinityInfo, ///< 25 - Generic Initiator Affinity
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EArmObjCmn600Info, ///< 26 - CMN-600 Info
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EArmObjLpiInfo, ///< 27 - Lpi Info
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EArmObjPciAddressMapInfo, ///< 28 - Pci Address Map Info
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EArmObjPciInterruptMapInfo, ///< 29 - Pci Interrupt Map Info
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EArmObjRmr, ///< 30 - Reserved Memory Range Node
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EArmObjMemoryRangeDescriptor, ///< 31 - Memory Range Descriptor
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EArmObjCpcInfo, ///< 32 - Continuous Performance Control Info
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EArmObjPccSubspaceType0Info, ///< 33 - Pcc Subspace Type 0 Info
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EArmObjPccSubspaceType1Info, ///< 34 - Pcc Subspace Type 2 Info
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EArmObjPccSubspaceType2Info, ///< 35 - Pcc Subspace Type 2 Info
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EArmObjPccSubspaceType3Info, ///< 36 - Pcc Subspace Type 3 Info
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EArmObjPccSubspaceType4Info, ///< 37 - Pcc Subspace Type 4 Info
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EArmObjPccSubspaceType5Info, ///< 38 - Pcc Subspace Type 5 Info
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EArmObjEtInfo, ///< 39 - Embedded Trace Extension/Module Info
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EArmObjPsdInfo, ///< 40 - P-State Dependency (PSD) Info
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EArmObjMax
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} EARM_OBJECT_ID;
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@ -408,33 +407,6 @@ typedef struct CmArmGenericWatchdogInfo {
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UINT32 Flags;
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} CM_ARM_GENERIC_WATCHDOG_INFO;
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/** A structure that describes the
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PCI Configuration Space information for the Platform.
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ID: EArmObjPciConfigSpaceInfo
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*/
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typedef struct CmArmPciConfigSpaceInfo {
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/// The physical base address for the PCI segment
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UINT64 BaseAddress;
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/// The PCI segment group number
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UINT16 PciSegmentGroupNumber;
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/// The start bus number
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UINT8 StartBusNumber;
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/// The end bus number
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UINT8 EndBusNumber;
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/// Optional field: Reference Token for address mapping.
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/// Token identifying a CM_ARCH_COMMON_OBJ_REF structure.
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CM_OBJECT_TOKEN AddressMapToken;
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/// Optional field: Reference Token for interrupt mapping.
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/// Token identifying a CM_ARCH_COMMON_OBJ_REF structure.
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CM_OBJECT_TOKEN InterruptMapToken;
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} CM_ARM_PCI_CONFIG_SPACE_INFO;
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/** A structure that describes the
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ITS Group node for the Platform.
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@ -43,8 +43,8 @@ typedef struct MappingTable {
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EFI_STATUS
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EFIAPI
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AddOscMethod (
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IN CONST CM_ARM_PCI_CONFIG_SPACE_INFO *PciInfo,
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IN OUT AML_OBJECT_NODE_HANDLE PciNode
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IN CONST CM_ARCH_COMMON_PCI_CONFIG_SPACE_INFO *PciInfo,
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IN OUT AML_OBJECT_NODE_HANDLE PciNode
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);
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/** Generate Pci slots devices.
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@ -66,10 +66,10 @@ AddOscMethod (
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EFI_STATUS
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EFIAPI
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GeneratePciSlots (
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IN CONST CM_ARM_PCI_CONFIG_SPACE_INFO *PciInfo,
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IN CONST MAPPING_TABLE *MappingTable,
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IN UINT32 Uid,
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IN OUT AML_OBJECT_NODE_HANDLE PciNode
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IN CONST CM_ARCH_COMMON_PCI_CONFIG_SPACE_INFO *PciInfo,
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IN CONST MAPPING_TABLE *MappingTable,
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IN UINT32 Uid,
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IN OUT AML_OBJECT_NODE_HANDLE PciNode
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);
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#endif // SSDT_PCIE_SUPPORT_LIB_H_
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@ -27,7 +27,7 @@
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Requirements:
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The following Configuration Manager Object(s) are required by
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this Generator:
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- EArmObjPciConfigSpaceInfo
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- EArchCommonObjPciConfigSpaceInfo
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*/
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#pragma pack(1)
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@ -51,9 +51,9 @@ typedef
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/** Retrieve the PCI Configuration Space Information.
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*/
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GET_OBJECT_LIST (
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EObjNameSpaceArm,
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EArmObjPciConfigSpaceInfo,
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CM_ARM_PCI_CONFIG_SPACE_INFO
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EObjNameSpaceArchCommon,
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EArchCommonObjPciConfigSpaceInfo,
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CM_ARCH_COMMON_PCI_CONFIG_SPACE_INFO
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);
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/** Add the PCI Enhanced Configuration Space Information to the MCFG Table.
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@ -68,10 +68,10 @@ GET_OBJECT_LIST (
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STATIC
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VOID
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AddPciConfigurationSpaceList (
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IN MCFG_TABLE *CONST Mcfg,
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IN CONST UINT32 PciCfgSpaceOffset,
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IN CONST CM_ARM_PCI_CONFIG_SPACE_INFO *PciCfgSpaceInfoList,
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IN UINT32 PciCfgSpaceCount
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IN MCFG_TABLE *CONST Mcfg,
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IN CONST UINT32 PciCfgSpaceOffset,
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IN CONST CM_ARCH_COMMON_PCI_CONFIG_SPACE_INFO *PciCfgSpaceInfoList,
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IN UINT32 PciCfgSpaceCount
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)
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{
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MCFG_CFG_SPACE_ADDR *PciCfgSpace;
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@ -126,11 +126,11 @@ BuildMcfgTable (
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OUT EFI_ACPI_DESCRIPTION_HEADER **CONST Table
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)
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{
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EFI_STATUS Status;
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UINT32 TableSize;
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UINT32 ConfigurationSpaceCount;
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CM_ARM_PCI_CONFIG_SPACE_INFO *PciConfigSpaceInfoList;
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MCFG_TABLE *Mcfg;
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EFI_STATUS Status;
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UINT32 TableSize;
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UINT32 ConfigurationSpaceCount;
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CM_ARCH_COMMON_PCI_CONFIG_SPACE_INFO *PciConfigSpaceInfoList;
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MCFG_TABLE *Mcfg;
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ASSERT (This != NULL);
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ASSERT (AcpiTableInfo != NULL);
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@ -154,7 +154,7 @@ BuildMcfgTable (
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}
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*Table = NULL;
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Status = GetEArmObjPciConfigSpaceInfo (
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Status = GetEArchCommonObjPciConfigSpaceInfo (
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CfgMgrProtocol,
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CM_NULL_TOKEN,
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&PciConfigSpaceInfoList,
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@ -43,7 +43,7 @@ Requirements:
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The following Configuration Manager Object(s) are required by
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this Generator:
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- EArchCommonObjCmRef
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- EArmObjPciConfigSpaceInfo
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- EArchCommonObjPciConfigSpaceInfo
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- EArmObjPciAddressMapInfo
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- EArmObjPciInterruptMapInfo
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*/
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@ -61,9 +61,9 @@ GET_OBJECT_LIST (
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Configuration Space Information from the Configuration Manager.
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*/
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GET_OBJECT_LIST (
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EObjNameSpaceArm,
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EArmObjPciConfigSpaceInfo,
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CM_ARM_PCI_CONFIG_SPACE_INFO
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EObjNameSpaceArchCommon,
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EArchCommonObjPciConfigSpaceInfo,
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CM_ARCH_COMMON_PCI_CONFIG_SPACE_INFO
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);
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/** This macro expands to a function that retrieves the Pci
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@ -208,9 +208,9 @@ STATIC
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EFI_STATUS
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EFIAPI
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GeneratePciDeviceInfo (
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IN CONST CM_ARM_PCI_CONFIG_SPACE_INFO *PciInfo,
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IN UINT32 Uid,
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IN OUT AML_OBJECT_NODE_HANDLE PciNode
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IN CONST CM_ARCH_COMMON_PCI_CONFIG_SPACE_INFO *PciInfo,
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IN UINT32 Uid,
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IN OUT AML_OBJECT_NODE_HANDLE PciNode
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)
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{
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EFI_STATUS Status;
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@ -305,7 +305,7 @@ EFIAPI
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GeneratePrt (
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IN ACPI_PCI_GENERATOR *Generator,
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IN CONST EDKII_CONFIGURATION_MANAGER_PROTOCOL *CONST CfgMgrProtocol,
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IN CONST CM_ARM_PCI_CONFIG_SPACE_INFO *PciInfo,
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IN CONST CM_ARCH_COMMON_PCI_CONFIG_SPACE_INFO *PciInfo,
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IN UINT32 Uid,
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IN OUT AML_OBJECT_NODE_HANDLE PciNode
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)
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@ -451,7 +451,7 @@ EFIAPI
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GeneratePciCrs (
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IN ACPI_PCI_GENERATOR *Generator,
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IN CONST EDKII_CONFIGURATION_MANAGER_PROTOCOL *CONST CfgMgrProtocol,
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IN CONST CM_ARM_PCI_CONFIG_SPACE_INFO *PciInfo,
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IN CONST CM_ARCH_COMMON_PCI_CONFIG_SPACE_INFO *PciInfo,
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IN OUT AML_OBJECT_NODE_HANDLE PciNode
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)
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{
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@ -693,7 +693,7 @@ EFIAPI
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ReserveEcamSpace (
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IN ACPI_PCI_GENERATOR *Generator,
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IN CONST EDKII_CONFIGURATION_MANAGER_PROTOCOL *CONST CfgMgrProtocol,
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IN CONST CM_ARM_PCI_CONFIG_SPACE_INFO *PciInfo,
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IN CONST CM_ARCH_COMMON_PCI_CONFIG_SPACE_INFO *PciInfo,
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IN OUT AML_OBJECT_NODE_HANDLE PciNode
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)
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{
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@ -760,7 +760,7 @@ EFIAPI
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GeneratePciDevice (
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IN ACPI_PCI_GENERATOR *Generator,
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IN CONST EDKII_CONFIGURATION_MANAGER_PROTOCOL *CONST CfgMgrProtocol,
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IN CONST CM_ARM_PCI_CONFIG_SPACE_INFO *PciInfo,
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IN CONST CM_ARCH_COMMON_PCI_CONFIG_SPACE_INFO *PciInfo,
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IN UINT32 Uid,
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IN OUT AML_ROOT_NODE_HANDLE *RootNode
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)
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@ -863,7 +863,7 @@ BuildSsdtPciTable (
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IN ACPI_PCI_GENERATOR *Generator,
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IN CONST EDKII_CONFIGURATION_MANAGER_PROTOCOL *CONST CfgMgrProtocol,
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IN CONST CM_STD_OBJ_ACPI_TABLE_INFO *CONST AcpiTableInfo,
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IN CONST CM_ARM_PCI_CONFIG_SPACE_INFO *PciInfo,
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IN CONST CM_ARCH_COMMON_PCI_CONFIG_SPACE_INFO *PciInfo,
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IN UINT32 Uid,
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OUT EFI_ACPI_DESCRIPTION_HEADER **Table
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)
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@ -971,13 +971,13 @@ BuildSsdtPciTableEx (
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OUT UINTN *CONST TableCount
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)
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{
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EFI_STATUS Status;
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CM_ARM_PCI_CONFIG_SPACE_INFO *PciInfo;
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UINT32 PciCount;
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UINTN Index;
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EFI_ACPI_DESCRIPTION_HEADER **TableList;
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ACPI_PCI_GENERATOR *Generator;
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UINT32 Uid;
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EFI_STATUS Status;
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CM_ARCH_COMMON_PCI_CONFIG_SPACE_INFO *PciInfo;
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UINT32 PciCount;
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UINTN Index;
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EFI_ACPI_DESCRIPTION_HEADER **TableList;
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ACPI_PCI_GENERATOR *Generator;
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UINT32 Uid;
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ASSERT (This != NULL);
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ASSERT (AcpiTableInfo != NULL);
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@ -990,7 +990,7 @@ BuildSsdtPciTableEx (
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*TableCount = 0;
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Generator = (ACPI_PCI_GENERATOR *)This;
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Status = GetEArmObjPciConfigSpaceInfo (
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Status = GetEArchCommonObjPciConfigSpaceInfo (
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CfgMgrProtocol,
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CM_NULL_TOKEN,
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&PciInfo,
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@ -154,37 +154,36 @@ CM_OBJECT_TOKEN_FIXER TokenFixer[EArmObjMax] = {
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NULL, ///< 8 - Platform GT Block Info
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NULL, ///< 9 - Generic Timer Block Frame Info
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NULL, ///< 10 - Platform Generic Watchdog
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NULL, ///< 11 - PCI Configuration Space Info
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TokenFixerItsGroup, ///< 12 - ITS Group
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TokenFixerNamedComponentNode, ///< 13 - Named Component
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TokenFixerRootComplexNode, ///< 14 - Root Complex
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TokenFixerNotImplemented, ///< 15 - SMMUv1 or SMMUv2
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TokenFixerSmmuV3Node, ///< 16 - SMMUv3
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TokenFixerNotImplemented, ///< 17 - PMCG
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NULL, ///< 18 - GIC ITS Identifier Array
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NULL, ///< 19 - ID Mapping Array
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NULL, ///< 20 - SMMU Interrupt Array
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TokenFixerNotImplemented, ///< 21 - Processor Hierarchy Info
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TokenFixerNotImplemented, ///< 22 - Cache Info
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NULL, ///< 23 - Memory Affinity Info
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NULL, ///< 24 - Device Handle Acpi
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NULL, ///< 25 - Device Handle Pci
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NULL, ///< 26 - Generic Initiator Affinity
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NULL, ///< 27 - CMN-600 Info
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NULL, ///< 28 - Lpi Info
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NULL, ///< 29 - Pci Address Map Info
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NULL, ///< 30 - Pci Interrupt Map Info
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NULL, ///< 31 - Reserved Memory Range Node
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NULL, ///< 32 - Memory Range Descriptor
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NULL, ///< 33 - Continuous Performance Control Info
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NULL, ///< 34 - Pcc Subspace Type 0 Info
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TokenFixerItsGroup, ///< 11 - ITS Group
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TokenFixerNamedComponentNode, ///< 12 - Named Component
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TokenFixerRootComplexNode, ///< 13 - Root Complex
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TokenFixerNotImplemented, ///< 14 - SMMUv1 or SMMUv2
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TokenFixerSmmuV3Node, ///< 15 - SMMUv3
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TokenFixerNotImplemented, ///< 16 - PMCG
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NULL, ///< 17 - GIC ITS Identifier Array
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NULL, ///< 18 - ID Mapping Array
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NULL, ///< 19 - SMMU Interrupt Array
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TokenFixerNotImplemented, ///< 20 - Processor Hierarchy Info
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TokenFixerNotImplemented, ///< 21 - Cache Info
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NULL, ///< 22 - Memory Affinity Info
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NULL, ///< 23 - Device Handle Acpi
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NULL, ///< 24 - Device Handle Pci
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NULL, ///< 25 - Generic Initiator Affinity
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NULL, ///< 26 - CMN-600 Info
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NULL, ///< 27 - Lpi Info
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NULL, ///< 28 - Pci Address Map Info
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NULL, ///< 29 - Pci Interrupt Map Info
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NULL, ///< 30 - Reserved Memory Range Node
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NULL, ///< 31 - Memory Range Descriptor
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NULL, ///< 32 - Continuous Performance Control Info
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NULL, ///< 33 - Pcc Subspace Type 0 Info
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NULL, ///< 34 - Pcc Subspace Type 2 Info
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NULL, ///< 35 - Pcc Subspace Type 2 Info
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NULL, ///< 36 - Pcc Subspace Type 2 Info
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NULL, ///< 37 - Pcc Subspace Type 3 Info
|
||||
NULL, ///< 38 - Pcc Subspace Type 4 Info
|
||||
NULL, ///< 39 - Pcc Subspace Type 5 Info
|
||||
NULL, ///< 40 - Embedded Trace Extension/Module Info
|
||||
NULL ///< 41 - P-State Dependency (PSD) Info
|
||||
NULL, ///< 36 - Pcc Subspace Type 3 Info
|
||||
NULL, ///< 37 - Pcc Subspace Type 4 Info
|
||||
NULL, ///< 38 - Pcc Subspace Type 5 Info
|
||||
NULL, ///< 39 - Embedded Trace Extension/Module Info
|
||||
NULL ///< 40 - P-State Dependency (PSD) Info
|
||||
};
|
||||
|
||||
/** CmObj token fixer.
|
||||
|
|
|
@ -53,10 +53,10 @@
|
|||
EFI_STATUS
|
||||
EFIAPI
|
||||
GeneratePciSlots (
|
||||
IN CONST CM_ARM_PCI_CONFIG_SPACE_INFO *PciInfo,
|
||||
IN CONST MAPPING_TABLE *MappingTable,
|
||||
IN UINT32 Uid,
|
||||
IN OUT AML_OBJECT_NODE_HANDLE PciNode
|
||||
IN CONST CM_ARCH_COMMON_PCI_CONFIG_SPACE_INFO *PciInfo,
|
||||
IN CONST MAPPING_TABLE *MappingTable,
|
||||
IN UINT32 Uid,
|
||||
IN OUT AML_OBJECT_NODE_HANDLE PciNode
|
||||
)
|
||||
{
|
||||
EFI_STATUS Status;
|
||||
|
@ -132,8 +132,8 @@ GeneratePciSlots (
|
|||
EFI_STATUS
|
||||
EFIAPI
|
||||
AddOscMethod (
|
||||
IN CONST CM_ARM_PCI_CONFIG_SPACE_INFO *PciInfo,
|
||||
IN OUT AML_OBJECT_NODE_HANDLE PciNode
|
||||
IN CONST CM_ARCH_COMMON_PCI_CONFIG_SPACE_INFO *PciInfo,
|
||||
IN OUT AML_OBJECT_NODE_HANDLE PciNode
|
||||
)
|
||||
{
|
||||
EFI_STATUS Status;
|
||||
|
|
|
@ -182,9 +182,9 @@ STATIC CONST CM_OBJ_PARSER CmArmGenericWatchdogInfoParser[] = {
|
|||
{ "Flags", 4, "0x%x", NULL }
|
||||
};
|
||||
|
||||
/** A parser for EArmObjPciConfigSpaceInfo.
|
||||
/** A parser for EArchCommonObjPciConfigSpaceInfo.
|
||||
*/
|
||||
STATIC CONST CM_OBJ_PARSER CmArmPciConfigSpaceInfoParser[] = {
|
||||
STATIC CONST CM_OBJ_PARSER CmArchCommonPciConfigSpaceInfoParser[] = {
|
||||
{ "BaseAddress", 8, "0x%llx", NULL },
|
||||
{ "PciSegmentGroupNumber", 2, "0x%x", NULL },
|
||||
{ "StartBusNumber", 1, "0x%x", NULL },
|
||||
|
@ -678,6 +678,7 @@ STATIC CONST CM_OBJ_PARSER_ARRAY ArchCommonNamespaceObjectParser[] = {
|
|||
CM_PARSER_ADD_OBJECT (EArchCommonObjHypervisorVendorIdentity, CmArchCommonHypervisorVendorIdentityParser),
|
||||
CM_PARSER_ADD_OBJECT (EArchCommonObjFixedFeatureFlags, CmArchCommonFixedFeatureFlagsParser),
|
||||
CM_PARSER_ADD_OBJECT (EArchCommonObjCmRef, CmArchCommonObjRefParser),
|
||||
CM_PARSER_ADD_OBJECT (EArchCommonObjPciConfigSpaceInfo, CmArchCommonPciConfigSpaceInfoParser),
|
||||
CM_PARSER_ADD_OBJECT_RESERVED (EArchCommonObjMax)
|
||||
};
|
||||
|
||||
|
@ -695,7 +696,6 @@ STATIC CONST CM_OBJ_PARSER_ARRAY ArmNamespaceObjectParser[] = {
|
|||
CM_PARSER_ADD_OBJECT (EArmObjPlatformGTBlockInfo, CmArmGTBlockInfoParser),
|
||||
CM_PARSER_ADD_OBJECT (EArmObjGTBlockTimerFrameInfo, CmArmGTBlockTimerFrameInfoParser),
|
||||
CM_PARSER_ADD_OBJECT (EArmObjPlatformGenericWatchdogInfo, CmArmGenericWatchdogInfoParser),
|
||||
CM_PARSER_ADD_OBJECT (EArmObjPciConfigSpaceInfo, CmArmPciConfigSpaceInfoParser),
|
||||
CM_PARSER_ADD_OBJECT (EArmObjItsGroup, CmArmItsGroupNodeParser),
|
||||
CM_PARSER_ADD_OBJECT (EArmObjNamedComponent, CmArmNamedComponentNodeParser),
|
||||
CM_PARSER_ADD_OBJECT (EArmObjRootComplex, CmArmRootComplexNodeParser),
|
||||
|
|
|
@ -468,7 +468,7 @@ ParseIrqMap (
|
|||
|
||||
@param [in] Fdt Pointer to a Flattened Device Tree (Fdt).
|
||||
@param [in] HostPciNode Offset of a host-pci node.
|
||||
@param [in, out] PciInfo The CM_ARM_PCI_CONFIG_SPACE_INFO to populate.
|
||||
@param [in, out] PciInfo The CM_ARCH_COMMON_PCI_CONFIG_SPACE_INFO to populate.
|
||||
|
||||
@retval EFI_SUCCESS The function completed successfully.
|
||||
@retval EFI_ABORTED An error occurred.
|
||||
|
@ -579,7 +579,7 @@ PciNodeParser (
|
|||
/** Add the parsed Pci information to the Configuration Manager.
|
||||
|
||||
CmObj of the following types are concerned:
|
||||
- EArmObjPciConfigSpaceInfo
|
||||
- EArchCommonObjPciConfigSpaceInfo
|
||||
- EArmObjPciAddressMapInfo
|
||||
- EArmObjPciInterruptMapInfo
|
||||
|
||||
|
@ -599,8 +599,8 @@ PciInfoAdd (
|
|||
IN PCI_PARSER_TABLE *PciTableInfo
|
||||
)
|
||||
{
|
||||
EFI_STATUS Status;
|
||||
CM_ARM_PCI_CONFIG_SPACE_INFO *PciConfigSpaceInfo;
|
||||
EFI_STATUS Status;
|
||||
CM_ARCH_COMMON_PCI_CONFIG_SPACE_INFO *PciConfigSpaceInfo;
|
||||
|
||||
if ((FdtParserHandle == NULL) ||
|
||||
(PciTableInfo == NULL))
|
||||
|
@ -640,9 +640,11 @@ PciInfoAdd (
|
|||
// Add the configuration space CmObj to the Configuration Manager.
|
||||
Status = AddSingleCmObj (
|
||||
FdtParserHandle,
|
||||
CREATE_CM_ARM_OBJECT_ID (EArmObjPciConfigSpaceInfo),
|
||||
CREATE_CM_ARCH_COMMON_OBJECT_ID (
|
||||
EArchCommonObjPciConfigSpaceInfo
|
||||
),
|
||||
&PciTableInfo->PciConfigSpaceInfo,
|
||||
sizeof (CM_ARM_PCI_CONFIG_SPACE_INFO),
|
||||
sizeof (CM_ARCH_COMMON_PCI_CONFIG_SPACE_INFO),
|
||||
NULL
|
||||
);
|
||||
ASSERT_EFI_ERROR (Status);
|
||||
|
@ -682,15 +684,15 @@ FreeParserTable (
|
|||
return EFI_SUCCESS;
|
||||
}
|
||||
|
||||
/** CM_ARM_PCI_CONFIG_SPACE_INFO parser function.
|
||||
/** CM_ARCH_COMMON_PCI_CONFIG_SPACE_INFO parser function.
|
||||
|
||||
The following structure is populated:
|
||||
typedef struct CmArmPciConfigSpaceInfo {
|
||||
typedef struct CmArchCommonPciConfigSpaceInfo {
|
||||
UINT64 BaseAddress; // {Populated}
|
||||
UINT16 PciSegmentGroupNumber; // {Populated}
|
||||
UINT8 StartBusNumber; // {Populated}
|
||||
UINT8 EndBusNumber; // {Populated}
|
||||
} CM_ARM_PCI_CONFIG_SPACE_INFO;
|
||||
} CM_ARCH_COMMON_PCI_CONFIG_SPACE_INFO;
|
||||
|
||||
typedef struct CmArmPciAddressMapInfo {
|
||||
UINT8 SpaceCode; // {Populated}
|
||||
|
|
|
@ -83,24 +83,24 @@ typedef enum PciMappingTable {
|
|||
*/
|
||||
typedef struct PciParserTable {
|
||||
/// PCI Configuration Space Info
|
||||
CM_ARM_PCI_CONFIG_SPACE_INFO PciConfigSpaceInfo;
|
||||
CM_ARCH_COMMON_PCI_CONFIG_SPACE_INFO PciConfigSpaceInfo;
|
||||
|
||||
/// Store the address mapping and interrupt mapping as CmObjDesc
|
||||
/// before adding them to the Configuration Manager.
|
||||
CM_OBJ_DESCRIPTOR Mapping[PciMappingTableMax];
|
||||
CM_OBJ_DESCRIPTOR Mapping[PciMappingTableMax];
|
||||
} PCI_PARSER_TABLE;
|
||||
|
||||
#pragma pack()
|
||||
|
||||
/** CM_ARM_PCI_CONFIG_SPACE_INFO parser function.
|
||||
/** CM_ARCH_COMMON_PCI_CONFIG_SPACE_INFO parser function.
|
||||
|
||||
The following structure is populated:
|
||||
typedef struct CmArmPciConfigSpaceInfo {
|
||||
typedef struct CmArchCommonPciConfigSpaceInfo {
|
||||
UINT64 BaseAddress; // {Populated}
|
||||
UINT16 PciSegmentGroupNumber; // {Populated}
|
||||
UINT8 StartBusNumber; // {Populated}
|
||||
UINT8 EndBusNumber; // {Populated}
|
||||
} CM_ARM_PCI_CONFIG_SPACE_INFO;
|
||||
} CM_ARCH_COMMON_PCI_CONFIG_SPACE_INFO;
|
||||
|
||||
typedef struct CmArmPciAddressMapInfo {
|
||||
UINT8 SpaceCode; // {Populated}
|
||||
|
|
|
@ -451,37 +451,36 @@ The CM_OBJECT_ID type is used to identify the Configuration Manager
|
|||
| 8 | Platform GT Block Info | |
|
||||
| 9 | Generic Timer Block Frame Info | |
|
||||
| 10 | Platform Generic Watchdog | |
|
||||
| 11 | PCI Configuration Space Info | Move to Arch Common NS |
|
||||
| 12 | ITS Group | |
|
||||
| 13 | Named Component | |
|
||||
| 14 | Root Complex | |
|
||||
| 15 | SMMUv1 or SMMUv2 | |
|
||||
| 16 | SMMUv3 | |
|
||||
| 17 | PMCG | |
|
||||
| 18 | GIC ITS Identifier Array | |
|
||||
| 19 | ID Mapping Array | |
|
||||
| 20 | SMMU Interrupt Array | |
|
||||
| 21 | Processor Hierarchy Info | Move to Arch Common NS |
|
||||
| 22 | Cache Info | Move to Arch Common NS |
|
||||
| 23 | Memory Affinity Info | Move to Arch Common NS |
|
||||
| 24 | Device Handle Acpi | Move to Arch Common NS |
|
||||
| 25 | Device Handle PCI | Move to Arch Common NS |
|
||||
| 26 | Generic Initiator Affinity Info | Move to Arch Common NS |
|
||||
| 27 | CMN 600 Info | |
|
||||
| 28 | Low Power Idle State Info | Move to Arch Common NS |
|
||||
| 29 | PCI Address Map Info | Move to Arch Common NS |
|
||||
| 30 | PCI Interrupt Map Info | Move to Arch Common NS |
|
||||
| 31 | Reserved Memory Range Node | |
|
||||
| 32 | Memory Range Descriptor | |
|
||||
| 33 | Continuous Performance Control Info | Move to Arch Common NS |
|
||||
| 34 | Pcc Subspace Type 0 Info | Move to Arch Common NS |
|
||||
| 35 | Pcc Subspace Type 1 Info | Move to Arch Common NS |
|
||||
| 36 | Pcc Subspace Type 2 Info | Move to Arch Common NS |
|
||||
| 37 | Pcc Subspace Type 3 Info | Move to Arch Common NS |
|
||||
| 38 | Pcc Subspace Type 4 Info | Move to Arch Common NS |
|
||||
| 39 | Pcc Subspace Type 5 Info | Move to Arch Common NS |
|
||||
| 40 | Embedded Trace Extension/Module Info | |
|
||||
| 41 | P-State Dependency (PSD) Info | Move to Arch Common NS |
|
||||
| 11 | ITS Group | |
|
||||
| 12 | Named Component | |
|
||||
| 13 | Root Complex | |
|
||||
| 14 | SMMUv1 or SMMUv2 | |
|
||||
| 15 | SMMUv3 | |
|
||||
| 16 | PMCG | |
|
||||
| 17 | GIC ITS Identifier Array | |
|
||||
| 18 | ID Mapping Array | |
|
||||
| 19 | SMMU Interrupt Array | |
|
||||
| 20 | Processor Hierarchy Info | Move to Arch Common NS |
|
||||
| 21 | Cache Info | Move to Arch Common NS |
|
||||
| 22 | Memory Affinity Info | Move to Arch Common NS |
|
||||
| 23 | Device Handle Acpi | Move to Arch Common NS |
|
||||
| 24 | Device Handle PCI | Move to Arch Common NS |
|
||||
| 25 | Generic Initiator Affinity Info | Move to Arch Common NS |
|
||||
| 26 | CMN 600 Info | |
|
||||
| 27 | Low Power Idle State Info | Move to Arch Common NS |
|
||||
| 28 | PCI Address Map Info | Move to Arch Common NS |
|
||||
| 29 | PCI Interrupt Map Info | Move to Arch Common NS |
|
||||
| 30 | Reserved Memory Range Node | |
|
||||
| 31 | Memory Range Descriptor | |
|
||||
| 32 | Continuous Performance Control Info | Move to Arch Common NS |
|
||||
| 33 | Pcc Subspace Type 0 Info | Move to Arch Common NS |
|
||||
| 34 | Pcc Subspace Type 1 Info | Move to Arch Common NS |
|
||||
| 35 | Pcc Subspace Type 2 Info | Move to Arch Common NS |
|
||||
| 36 | Pcc Subspace Type 3 Info | Move to Arch Common NS |
|
||||
| 37 | Pcc Subspace Type 4 Info | Move to Arch Common NS |
|
||||
| 38 | Pcc Subspace Type 5 Info | Move to Arch Common NS |
|
||||
| 39 | Embedded Trace Extension/Module Info | |
|
||||
| 40 | P-State Dependency (PSD) Info | Move to Arch Common NS |
|
||||
| `*` | All other values are reserved. | |
|
||||
|
||||
#### Object ID's in the Arch Common Namespace:
|
||||
|
@ -496,4 +495,5 @@ The CM_OBJECT_ID type is used to identify the Configuration Manager
|
|||
| 5 | Hypervisor Vendor Id | |
|
||||
| 6 | Fixed feature flags for FADT | |
|
||||
| 7 | CM Object Reference | |
|
||||
| 8 | PCI Configuration Space Info | |
|
||||
| `*` | All other values are reserved. | |
|
||||
|
|
Loading…
Reference in New Issue