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ArmPkg/Mmu: Fix page level calculation bug 

The bug can be triggered when alignment of Base is larger than Length
by 2 level of page granularity, e.g.

Base is 0x4000_0000, Length is 0x1000

The original code will change 2MB page level and we will get a
negative remaining length.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
Cc: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18422 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
Heyi Guo 2015-09-09 13:37:22 +00:00 committed by abiesheuvel
parent 7d189f99d8
commit 946067bfb0
1 changed files with 1 additions and 1 deletions
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2
ArmPkg/Library/ArmLib/AArch64/AArch64Mmu.c
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@ -314,7 +314,7 @@ GetBlockEntryListFromAddress (
// If the required size is smaller than the current block size then we need to go to the page below.
// The PageLevel was calculated on the Base Address alignment but did not take in account the alignment
// of the allocation size
if (*BlockEntrySize < TT_BLOCK_ENTRY_SIZE_AT_LEVEL (PageLevel)) {
while (*BlockEntrySize < TT_BLOCK_ENTRY_SIZE_AT_LEVEL (PageLevel)) {
// It does not fit so we need to go a page level above
PageLevel++;
}