mirror of https://github.com/acidanthera/audk.git
UefiCpuPkg/PiSmmCpuDxeSmm: Refine code to avoid duplicated code.
V2: Change function parameter to avoid touch global info in function. Enhance function name, make it more user friendly V1: Refine code to avoid duplicate code to set processor register. Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
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@ -208,18 +208,30 @@ Returns:
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This function programs registers for the calling processor.
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This function programs registers for the calling processor.
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@param RegisterTable Pointer to register table of the running processor.
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@param RegisterTables Pointer to register table of the running processor.
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@param RegisterTableCount Register table count.
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**/
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**/
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VOID
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VOID
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SetProcessorRegister (
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SetProcessorRegister (
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IN CPU_REGISTER_TABLE *RegisterTable
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IN CPU_REGISTER_TABLE *RegisterTables,
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IN UINTN RegisterTableCount
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)
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)
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{
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{
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CPU_REGISTER_TABLE_ENTRY *RegisterTableEntry;
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CPU_REGISTER_TABLE_ENTRY *RegisterTableEntry;
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UINTN Index;
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UINTN Index;
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UINTN Value;
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UINTN Value;
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SPIN_LOCK *MsrSpinLock;
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SPIN_LOCK *MsrSpinLock;
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UINT32 InitApicId;
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CPU_REGISTER_TABLE *RegisterTable;
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InitApicId = GetInitialApicId ();
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for (Index = 0; Index < RegisterTableCount; Index++) {
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if (RegisterTables[Index].InitialApicId == InitApicId) {
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RegisterTable = &RegisterTables[Index];
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break;
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}
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}
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//
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//
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// Traverse Register Table of this logical processor
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// Traverse Register Table of this logical processor
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@ -347,36 +359,20 @@ SetProcessorRegister (
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}
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}
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}
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}
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/**
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/**
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AP initialization before then after SMBASE relocation in the S3 boot path.
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AP initialization before then after SMBASE relocation in the S3 boot path.
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**/
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**/
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VOID
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VOID
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MPRendezvousProcedure (
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InitializeAp (
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VOID
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VOID
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)
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)
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{
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{
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CPU_REGISTER_TABLE *RegisterTableList;
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UINT32 InitApicId;
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UINTN Index;
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UINTN TopOfStack;
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UINTN TopOfStack;
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UINT8 Stack[128];
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UINT8 Stack[128];
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LoadMtrrData (mAcpiCpuData.MtrrTable);
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LoadMtrrData (mAcpiCpuData.MtrrTable);
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//
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SetProcessorRegister ((CPU_REGISTER_TABLE *) (UINTN) mAcpiCpuData.PreSmmInitRegisterTable, mAcpiCpuData.NumberOfCpus);
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// Find processor number for this CPU.
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//
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RegisterTableList = (CPU_REGISTER_TABLE *) (UINTN) mAcpiCpuData.PreSmmInitRegisterTable;
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InitApicId = GetInitialApicId ();
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for (Index = 0; Index < mAcpiCpuData.NumberOfCpus; Index++) {
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if (RegisterTableList[Index].InitialApicId == InitApicId) {
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SetProcessorRegister (&RegisterTableList[Index]);
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break;
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}
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}
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//
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//
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// Count down the number with lock mechanism.
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// Count down the number with lock mechanism.
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@ -393,14 +389,7 @@ MPRendezvousProcedure (
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ProgramVirtualWireMode ();
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ProgramVirtualWireMode ();
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DisableLvtInterrupts ();
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DisableLvtInterrupts ();
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RegisterTableList = (CPU_REGISTER_TABLE *) (UINTN) mAcpiCpuData.RegisterTable;
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SetProcessorRegister ((CPU_REGISTER_TABLE *) (UINTN) mAcpiCpuData.RegisterTable, mAcpiCpuData.NumberOfCpus);
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InitApicId = GetInitialApicId ();
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for (Index = 0; Index < mAcpiCpuData.NumberOfCpus; Index++) {
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if (RegisterTableList[Index].InitialApicId == InitApicId) {
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SetProcessorRegister (&RegisterTableList[Index]);
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break;
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}
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}
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//
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//
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// Place AP into the safe code, count down the number with lock mechanism in the safe code.
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// Place AP into the safe code, count down the number with lock mechanism in the safe code.
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@ -475,34 +464,20 @@ PrepareApStartupVector (
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**/
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**/
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VOID
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VOID
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EarlyInitializeCpu (
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InitializeCpuBeforeRebase (
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VOID
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VOID
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)
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)
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{
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{
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CPU_REGISTER_TABLE *RegisterTableList;
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UINT32 InitApicId;
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UINTN Index;
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LoadMtrrData (mAcpiCpuData.MtrrTable);
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LoadMtrrData (mAcpiCpuData.MtrrTable);
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//
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SetProcessorRegister ((CPU_REGISTER_TABLE *) (UINTN) mAcpiCpuData.PreSmmInitRegisterTable, mAcpiCpuData.NumberOfCpus);
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// Find processor number for this CPU.
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//
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RegisterTableList = (CPU_REGISTER_TABLE *) (UINTN) mAcpiCpuData.PreSmmInitRegisterTable;
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InitApicId = GetInitialApicId ();
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for (Index = 0; Index < mAcpiCpuData.NumberOfCpus; Index++) {
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if (RegisterTableList[Index].InitialApicId == InitApicId) {
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SetProcessorRegister (&RegisterTableList[Index]);
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break;
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}
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}
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ProgramVirtualWireMode ();
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ProgramVirtualWireMode ();
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PrepareApStartupVector (mAcpiCpuData.StartupVector);
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PrepareApStartupVector (mAcpiCpuData.StartupVector);
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mNumberToFinish = mAcpiCpuData.NumberOfCpus - 1;
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mNumberToFinish = mAcpiCpuData.NumberOfCpus - 1;
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mExchangeInfo->ApFunction = (VOID *) (UINTN) MPRendezvousProcedure;
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mExchangeInfo->ApFunction = (VOID *) (UINTN) InitializeAp;
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//
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//
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// Execute code for before SmmBaseReloc. Note: This flag is maintained across S3 boots.
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// Execute code for before SmmBaseReloc. Note: This flag is maintained across S3 boots.
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@ -527,22 +502,11 @@ EarlyInitializeCpu (
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**/
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**/
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VOID
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VOID
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InitializeCpu (
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InitializeCpuAfterRebase (
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VOID
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VOID
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)
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)
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{
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{
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CPU_REGISTER_TABLE *RegisterTableList;
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SetProcessorRegister ((CPU_REGISTER_TABLE *) (UINTN) mAcpiCpuData.RegisterTable, mAcpiCpuData.NumberOfCpus);
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UINT32 InitApicId;
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UINTN Index;
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RegisterTableList = (CPU_REGISTER_TABLE *) (UINTN) mAcpiCpuData.RegisterTable;
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InitApicId = GetInitialApicId ();
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for (Index = 0; Index < mAcpiCpuData.NumberOfCpus; Index++) {
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if (RegisterTableList[Index].InitialApicId == InitApicId) {
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SetProcessorRegister (&RegisterTableList[Index]);
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break;
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}
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}
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mNumberToFinish = mAcpiCpuData.NumberOfCpus - 1;
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mNumberToFinish = mAcpiCpuData.NumberOfCpus - 1;
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@ -660,7 +624,7 @@ SmmRestoreCpu (
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//
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//
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// First time microcode load and restore MTRRs
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// First time microcode load and restore MTRRs
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//
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//
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EarlyInitializeCpu ();
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InitializeCpuBeforeRebase ();
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}
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}
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//
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//
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@ -675,7 +639,7 @@ SmmRestoreCpu (
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//
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//
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// Restore MSRs for BSP and all APs
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// Restore MSRs for BSP and all APs
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//
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//
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InitializeCpu ();
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InitializeCpuAfterRebase ();
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}
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}
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//
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//
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