tyler.durden
/
audk
mirror of https://github.com/acidanthera/audk.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

OvmfPkg/QemuVideoDxe/VbeShim: handle PAM1 register on Q35 correctly 

In commit db27e9f3d8 ("OvmfPkg/LegacyRegion: Support legacy region
manipulation of Q35", 2016-03-15), Ray extended the
OvmfPkg/Csm/CsmSupportLib PAM register manipulation to Q35. However, we
missed that the same should be done to the QemuVideoDxe VBE Shim as well.

The omission has caused no problems in practice on Q35, because QEMU has
let us write to the ROM area, regardless of the PAM1 setting, all this
time. This has now changed with recent QEMU commit 208fa0e43645 ("pc: make
'pc.rom' readonly when machine has PCI enabled", 2017-07-28). The QEMU
commit exposes the OVMF bug when Windows 7 is started on Q35, using QEMU
2.10 -- the VBE Shim is no longer put in place and Windows 7 cannot find
it.

To remedy this, assign the "Pam1Address" local variable a PciLib address
that matches the board type (i440fx vs. q35).

Regarding the PcdLib dependency: QemuVideoDxe already uses PcdLib, both
directly (see "PcdDriverSupportedEfiVersion") and indirectly (e.g. via the
DxePciLibI440FxQ35 PciLib instance). Add PcdLib to [LibraryClasses] for
completeness.

Cc: Aleksei Kovura <alex3kov@zoho.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Igor Mammedov <imammedo@redhat.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Ref: https://bugs.launchpad.net/qemu/+bug/1715700
Reported-by: Aleksei Kovura <alex3kov@zoho.com>
Special-thanks-to: Gerd Hoffmann <kraxel@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Tested-by: Aleksei Kovura <alex3kov@zoho.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
This commit is contained in:
Laszlo Ersek 2017-09-19 17:05:08 +02:00
parent ce461ae240
commit 947f3737ab
2 changed files with 28 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
OvmfPkg/QemuVideoDxe/QemuVideoDxe.inf
View File

@ -60,6 +60,7 @@
DebugLib
DevicePathLib
MemoryAllocationLib
PcdLib
PciLib
PrintLib
TimerLib
@ -75,4 +76,4 @@
[Pcd]
gOptionRomPkgTokenSpaceGuid.PcdDriverSupportedEfiVersion
gUefiOvmfPkgTokenSpaceGuid.PcdOvmfHostBridgePciDevId

27
OvmfPkg/QemuVideoDxe/VbeShim.c
View File

@ -25,6 +25,7 @@
#include <Library/DebugLib.h>
#include <Library/PciLib.h>
#include <Library/PrintLib.h>
#include <OvmfPlatforms.h>
#include "Qemu.h"
#include "VbeShim.h"
@ -64,6 +65,7 @@ InstallVbeShim (
UINTN Segment0Pages;
IVT_ENTRY *Int0x10;
EFI_STATUS Segment0AllocationStatus;
UINT16 HostBridgeDevId;
UINTN Pam1Address;
UINT8 Pam1;
UINTN SegmentCPages;
@ -131,7 +133,30 @@ InstallVbeShim (
//
// Put the shim in place first.
//
Pam1Address = PCI_LIB_ADDRESS (0, 0, 0, 0x5A);
// Start by determining the address of the PAM1 register.
//
HostBridgeDevId = PcdGet16 (PcdOvmfHostBridgePciDevId);
switch (HostBridgeDevId) {
case INTEL_82441_DEVICE_ID:
Pam1Address = PMC_REGISTER_PIIX4 (PIIX4_PAM1);
break;
case INTEL_Q35_MCH_DEVICE_ID:
Pam1Address = DRAMC_REGISTER_Q35 (MCH_PAM1);
break;
default:
DEBUG ((
DEBUG_ERROR,
"%a: unknown host bridge device ID: 0x%04x\n",
__FUNCTION__,
HostBridgeDevId
));
ASSERT (FALSE);
if (!EFI_ERROR (Segment0AllocationStatus)) {
gBS->FreePages (Segment0, Segment0Pages);
}
return;
}
//
// low nibble covers 0xC0000 to 0xC3FFF
// high nibble covers 0xC4000 to 0xC7FFF