From 94be39d0c538ecd576d354393693195db8e06ef8 Mon Sep 17 00:00:00 2001 From: Mikhail Krichanov Date: Thu, 5 Sep 2024 17:39:35 +0300 Subject: [PATCH] Ring3: Refactored I/O Map initialization using PcdUartBase and PcdDebugIoPort. --- OvmfPkg/OvmfPkg.dec | 5 ++++- PcAtChipsetPkg/Library/SerialIoLib/SerialIoLib.inf | 4 ++++ PcAtChipsetPkg/Library/SerialIoLib/SerialPortLib.c | 2 +- .../CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.inf | 3 +++ .../CpuExceptionHandlerLib/Ia32/ArchExceptionHandler.c | 7 +++++-- .../CpuExceptionHandlerLib/Ia32/ArchInterruptDefs.h | 2 +- .../CpuExceptionHandlerLib/PeiCpuExceptionHandlerLib.inf | 5 ++++- .../SecPeiCpuExceptionHandlerLib.inf | 3 +++ .../CpuExceptionHandlerLib/SmmCpuExceptionHandlerLib.inf | 3 +++ .../CpuExceptionHandlerLib/X64/ArchExceptionHandler.c | 7 +++++-- .../Library/CpuExceptionHandlerLib/X64/ArchInterruptDefs.h | 5 +---- 11 files changed, 34 insertions(+), 12 deletions(-) diff --git a/OvmfPkg/OvmfPkg.dec b/OvmfPkg/OvmfPkg.dec index 9217de7026..8f379f55fe 100644 --- a/OvmfPkg/OvmfPkg.dec +++ b/OvmfPkg/OvmfPkg.dec @@ -201,9 +201,12 @@ gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDxeNonCcFvBase|0x0|UINT32|0x6a gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDxeNonCcFvSize|0x0|UINT32|0x6b - ## This flag is used to control the destination port for PlatformDebugLibIoPort + ## Controls the destination port for PlatformDebugLibIoPort gUefiOvmfPkgTokenSpaceGuid.PcdDebugIoPort|0x402|UINT16|4 + ## Controls the destination ports for SerialPortLib + gUefiOvmfPkgTokenSpaceGuid.PcdUartBase|0x3F8|UINT16|0x104 + ## When VirtioScsiDxe is instantiated for a HBA, the numbers of targets and # LUNs are retrieved from the host during virtio-scsi setup. # MdeModulePkg/Bus/Scsi/ScsiBusDxe then scans all MaxTarget * MaxLun diff --git a/PcAtChipsetPkg/Library/SerialIoLib/SerialIoLib.inf b/PcAtChipsetPkg/Library/SerialIoLib/SerialIoLib.inf index d02259a07c..4f6d4c44ce 100644 --- a/PcAtChipsetPkg/Library/SerialIoLib/SerialIoLib.inf +++ b/PcAtChipsetPkg/Library/SerialIoLib/SerialIoLib.inf @@ -17,11 +17,15 @@ [Packages] MdePkg/MdePkg.dec + OvmfPkg/OvmfPkg.dec [LibraryClasses] BaseLib IoLib + PcdLib [Sources] SerialPortLib.c +[Pcd] + gUefiOvmfPkgTokenSpaceGuid.PcdUartBase ## CONSUMES diff --git a/PcAtChipsetPkg/Library/SerialIoLib/SerialPortLib.c b/PcAtChipsetPkg/Library/SerialIoLib/SerialPortLib.c index 11537ec276..a880266236 100644 --- a/PcAtChipsetPkg/Library/SerialIoLib/SerialPortLib.c +++ b/PcAtChipsetPkg/Library/SerialIoLib/SerialPortLib.c @@ -43,7 +43,7 @@ // --------------------------------------------- // UART Settings // --------------------------------------------- -UINT16 gUartBase = 0x3F8; +UINT16 gUartBase = FixedPcdGet16 (PcdUartBase); UINTN gBps = 115200; UINT8 gData = 8; UINT8 gStop = 1; diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.inf b/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.inf index 398c82d46f..03d209b81a 100644 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.inf +++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.inf @@ -50,6 +50,8 @@ gEfiMdeModulePkgTokenSpaceGuid.PcdCpuStackGuard gUefiCpuPkgTokenSpaceGuid.PcdCpuStackSwitchExceptionList gUefiCpuPkgTokenSpaceGuid.PcdCpuKnownGoodStackSize + gUefiOvmfPkgTokenSpaceGuid.PcdUartBase ## CONSUMES + gUefiOvmfPkgTokenSpaceGuid.PcdDebugIoPort ## CONSUMES [FeaturePcd] gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmStackGuard ## CONSUMES @@ -57,6 +59,7 @@ [Packages] MdePkg/MdePkg.dec MdeModulePkg/MdeModulePkg.dec + OvmfPkg/OvmfPkg.dec UefiCpuPkg/UefiCpuPkg.dec [LibraryClasses.common] diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchExceptionHandler.c b/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchExceptionHandler.c index da588d6b3a..4b5898b33c 100644 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchExceptionHandler.c +++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchExceptionHandler.c @@ -229,12 +229,15 @@ ArchSetupExceptionStack ( Tss->SS0 = AsmReadSs (); Tss->IOMapBaseAddress = sizeof (IA32_TASK_STATE_SEGMENT); // - // Allow access to gUartBase = 0x3F8 and Offsets: 0x01, 0x03, 0x04, 0x05, 0x06 + // Allow access to gUartBase = 0x3F8 and Offsets: 0x01, 0x03, 0x04, 0x05, 0x06; + // and DebugIoPort = 0x402. // IOBitMap = (UINT8 *)((UINTN)Tss + Tss->IOMapBaseAddress); for (Index = 0; Index < IO_BIT_MAP_SIZE; ++Index) { - if ((Index * 8) == 0x3F8) { + if ((Index * 8) == FixedPcdGet16 (PcdUartBase)) { *IOBitMap = 0x84; + } else if ((Index * 8) == (FixedPcdGet16 (PcdDebugIoPort) - 2)) { + *IOBitMap = 0xFB; } else { *IOBitMap = 0xFF; } diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchInterruptDefs.h b/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchInterruptDefs.h index 675c45436c..eeae24bdb3 100644 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchInterruptDefs.h +++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchInterruptDefs.h @@ -39,7 +39,7 @@ typedef struct { (sizeof (IA32_TSS_DESCRIPTOR) * \ (FixedPcdGetSize (PcdCpuStackSwitchExceptionList) + 1)) -#define IO_BIT_MAP_SIZE (ALIGN_VALUE (0x81, 16)) +#define IO_BIT_MAP_SIZE (ALIGN_VALUE (FixedPcdGet16 (PcdDebugIoPort) / 8 + 1, 16)) #define CPU_TSS_SIZE \ (sizeof (IA32_TASK_STATE_SEGMENT) * \ (FixedPcdGetSize (PcdCpuStackSwitchExceptionList) + 1) + IO_BIT_MAP_SIZE) diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuExceptionHandlerLib.inf b/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuExceptionHandlerLib.inf index 3caff1beb6..fbde353661 100644 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuExceptionHandlerLib.inf +++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuExceptionHandlerLib.inf @@ -41,6 +41,7 @@ [Packages] MdePkg/MdePkg.dec MdeModulePkg/MdeModulePkg.dec + OvmfPkg/OvmfPkg.dec UefiCpuPkg/UefiCpuPkg.dec [LibraryClasses] @@ -55,9 +56,11 @@ SynchronizationLib [Pcd] - gEfiMdeModulePkgTokenSpaceGuid.PcdCpuStackGuard # CONSUMES + gEfiMdeModulePkgTokenSpaceGuid.PcdCpuStackGuard ## CONSUMES gUefiCpuPkgTokenSpaceGuid.PcdCpuKnownGoodStackSize gUefiCpuPkgTokenSpaceGuid.PcdCpuStackSwitchExceptionList + gUefiOvmfPkgTokenSpaceGuid.PcdUartBase ## CONSUMES + gUefiOvmfPkgTokenSpaceGuid.PcdDebugIoPort ## CONSUMES [FeaturePcd] gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmStackGuard ## CONSUMES diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuExceptionHandlerLib.inf b/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuExceptionHandlerLib.inf index 827bcd0e36..eeb09f089d 100644 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuExceptionHandlerLib.inf +++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuExceptionHandlerLib.inf @@ -50,6 +50,7 @@ [Packages] MdePkg/MdePkg.dec MdeModulePkg/MdeModulePkg.dec + OvmfPkg/OvmfPkg.dec UefiCpuPkg/UefiCpuPkg.dec [LibraryClasses.common] @@ -69,6 +70,8 @@ gEfiMdeModulePkgTokenSpaceGuid.PcdCpuStackGuard gUefiCpuPkgTokenSpaceGuid.PcdCpuStackSwitchExceptionList gUefiCpuPkgTokenSpaceGuid.PcdCpuKnownGoodStackSize + gUefiOvmfPkgTokenSpaceGuid.PcdUartBase ## CONSUMES + gUefiOvmfPkgTokenSpaceGuid.PcdDebugIoPort ## CONSUMES [FeaturePcd] gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmStackGuard ## CONSUMES diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SmmCpuExceptionHandlerLib.inf b/UefiCpuPkg/Library/CpuExceptionHandlerLib/SmmCpuExceptionHandlerLib.inf index de88041442..a21ecd56b8 100644 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SmmCpuExceptionHandlerLib.inf +++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/SmmCpuExceptionHandlerLib.inf @@ -41,6 +41,7 @@ [Packages] MdePkg/MdePkg.dec MdeModulePkg/MdeModulePkg.dec + OvmfPkg/OvmfPkg.dec UefiCpuPkg/UefiCpuPkg.dec [LibraryClasses] @@ -56,6 +57,8 @@ gEfiMdeModulePkgTokenSpaceGuid.PcdCpuStackGuard gUefiCpuPkgTokenSpaceGuid.PcdCpuStackSwitchExceptionList gUefiCpuPkgTokenSpaceGuid.PcdCpuKnownGoodStackSize + gUefiOvmfPkgTokenSpaceGuid.PcdUartBase ## CONSUMES + gUefiOvmfPkgTokenSpaceGuid.PcdDebugIoPort ## CONSUMES [FeaturePcd] gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmStackGuard ## CONSUMES diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchExceptionHandler.c b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchExceptionHandler.c index 0d8edb6b81..7e61bb7e76 100644 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchExceptionHandler.c +++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchExceptionHandler.c @@ -236,12 +236,15 @@ ArchSetupExceptionStack ( Tss->RSP0 = StackTop; Tss->IOMapBaseAddress = sizeof (IA32_TASK_STATE_SEGMENT); // - // Allow access to gUartBase = 0x3F8 and Offsets: 0x01, 0x03, 0x04, 0x05, 0x06 + // Allow access to gUartBase = 0x3F8 and Offsets: 0x01, 0x03, 0x04, 0x05, 0x06; + // and DebugIoPort = 0x402. // IOBitMap = (UINT8 *)((UINTN)Tss + Tss->IOMapBaseAddress); for (Index = 0; Index < IO_BIT_MAP_SIZE; ++Index) { - if ((Index * 8) == 0x3F8) { + if ((Index * 8) == FixedPcdGet16 (PcdUartBase)) { *IOBitMap = 0x84; + } else if ((Index * 8) == (FixedPcdGet16 (PcdDebugIoPort) - 2)) { + *IOBitMap = 0xFB; } else { *IOBitMap = 0xFF; } diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchInterruptDefs.h b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchInterruptDefs.h index 21e469e358..7ae9ff7b0a 100644 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchInterruptDefs.h +++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchInterruptDefs.h @@ -38,10 +38,7 @@ typedef struct { } RESERVED_VECTORS_DATA; #define CPU_TSS_DESC_SIZE sizeof (IA32_TSS_DESCRIPTOR) -// -// 0x81 is needed to allow Ring3 code access to Uart in I/O Permission Bit Map. -// -#define IO_BIT_MAP_SIZE (ALIGN_VALUE (0x81, 16)) +#define IO_BIT_MAP_SIZE (ALIGN_VALUE (FixedPcdGet16 (PcdDebugIoPort) / 8 + 1, 16)) #define CPU_TSS_SIZE (sizeof (IA32_TASK_STATE_SEGMENT) + IO_BIT_MAP_SIZE) #endif