mirror of https://github.com/acidanthera/audk.git
QuarkPlatformPkg: Add Tpm12DeviceLib instance for Infineon I2C TPM
Add Tpm12DeviceLib instance for Infineon I2C TPM Cc: Kelly Steele <kelly.steele@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Kinney <michael.d.kinney@intel.com> Reviewed-by: Kelly Steele <kelly.steele@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19731 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
Michael Kinney
mdkinney
parent
df8652455e
commit
957649a77d
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/** @file
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Basic TIS (TPM Interface Specification) functions for Infineon I2C TPM.
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Copyright (c) 2013 - 2016, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#include <PiPei.h>
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#include <Library/Tpm12DeviceLib.h>
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#include <Library/BaseLib.h>
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#include <Library/TimerLib.h>
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#include <Library/DebugLib.h>
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#include <Library/I2cLib.h>
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//
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// Default TPM (Infineon SLB9645) I2C Slave Device Address on Crosshill board.
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//
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#define TPM_I2C_SLAVE_DEVICE_ADDRESS 0x20
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//
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// Default Infineon SLB9645 TPM I2C mapped registers (SLB9645 I2C Comm. Protocol Application Note).
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//
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#define INFINEON_TPM_ACCESS_0_ADDRESS_DEFAULT 0x0
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#define INFINEON_TPM_STS_0_ADDRESS_DEFAULT 0x01
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#define INFINEON_TPM_BURST0_COUNT_0_DEFAULT 0x02
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#define INFINEON_TPM_BURST1_COUNT_0_DEFAULT 0x03
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#define INFINEON_TPM_DATA_FIFO_0_ADDRESS_DEFAULT 0x05
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#define INFINEON_TPM_DID_VID_0_DEFAULT 0x09
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//
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// Max. retry count for read transfers (as recommended by Infineon).
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//
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#define READ_RETRY 3
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//
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// Guard time of 250us between I2C read and next I2C write transfer (as recommended by Infineon).
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//
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#define GUARD_TIME 250
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//
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// Define bits of ACCESS and STATUS registers
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//
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///
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/// This bit is a 1 to indicate that the other bits in this register are valid.
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///
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#define TIS_PC_VALID BIT7
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///
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/// Indicate that this locality is active.
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///
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#define TIS_PC_ACC_ACTIVE BIT5
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///
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/// Set to 1 to indicate that this locality had the TPM taken away while
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/// this locality had the TIS_PC_ACC_ACTIVE bit set.
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///
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#define TIS_PC_ACC_SEIZED BIT4
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///
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/// Set to 1 to indicate that TPM MUST reset the
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/// TIS_PC_ACC_ACTIVE bit and remove ownership for localities less than the
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/// locality that is writing this bit.
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///
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#define TIS_PC_ACC_SEIZE BIT3
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///
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/// When this bit is 1, another locality is requesting usage of the TPM.
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///
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#define TIS_PC_ACC_PENDIND BIT2
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///
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/// Set to 1 to indicate that this locality is requesting to use TPM.
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///
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#define TIS_PC_ACC_RQUUSE BIT1
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///
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/// A value of 1 indicates that a T/OS has not been established on the platform
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///
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#define TIS_PC_ACC_ESTABLISH BIT0
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///
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/// When this bit is 1, TPM is in the Ready state,
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/// indicating it is ready to receive a new command.
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///
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#define TIS_PC_STS_READY BIT6
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///
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/// Write a 1 to this bit to cause the TPM to execute that command.
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///
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#define TIS_PC_STS_GO BIT5
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///
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/// This bit indicates that the TPM has data available as a response.
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///
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#define TIS_PC_STS_DATA BIT4
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///
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/// The TPM sets this bit to a value of 1 when it expects another byte of data for a command.
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///
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#define TIS_PC_STS_EXPECT BIT3
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///
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/// Writes a 1 to this bit to force the TPM to re-send the response.
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///
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#define TIS_PC_STS_RETRY BIT1
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//
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// Default TimeOut values in microseconds
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//
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#define TIS_TIMEOUT_A (750 * 1000) // 750ms
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#define TIS_TIMEOUT_B (2000 * 1000) // 2s
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#define TIS_TIMEOUT_C (750 * 1000) // 750ms
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#define TIS_TIMEOUT_D (750 * 1000) // 750ms
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//
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// Global variable to indicate if TPM I2C Read Transfer has previously occurred.
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// NOTE: Given the GUARD_TIME requirement (TpmAccess.h), if this library loaded
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// by PEI Drivers this global variable required to be resident in R/W memory
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//
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BOOLEAN mI2CPrevReadTransfer = FALSE;
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/**
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Writes single byte data to TPM specified by I2C register address.
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@param[in] TpmAddress The register to write.
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@param[in] Data The data to write to the register.
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**/
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VOID
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TpmWriteByte (
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IN UINTN TpmAddress,
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IN UINT8 Data
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)
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{
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EFI_STATUS Status;
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UINTN WriteLength;
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UINT8 WriteData[2];
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EFI_I2C_DEVICE_ADDRESS I2CDeviceAddr;
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//
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// Setup I2C Slave device address and address mode (7-bit).
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//
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I2CDeviceAddr.I2CDeviceAddress = TPM_I2C_SLAVE_DEVICE_ADDRESS;
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//
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// As recommended by Infineon (SLB9645 I2C Communication protocol application
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// note revision 1.0) wait 250 microseconds between a read and a write transfer.
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//
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if (mI2CPrevReadTransfer) {
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MicroSecondDelay (GUARD_TIME);
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}
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//
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// Write to TPM register.
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//
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WriteLength = 2;
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WriteData[0] = (UINT8)TpmAddress;
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WriteData[1] = Data;
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Status = I2cWriteMultipleByte (
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I2CDeviceAddr,
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EfiI2CSevenBitAddrMode,
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&WriteLength,
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&WriteData
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);
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if (EFI_ERROR(Status)) {
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DEBUG ((EFI_D_ERROR, "TpmWriteByte(): I2C Write to TPM address %0x failed (%r)\n", TpmAddress, Status));
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ASSERT (FALSE); // Writes to TPM should always succeed.
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}
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mI2CPrevReadTransfer = FALSE;
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}
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/**
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Reads single byte data from TPM specified by I2C register address.
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Due to stability issues when using I2C combined write/read transfers (with
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RESTART) to TPM (specifically read from status register), a single write is
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performed followed by single read (with STOP condition in between).
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@param[in] TpmAddress Address of register to read.
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@return The value register read.
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**/
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UINT8
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TpmReadByte (
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IN UINTN TpmAddress
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)
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{
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UINT8 Data[1];
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UINT8 ReadData;
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UINT8 ReadCount;
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EFI_I2C_DEVICE_ADDRESS I2CDeviceAddr;
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EFI_I2C_ADDR_MODE I2CAddrMode;
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EFI_STATUS Status;
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Status = EFI_SUCCESS;
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ReadData = 0xFF;
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ReadCount = 0;
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//
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// Locate I2C protocol for TPM I2C access.
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//
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I2CDeviceAddr.I2CDeviceAddress = TPM_I2C_SLAVE_DEVICE_ADDRESS;
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I2CAddrMode = EfiI2CSevenBitAddrMode;
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//
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// As recommended by Infineon (SLB9645 I2C Communication protocol application
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// note revision 1.0) retry up to 3 times if TPM status, access or burst count
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// registers return 0xFF.
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//
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while ((ReadData == 0xFF) && (ReadCount < READ_RETRY)) {
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//
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// As recommended by Infineon (SLB9645 I2C Communication protocol application
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// note revision 1.0) wait 250 microseconds between a read and a write transfer.
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//
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if (mI2CPrevReadTransfer) {
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MicroSecondDelay (GUARD_TIME);
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}
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//
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// Write address to TPM.
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//
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Data[0] = (UINT8)TpmAddress;
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Status = I2cWriteByte (
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I2CDeviceAddr,
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I2CAddrMode,
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&Data
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);
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if (EFI_ERROR(Status)) {
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DEBUG ((EFI_D_INFO, "TpmReadByte(): write to TPM address %0x failed (%r)\n", TpmAddress, Status));
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}
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mI2CPrevReadTransfer = FALSE;
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//
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// Read data from TPM.
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//
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Data[0] = (UINT8)TpmAddress;
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Status = I2cReadByte (
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I2CDeviceAddr,
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I2CAddrMode,
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&Data
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);
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if (EFI_ERROR(Status)) {
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DEBUG ((EFI_D_INFO, "TpmReadByte(): read from TPM address %0x failed (%r)\n", TpmAddress, Status));
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ReadData = 0xFF;
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} else {
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ReadData = Data[0];
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}
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//
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// Only need to retry 3 times for TPM status, access, and burst count registers.
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// If read transfer is to TPM Data FIFO, do not retry, exit loop.
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//
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if (TpmAddress == INFINEON_TPM_DATA_FIFO_0_ADDRESS_DEFAULT) {
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ReadCount = READ_RETRY;
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} else {
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ReadCount++;
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}
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mI2CPrevReadTransfer = TRUE;
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}
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if (EFI_ERROR(Status)) {
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//
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// Only reads to access register allowed to fail.
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//
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if (TpmAddress != INFINEON_TPM_ACCESS_0_ADDRESS_DEFAULT) {
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DEBUG ((EFI_D_ERROR, "TpmReadByte(): read from TPM address %0x failed\n", TpmAddress));
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ASSERT_EFI_ERROR (Status);
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}
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}
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return ReadData;
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}
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/**
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Check whether the value of a TPM chip register satisfies the input BIT setting.
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@param[in] Register TPM register to be checked.
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@param[in] BitSet Check these data bits are set.
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@param[in] BitClear Check these data bits are clear.
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@param[in] TimeOut The max wait time (unit MicroSecond) when checking register.
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@retval EFI_SUCCESS The register satisfies the check bit.
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@retval EFI_TIMEOUT The register can't run into the expected status in time.
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**/
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EFI_STATUS
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TisPcWaitRegisterBits (
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IN UINTN Register,
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IN UINT8 BitSet,
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IN UINT8 BitClear,
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IN UINT32 TimeOut
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)
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{
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UINT8 RegRead;
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UINT32 WaitTime;
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for (WaitTime = 0; WaitTime < TimeOut; WaitTime += 30){
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RegRead = TpmReadByte (Register);
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if ((RegRead & BitSet) == BitSet && (RegRead & BitClear) == 0)
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return EFI_SUCCESS;
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MicroSecondDelay (30);
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}
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return EFI_TIMEOUT;
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}
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/**
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Get BurstCount by reading the burstCount field of a TIS register
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in the time of default TIS_TIMEOUT_D.
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@param[out] BurstCount Pointer to a buffer to store the got BurstConut.
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@retval EFI_SUCCESS Get BurstCount.
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@retval EFI_INVALID_PARAMETER BurstCount is NULL.
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@retval EFI_TIMEOUT BurstCount can't be got in time.
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**/
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EFI_STATUS
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TisPcReadBurstCount (
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OUT UINT16 *BurstCount
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)
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{
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UINT32 WaitTime;
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UINT8 DataByte0;
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UINT8 DataByte1;
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if (BurstCount == NULL) {
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return EFI_INVALID_PARAMETER;
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}
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WaitTime = 0;
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do {
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//
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// BurstCount is UINT16, but it is not 2bytes aligned,
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// so it needs to use TpmReadByte to read two times
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//
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DataByte0 = TpmReadByte (INFINEON_TPM_BURST0_COUNT_0_DEFAULT);
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DataByte1 = TpmReadByte (INFINEON_TPM_BURST1_COUNT_0_DEFAULT);
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*BurstCount = (UINT16)((DataByte1 << 8) + DataByte0);
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if (*BurstCount != 0) {
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return EFI_SUCCESS;
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}
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MicroSecondDelay (30);
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WaitTime += 30;
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} while (WaitTime < TIS_TIMEOUT_D);
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return EFI_TIMEOUT;
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}
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/**
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Set TPM chip to ready state by sending ready command TIS_PC_STS_READY
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to Status Register in time.
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@retval EFI_SUCCESS TPM chip enters into ready state.
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@retval EFI_TIMEOUT TPM chip can't be set to ready state in time.
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**/
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EFI_STATUS
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TisPcPrepareCommand (
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VOID
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)
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{
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EFI_STATUS Status;
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TpmWriteByte (INFINEON_TPM_STS_0_ADDRESS_DEFAULT, TIS_PC_STS_READY);
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Status = TisPcWaitRegisterBits (
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INFINEON_TPM_STS_0_ADDRESS_DEFAULT,
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TIS_PC_STS_READY,
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0,
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TIS_TIMEOUT_B
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);
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return Status;
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}
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/**
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This service requests use TPM12.
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|
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@retval EFI_SUCCESS Get the control of TPM12 chip.
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@retval EFI_NOT_FOUND TPM12 not found.
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@retval EFI_DEVICE_ERROR Unexpected device behavior.
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**/
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EFI_STATUS
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EFIAPI
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Tpm12RequestUseTpm (
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VOID
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)
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||||||
|
{
|
||||||
|
EFI_STATUS Status;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Check to see if TPM exists
|
||||||
|
//
|
||||||
|
if (TpmReadByte (INFINEON_TPM_ACCESS_0_ADDRESS_DEFAULT) == 0xFF) {
|
||||||
|
return EFI_NOT_FOUND;
|
||||||
|
}
|
||||||
|
|
||||||
|
TpmWriteByte (INFINEON_TPM_ACCESS_0_ADDRESS_DEFAULT, TIS_PC_ACC_RQUUSE);
|
||||||
|
|
||||||
|
//
|
||||||
|
// No locality set before, ACCESS_X.activeLocality MUST be valid within TIMEOUT_A
|
||||||
|
//
|
||||||
|
Status = TisPcWaitRegisterBits (
|
||||||
|
INFINEON_TPM_ACCESS_0_ADDRESS_DEFAULT,
|
||||||
|
(UINT8)(TIS_PC_ACC_ACTIVE |TIS_PC_VALID),
|
||||||
|
0,
|
||||||
|
TIS_TIMEOUT_A
|
||||||
|
);
|
||||||
|
return Status;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
Send command to TPM for execution.
|
||||||
|
|
||||||
|
@param[in] TpmBuffer Buffer for TPM command data.
|
||||||
|
@param[in] DataLength TPM command data length.
|
||||||
|
|
||||||
|
@retval EFI_SUCCESS Operation completed successfully.
|
||||||
|
@retval EFI_TIMEOUT The register can't run into the expected status in time.
|
||||||
|
|
||||||
|
**/
|
||||||
|
EFI_STATUS
|
||||||
|
TisPcSend (
|
||||||
|
IN UINT8 *TpmBuffer,
|
||||||
|
IN UINT32 DataLength
|
||||||
|
)
|
||||||
|
{
|
||||||
|
UINT16 BurstCount;
|
||||||
|
UINT32 Index;
|
||||||
|
EFI_STATUS Status;
|
||||||
|
|
||||||
|
Status = TisPcPrepareCommand ();
|
||||||
|
if (EFI_ERROR (Status)){
|
||||||
|
DEBUG ((DEBUG_ERROR, "The TPM is not ready!\n"));
|
||||||
|
goto Done;
|
||||||
|
}
|
||||||
|
Index = 0;
|
||||||
|
while (Index < DataLength) {
|
||||||
|
Status = TisPcReadBurstCount (&BurstCount);
|
||||||
|
if (EFI_ERROR (Status)) {
|
||||||
|
Status = EFI_TIMEOUT;
|
||||||
|
goto Done;
|
||||||
|
}
|
||||||
|
for (; BurstCount > 0 && Index < DataLength; BurstCount--) {
|
||||||
|
TpmWriteByte (INFINEON_TPM_DATA_FIFO_0_ADDRESS_DEFAULT, *(TpmBuffer + Index));
|
||||||
|
Index++;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
//
|
||||||
|
// Ensure the TPM status STS_EXPECT change from 1 to 0
|
||||||
|
//
|
||||||
|
Status = TisPcWaitRegisterBits (
|
||||||
|
INFINEON_TPM_STS_0_ADDRESS_DEFAULT,
|
||||||
|
(UINT8) TIS_PC_VALID,
|
||||||
|
TIS_PC_STS_EXPECT,
|
||||||
|
TIS_TIMEOUT_C
|
||||||
|
);
|
||||||
|
if (EFI_ERROR (Status)) {
|
||||||
|
goto Done;
|
||||||
|
}
|
||||||
|
|
||||||
|
//
|
||||||
|
// Start the command
|
||||||
|
//
|
||||||
|
TpmWriteByte (INFINEON_TPM_STS_0_ADDRESS_DEFAULT, TIS_PC_STS_GO);
|
||||||
|
|
||||||
|
Done:
|
||||||
|
if (EFI_ERROR (Status)) {
|
||||||
|
//
|
||||||
|
// Ensure the TPM state change from "Reception" to "Idle/Ready"
|
||||||
|
//
|
||||||
|
TpmWriteByte (INFINEON_TPM_STS_0_ADDRESS_DEFAULT, TIS_PC_STS_READY);
|
||||||
|
}
|
||||||
|
|
||||||
|
return Status;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
Receive response data of last command from TPM.
|
||||||
|
|
||||||
|
@param[out] TpmBuffer Buffer for response data.
|
||||||
|
@param[out] RespSize Response data length.
|
||||||
|
|
||||||
|
@retval EFI_SUCCESS Operation completed successfully.
|
||||||
|
@retval EFI_TIMEOUT The register can't run into the expected status in time.
|
||||||
|
@retval EFI_DEVICE_ERROR Unexpected device status.
|
||||||
|
@retval EFI_BUFFER_TOO_SMALL Response data is too long.
|
||||||
|
|
||||||
|
**/
|
||||||
|
EFI_STATUS
|
||||||
|
TisPcReceive (
|
||||||
|
OUT UINT8 *TpmBuffer,
|
||||||
|
OUT UINT32 *RespSize
|
||||||
|
)
|
||||||
|
{
|
||||||
|
EFI_STATUS Status;
|
||||||
|
UINT16 BurstCount;
|
||||||
|
UINT32 Index;
|
||||||
|
UINT32 ResponseSize;
|
||||||
|
TPM_RSP_COMMAND_HDR *ResponseHeader;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Wait for the command completion
|
||||||
|
//
|
||||||
|
Status = TisPcWaitRegisterBits (
|
||||||
|
INFINEON_TPM_STS_0_ADDRESS_DEFAULT,
|
||||||
|
(UINT8) (TIS_PC_VALID | TIS_PC_STS_DATA),
|
||||||
|
0,
|
||||||
|
TIS_TIMEOUT_B
|
||||||
|
);
|
||||||
|
if (EFI_ERROR (Status)) {
|
||||||
|
Status = EFI_TIMEOUT;
|
||||||
|
goto Done;
|
||||||
|
}
|
||||||
|
//
|
||||||
|
// Read the response data header and check it
|
||||||
|
//
|
||||||
|
Index = 0;
|
||||||
|
BurstCount = 0;
|
||||||
|
while (Index < sizeof (TPM_RSP_COMMAND_HDR)) {
|
||||||
|
Status = TisPcReadBurstCount (&BurstCount);
|
||||||
|
if (EFI_ERROR (Status)) {
|
||||||
|
Status = EFI_TIMEOUT;
|
||||||
|
goto Done;
|
||||||
|
}
|
||||||
|
for (; BurstCount > 0 ; BurstCount--) {
|
||||||
|
*(TpmBuffer + Index) = TpmReadByte (INFINEON_TPM_DATA_FIFO_0_ADDRESS_DEFAULT);
|
||||||
|
Index++;
|
||||||
|
if (Index == sizeof (TPM_RSP_COMMAND_HDR))
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
//
|
||||||
|
// Check the response data header (tag, parasize and returncode)
|
||||||
|
//
|
||||||
|
ResponseHeader = (TPM_RSP_COMMAND_HDR *)TpmBuffer;
|
||||||
|
if (SwapBytes16 (ReadUnaligned16 (&ResponseHeader->tag)) != TPM_TAG_RSP_COMMAND) {
|
||||||
|
Status = EFI_DEVICE_ERROR;
|
||||||
|
goto Done;
|
||||||
|
}
|
||||||
|
|
||||||
|
ResponseSize = SwapBytes32 (ReadUnaligned32 (&ResponseHeader->paramSize));
|
||||||
|
if (ResponseSize == sizeof (TPM_RSP_COMMAND_HDR)) {
|
||||||
|
Status = EFI_SUCCESS;
|
||||||
|
goto Done;
|
||||||
|
}
|
||||||
|
if (ResponseSize < sizeof (TPM_RSP_COMMAND_HDR)) {
|
||||||
|
Status = EFI_DEVICE_ERROR;
|
||||||
|
goto Done;
|
||||||
|
}
|
||||||
|
if (*RespSize < ResponseSize) {
|
||||||
|
Status = EFI_BUFFER_TOO_SMALL;
|
||||||
|
goto Done;
|
||||||
|
}
|
||||||
|
*RespSize = ResponseSize;
|
||||||
|
|
||||||
|
//
|
||||||
|
// Continue reading the remaining data
|
||||||
|
//
|
||||||
|
while (Index < ResponseSize) {
|
||||||
|
for (; BurstCount > 0 ; BurstCount--) {
|
||||||
|
*(TpmBuffer + Index) = TpmReadByte (INFINEON_TPM_DATA_FIFO_0_ADDRESS_DEFAULT);
|
||||||
|
Index++;
|
||||||
|
if (Index == ResponseSize) {
|
||||||
|
Status = EFI_SUCCESS;
|
||||||
|
goto Done;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
Status = TisPcReadBurstCount (&BurstCount);
|
||||||
|
if (EFI_ERROR (Status) && (Index < ResponseSize)) {
|
||||||
|
Status = EFI_DEVICE_ERROR;
|
||||||
|
goto Done;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
Done:
|
||||||
|
//
|
||||||
|
// Ensure the TPM state change from "Execution" or "Completion" to "Idle/Ready"
|
||||||
|
//
|
||||||
|
TpmWriteByte (INFINEON_TPM_STS_0_ADDRESS_DEFAULT, TIS_PC_STS_READY);
|
||||||
|
|
||||||
|
return Status;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
This service enables the sending of commands to the TPM12.
|
||||||
|
|
||||||
|
@param[in] InputParameterBlockSize Size of the TPM12 input parameter block.
|
||||||
|
@param[in] InputParameterBlock Pointer to the TPM12 input parameter block.
|
||||||
|
@param[in,out] OutputParameterBlockSize Size of the TPM12 output parameter block.
|
||||||
|
@param[in] OutputParameterBlock Pointer to the TPM12 output parameter block.
|
||||||
|
|
||||||
|
@retval EFI_SUCCESS The command byte stream was successfully sent to
|
||||||
|
the device and a response was successfully received.
|
||||||
|
@retval EFI_DEVICE_ERROR The command was not successfully sent to the
|
||||||
|
device or a response was not successfully received
|
||||||
|
from the device.
|
||||||
|
@retval EFI_BUFFER_TOO_SMALL The output parameter block is too small.
|
||||||
|
**/
|
||||||
|
EFI_STATUS
|
||||||
|
EFIAPI
|
||||||
|
Tpm12SubmitCommand (
|
||||||
|
IN UINT32 InputParameterBlockSize,
|
||||||
|
IN UINT8 *InputParameterBlock,
|
||||||
|
IN OUT UINT32 *OutputParameterBlockSize,
|
||||||
|
IN UINT8 *OutputParameterBlock
|
||||||
|
)
|
||||||
|
{
|
||||||
|
EFI_STATUS Status;
|
||||||
|
|
||||||
|
Status = TisPcSend (InputParameterBlock, InputParameterBlockSize);
|
||||||
|
if (!EFI_ERROR (Status)) {
|
||||||
|
Status = TisPcReceive (OutputParameterBlock, OutputParameterBlockSize);
|
||||||
|
}
|
||||||
|
return Status;
|
||||||
|
}
|
||||||
|
|
@ -0,0 +1,44 @@
|
||||||
|
## @file
|
||||||
|
# Provides some common functions for the TCG feature for Infineon I2C TPM.
|
||||||
|
#
|
||||||
|
# This instance provides basic TPM Interface Specification (TIS) functions
|
||||||
|
# for Infineon I2C TPM.
|
||||||
|
#
|
||||||
|
# Copyright (c) 2013 - 2016, Intel Corporation. All rights reserved.<BR>
|
||||||
|
# This program and the accompanying materials
|
||||||
|
# are licensed and made available under the terms and conditions of the BSD License
|
||||||
|
# which accompanies this distribution. The full text of the license may be found at
|
||||||
|
# http://opensource.org/licenses/bsd-license.php
|
||||||
|
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||||
|
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||||
|
#
|
||||||
|
##
|
||||||
|
|
||||||
|
[Defines]
|
||||||
|
INF_VERSION = 0x00010005
|
||||||
|
BASE_NAME = Tpm12DeviceLibInfineonI2c
|
||||||
|
MODULE_UNI_FILE = Tpm12DeviceLibInfineonI2c.uni
|
||||||
|
FILE_GUID = DBE37563-AFEF-4B41-BDCE-B01B6D1E8690
|
||||||
|
MODULE_TYPE = PEIM
|
||||||
|
VERSION_STRING = 1.0
|
||||||
|
LIBRARY_CLASS = Tpm12DeviceLib|PEIM DXE_DRIVER DXE_SMM_DRIVER UEFI_DRIVER
|
||||||
|
|
||||||
|
#
|
||||||
|
# The following information is for reference only and not required by the build tools.
|
||||||
|
#
|
||||||
|
# VALID_ARCHITECTURES = IA32 X64 IPF
|
||||||
|
#
|
||||||
|
|
||||||
|
[Sources]
|
||||||
|
TisPc.c
|
||||||
|
|
||||||
|
[Packages]
|
||||||
|
MdePkg/MdePkg.dec
|
||||||
|
SecurityPkg/SecurityPkg.dec
|
||||||
|
QuarkSocPkg/QuarkSocPkg.dec
|
||||||
|
|
||||||
|
[LibraryClasses]
|
||||||
|
BaseLib
|
||||||
|
TimerLib
|
||||||
|
DebugLib
|
||||||
|
I2cLib
|
||||||
|
|
@ -0,0 +1,21 @@
|
||||||
|
// /** @file
|
||||||
|
// Provides some common functions for the TCG feature for Infineon I2C TPM.
|
||||||
|
//
|
||||||
|
// This instance provides basic TPM Interface Specification (TIS) functions
|
||||||
|
// for Infineon I2C TPM.
|
||||||
|
//
|
||||||
|
// Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
|
||||||
|
//
|
||||||
|
// This program and the accompanying materials
|
||||||
|
// are licensed and made available under the terms and conditions of the BSD License
|
||||||
|
// which accompanies this distribution. The full text of the license may be found at
|
||||||
|
// http://opensource.org/licenses/bsd-license.php
|
||||||
|
// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||||
|
// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||||
|
//
|
||||||
|
// **/
|
||||||
|
|
||||||
|
#string STR_MODULE_ABSTRACT #language en-US "Provides some common functions for the TCG feature for Infineon I2C TPM"
|
||||||
|
|
||||||
|
#string STR_MODULE_DESCRIPTION #language en-US "This instance provides basic TPM Interface Specification (TIS) functions for Infineon I2C TPM."
|
||||||
|
|
||||||
Loading…
Reference in New Issue