Update PeiServicesTablePointerLib instance to add new API MigratePeiServicesTablePointer

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Gao, Liming <liming.gao@intel.com>
Reviewed-By: Andrew Fish <afish@apple.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15128 6f19259b-4bc3-4df7-8a09-765794883524

EmulatorPkg/Library/PeiCoreServicesTablePointerLib/PeiServicesTablePointer.c

@@ -88,4 +88,30 @@ PeiServicesTablePointerLibConstructor (
   return EFI_SUCCESS;
 }
 
+/**
+  Perform CPU specific actions required to migrate the PEI Services Table 
+  pointer from temporary RAM to permanent RAM.
+
+  For IA32 CPUs, the PEI Services Table pointer is stored in the 4 bytes 
+  immediately preceding the Interrupt Descriptor Table (IDT) in memory.
+  For X64 CPUs, the PEI Services Table pointer is stored in the 8 bytes 
+  immediately preceding the Interrupt Descriptor Table (IDT) in memory.
+  For Itanium and ARM CPUs, a the PEI Services Table Pointer is stored in
+  a dedicated CPU register.  This means that there is no memory storage 
+  associated with storing the PEI Services Table pointer, so no additional 
+  migration actions are required for Itanium or ARM CPUs.
+
+**/
+VOID
+EFIAPI
+MigratePeiServicesTablePointer (
+  VOID
+  )
+{
+  //
+  //  PEI Services Table pointer is cached in the global variable. No additional 
+  //  migration actions are required.
+  //
+  return;
+}
 

EmulatorPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointer.c

@@ -133,4 +133,30 @@ PeiServicesTablePointerLibConstructor (
   return Status;
 }
 
+/**
+  Perform CPU specific actions required to migrate the PEI Services Table 
+  pointer from temporary RAM to permanent RAM.
+
+  For IA32 CPUs, the PEI Services Table pointer is stored in the 4 bytes 
+  immediately preceding the Interrupt Descriptor Table (IDT) in memory.
+  For X64 CPUs, the PEI Services Table pointer is stored in the 8 bytes 
+  immediately preceding the Interrupt Descriptor Table (IDT) in memory.
+  For Itanium and ARM CPUs, a the PEI Services Table Pointer is stored in
+  a dedicated CPU register.  This means that there is no memory storage 
+  associated with storing the PEI Services Table pointer, so no additional 
+  migration actions are required for Itanium or ARM CPUs.
+
+**/
+VOID
+EFIAPI
+MigratePeiServicesTablePointer (
+  VOID
+  )
+{
+  //
+  //  PEI Services Table pointer is cached in the global variable. No additional 
+  //  migration actions are required.
+  //
+  return;
+}
 

EmulatorPkg/Library/PeiServicesTablePointerLibMagicPage/PeiServicesTablePointer.c

@@ -71,5 +71,31 @@ GetPeiServicesTablePointer (
   return PeiServicesTablePointer;
 }
 
+/**
+  Perform CPU specific actions required to migrate the PEI Services Table 
+  pointer from temporary RAM to permanent RAM.
+
+  For IA32 CPUs, the PEI Services Table pointer is stored in the 4 bytes 
+  immediately preceding the Interrupt Descriptor Table (IDT) in memory.
+  For X64 CPUs, the PEI Services Table pointer is stored in the 8 bytes 
+  immediately preceding the Interrupt Descriptor Table (IDT) in memory.
+  For Itanium and ARM CPUs, a the PEI Services Table Pointer is stored in
+  a dedicated CPU register.  This means that there is no memory storage 
+  associated with storing the PEI Services Table pointer, so no additional 
+  migration actions are required for Itanium or ARM CPUs.
+
+**/
+VOID
+EFIAPI
+MigratePeiServicesTablePointer (
+  VOID
+  )
+{
+  //
+  //  PEI Services Table pointer is cached in SRAM. No additional 
+  //  migration actions are required.
+  //
+  return;
+}