mirror of https://github.com/acidanthera/audk.git
UefiCpuPkg/CpuExceptionHandlerLib: Use single SEC/PEI version
Currently, we use the non-Xcode5 version of ExceptionHandlerAsm.nasm only for the SEC and PEI phases, and this version was not compatible with the XCODE or LLD linkers, which do not permit absolute relocations in read-only sections. Given that SEC and PEI code typically executes in place from flash and does not use page alignment for sections, we can simply emit the code carrying the absolute symbol references into the .data segment instead. This works around the linker's objections, and the resulting image will be mapped executable in its entirety anyway. Since this is only needed for XCODE, let's make this change conditionally using a preprocessor macro. Let's rename the .nasm file to reflect the fact that is used for the SecPei flavor of this library only, and while at it, remove some unnecessary absolute references. Also update the Xcode specific version of this library, and use this source file instead. This is necesessary, as the Xcode specific version modifies its own code at runtime, which is not permitted in SEC or PEI. Note that this also removes CET support from the Xcode5 specific build of the SEC/PEI version of this library, but this is not needed this early in any case, and this aligns it with other toolchains, which use this version of the library, which does not have CET support either. 1. Change for non-XCODE SecPeiCpuExceptionHandlerLib: . Use SecPeiExceptionHandlerAsm.nasm (renamed from ExceptionHandlerAsm.nasm) . Removed some unnecessary absolute references (32 IDT stubs are still in .text.) 2. Change for XCODE SecPeiCpuExceptionHandlerLib: . Use SecPeiExceptionHandlerAsm.nasm instead of Xcode5ExceptionHandlerAsm.nasm . CET logic is not in SecPeiExceptionHandlerAsm.nasm (but aligns to non-XCODE lib instance) . Fixed a bug that does runtime fixup in TEXT section in SPI flash. . Emitted the code carrying the absolute symbol references into the .data which XCODE or LLD linkers allow. . Then fixup can be done by other build tools such as GenFv if the code runs in SPI flash, or by PE coff loader if the code is loaded to memory. Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Ray Ni <ray.ni@intel.com>
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95f0330953
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@ -28,7 +28,7 @@
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Ia32/ArchInterruptDefs.h
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[Sources.X64]
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X64/ExceptionHandlerAsm.nasm
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X64/SecPeiExceptionHandlerAsm.nasm
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X64/ArchExceptionHandler.c
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X64/ArchInterruptDefs.h
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@ -58,3 +58,5 @@
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[FeaturePcd]
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gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmStackGuard ## CONSUMES
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[BuildOptions]
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XCODE:*_*_X64_NASM_FLAGS = -D NO_ABSOLUTE_RELOCS_IN_TEXT
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@ -27,7 +27,9 @@ extern ASM_PFX(CommonExceptionHandler)
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SECTION .data
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DEFAULT REL
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%ifndef NO_ABSOLUTE_RELOCS_IN_TEXT
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SECTION .text
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%endif
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ALIGN 8
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@ -51,6 +53,9 @@ HookAfterStubHeaderBegin:
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push rax
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mov rax, HookAfterStubHeaderEnd
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jmp rax
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SECTION .text
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HookAfterStubHeaderEnd:
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mov rax, rsp
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and sp, 0xfff0 ; make sure 16-byte aligned for exception context
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@ -276,8 +281,7 @@ DrFinish:
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; and make sure RSP is 16-byte aligned
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;
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sub rsp, 4 * 8 + 8
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mov rax, ASM_PFX(CommonExceptionHandler)
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call rax
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call ASM_PFX(CommonExceptionHandler)
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add rsp, 4 * 8 + 8
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cli
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@ -384,10 +388,10 @@ DoIret:
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; comments here for definition of address map
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global ASM_PFX(AsmGetTemplateAddressMap)
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ASM_PFX(AsmGetTemplateAddressMap):
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mov rax, AsmIdtVectorBegin
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lea rax, [AsmIdtVectorBegin]
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mov qword [rcx], rax
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mov qword [rcx + 0x8], (AsmIdtVectorEnd - AsmIdtVectorBegin) / 32
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mov rax, HookAfterStubHeaderBegin
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lea rax, [HookAfterStubHeaderBegin]
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mov qword [rcx + 0x10], rax
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ret
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@ -33,7 +33,7 @@
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Ia32/ArchInterruptDefs.h
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[Sources.X64]
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X64/Xcode5ExceptionHandlerAsm.nasm
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X64/SecPeiExceptionHandlerAsm.nasm
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X64/ArchExceptionHandler.c
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X64/ArchInterruptDefs.h
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@ -63,3 +63,5 @@
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[FeaturePcd]
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gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmStackGuard ## CONSUMES
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[BuildOptions]
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XCODE:*_*_X64_NASM_FLAGS = -D NO_ABSOLUTE_RELOCS_IN_TEXT
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