mirror of https://github.com/acidanthera/audk.git
MdeModulePkg: define PCD for DXE memory protection policy
Define a new fixed/patchable PCD that sets the DXE memory protection policy: its primary use is to define which memory types should have their executable permissions removed. Combined with the image protection policy, this can be used to implement a strict W^X policy, i.e.. a policy where no regions exist that are both executable and writable at the same time. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
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# @ValidRange 0x80000002 | 0x00000000 - 0x0000001F
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gEfiMdeModulePkgTokenSpaceGuid.PcdImageProtectionPolicy|0x00000002|UINT32|0x00001047
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## Set DXE memory protection policy. The policy is bitwise.
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# If a bit is set, memory regions of the associated type will be mapped
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# non-executable.<BR><BR>
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#
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# Below is bit mask for this PCD: (Order is same as UEFI spec)<BR>
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# EfiReservedMemoryType 0x0001<BR>
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# EfiLoaderCode 0x0002<BR>
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# EfiLoaderData 0x0004<BR>
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# EfiBootServicesCode 0x0008<BR>
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# EfiBootServicesData 0x0010<BR>
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# EfiRuntimeServicesCode 0x0020<BR>
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# EfiRuntimeServicesData 0x0040<BR>
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# EfiConventionalMemory 0x0080<BR>
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# EfiUnusableMemory 0x0100<BR>
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# EfiACPIReclaimMemory 0x0200<BR>
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# EfiACPIMemoryNVS 0x0400<BR>
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# EfiMemoryMappedIO 0x0800<BR>
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# EfiMemoryMappedIOPortSpace 0x1000<BR>
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# EfiPalCode 0x2000<BR>
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# EfiPersistentMemory 0x4000<BR>
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# OEM Reserved 0x4000000000000000<BR>
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# OS Reserved 0x8000000000000000<BR>
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#
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# NOTE: User must NOT set NX protection for EfiLoaderCode / EfiBootServicesCode / EfiRuntimeServicesCode. <BR>
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# User MUST set the same NX protection for EfiBootServicesData and EfiConventionalMemory. <BR>
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#
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# e.g. 0x7FD5 can be used for all memory except Code. <BR>
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# e.g. 0x7BD4 can be used for all memory except Code and ACPINVS/Reserved. <BR>
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#
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# @Prompt Set DXE memory protection policy.
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gEfiMdeModulePkgTokenSpaceGuid.PcdDxeNxMemoryProtectionPolicy|0x0000000|UINT64|0x00001048
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## PCI Serial Device Info. It is an array of Device, Function, and Power Management
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# information that describes the path that contains zero or more PCI to PCI briges
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# followed by a PCI serial device. Each array entry is 4-bytes in length. The
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