mirror of https://github.com/acidanthera/audk.git
Updated FspApiEntry.asm/.s to auto detect the size of the MCU region.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: "Yao, Jiewen" <jiewen.yao@intel.com> Reviewed-by: "Rangarajan, Ravi P" <ravi.p.rangarajan@intel.com> Reviewed-by: "Ma, Maurice" <maurice.ma@intel.com> Reviewed-by: "Mudusuru, Giri P" <giri.p.mudusuru@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16478 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
Yao, Jiewen
jyao1
parent
54190e8366
commit
975f1c6417
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@ -214,16 +214,21 @@ advance_fixed_size:
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check_address:
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; Is valid Microcode start point ?
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cmp dword ptr [esi], 0ffffffffh
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cmp dword ptr [esi].ucode_hdr.version, 0ffffffffh
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jz done
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; Is automatic size detection ?
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mov eax, [esp].LOAD_UCODE_PARAMS.ucode_code_size
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cmp eax, 0ffffffffh
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jz @f
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; Address >= microcode region address + microcode region size?
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mov eax, [esp].LOAD_UCODE_PARAMS.ucode_code_addr
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add eax, [esp].LOAD_UCODE_PARAMS.ucode_code_size
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add eax, [esp].LOAD_UCODE_PARAMS.ucode_code_addr
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cmp esi, eax
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jae done ;Jif address is outside of ucode region
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jmp check_main_header
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@@:
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load_check:
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; Get the revision of the current microcode update loaded
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mov ecx, MSR_IA32_BIOS_SIGN_ID
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@ -15,37 +15,166 @@
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#
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#------------------------------------------------------------------------------
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#.INCLUDE "UcodeLoad.inc"
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#.INCLUDE "UcodeLoadGcc.inc" - begin
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.equ MSR_IA32_PLATFORM_ID, 0x00000017
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.equ MSR_IA32_BIOS_UPDT_TRIG, 0x00000079
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.equ MSR_IA32_BIOS_SIGN_ID, 0x0000008b
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Ucode:
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.equ UcodeVersion, 0x0000
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.equ UcodeRevision, 0x0004
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.equ UcodeDate, 0x0008
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.equ UcodeProcessor, 0x000C
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.equ UcodeChecksum, 0x0010
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.equ UcodeLoader, 0x0014
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.equ UcodeRsvd, 0x0018
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UcodeEnd:
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UcodeHdr:
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.equ UcodeHdrVersion, 0x0000
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.equ UcodeHdrRevision, 0x0004
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.equ UcodeHdrDate, 0x0008
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.equ UcodeHdrProcessor, 0x000c
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.equ UcodeHdrChecksum, 0x0010
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.equ UcodeHdrLoader, 0x0014
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.equ UcodeHdrFlags, 0x0018
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.equ UcodeHdrDataSize, 0x001C
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.equ UcodeHdrTotalSize, 0x0020
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.equ UcodeHdrRsvd, 0x0024
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UcodeHdrEnd:
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.equ UcodeHdrLength, 0x0030 # UcodeHdrLength = UcodeHdrEnd - UcodeHdr
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ExtSigHdr:
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.equ ExtSigHdrCount, 0x0000
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.equ ExtSigHdrChecksum, 0x0004
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.equ rsvd, 0x0008
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ExtSigHdrEnd:
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.equ ExtSigHdrLength, 0x0014 #ExtSigHdrLength = ExtSigHdrEnd - ExtSigHdr
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ExtSig:
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.equ ExtSigProcessor, 0x0000
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.equ ExtSigFlags, 0x0004
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.equ ExtSigChecksum, 0x0008
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ExtSigEnd:
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.equ ExtSigLength, 0x000C #ExtSigLength = ExtSigEnd - ExtSig
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LoadUcodeParams:
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.equ LoadUcodeParamsUcodeCodeAddr, 0x0000
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.equ LoadUcodeParamsUcodeCodeSize, 0x0004
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LoadUcodeParamsEnd:
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#.INCLUDE "UcodeLoadGcc.inc" - end
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#.INCLUDE "SaveRestoreSseGcc.inc" - begin
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.macro SAVE_REGS
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pinsrw $0x00, %ebp, %xmm7
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ror $0x10, %ebp
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pinsrw $0x01, %ebp, %xmm7
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ror $0x10, %ebp
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#
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pinsrw $0x02, %ebx, %xmm7
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ror $0x10, %ebx
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pinsrw $0x03, %ebx, %xmm7
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ror $0x10, %ebx
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#
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pinsrw $0x04, %esi, %xmm7
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ror $0x10, %esi
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pinsrw $0x05, %esi, %xmm7
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ror $0x10, %esi
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#
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pinsrw $0x06, %edi, %xmm7
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ror $0x10, %edi
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pinsrw $0x07, %edi, %xmm7
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ror $0x10, %edi
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#
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pinsrw $0x00, %esp, %xmm6
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ror $0x10, %esp
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pinsrw $0x01, %esp, %xmm6
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ror $0x10, %esp
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.endm
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.macro LOAD_REGS
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pshufd $0xe4, %xmm7, %xmm7
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movd %xmm7, %ebp
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pshufd $0xe4, %xmm7, %xmm7
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#
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pshufd $0x39, %xmm7, %xmm7
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movd %xmm7, %ebx
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pshufd $0x93, %xmm7, %xmm7
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#
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pshufd $0x4e, %xmm7, %xmm7
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movd %xmm7, %esi
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pshufd $0x4e, %xmm7, %xmm7
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#
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pshufd $0x93, %xmm7, %xmm7
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movd %xmm7, %edi
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pshufd $0x39, %xmm7, %xmm7
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#
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movd %xmm6, %esp
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.endm
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.macro LOAD_EAX
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pshufd $0x39, %xmm6, %xmm6
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movd %xmm6, %eax
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pshufd $0x93, %xmm6, %xmm6
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.endm
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.macro LOAD_EDX
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pshufd $0xe4, %xmm6, %xmm6
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movd %xmm6, %edx
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pshufd $0xe4, %xmm6, %xmm6
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.endm
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.macro SAVE_EAX
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pinsrw $0x02, %eax, %xmm6
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ror $0x10, %eax
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pinsrw $0x03, %eax, %xmm6
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ror $0x10, %eax
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.endm
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.macro SAVE_EDX
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pinsrw $0x04, %edx, %xmm6
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ror $0x10, %edx
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pinsrw $0x05, %edx, %xmm6
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ror $0x10, %edx
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.endm
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.macro LOAD_ESP
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movd %xmm6, %esp
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.endm
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.macro ENABLE_SSE
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movl %cr4, %eax
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orl $0x00000600, %eax # Set OSFXSR bit (bit #9) & OSXMMEXCPT bit (bit #10)
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movl %eax,%cr4
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.endm
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#.INCLUDE "SaveRestoreSseGcc.inc" - end
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#
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# Following are fixed PCDs
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#
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.equ MSR_IA32_PLATFORM_ID, 0x000000017
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.equ MSR_IA32_BIOS_UPDT_TRIG, 0x000000079
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.equ MSR_IA32_BIOS_SIGN_ID, 0x00000008b
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ASM_GLOBAL ASM_PFX(_gPcd_FixedAtBuild_PcdTemporaryRamBase)
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ASM_GLOBAL ASM_PFX(_gPcd_FixedAtBuild_PcdTemporaryRamSize)
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ASM_GLOBAL ASM_PFX(_gPcd_FixedAtBuild_PcdFspTemporaryRamSize)
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ASM_GLOBAL ASM_PFX(_gPcd_FixedAtBuild_PcdFspAreaSize)
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#
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# Following functions will be provided in C
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#
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#EXTERNDEF SecStartup:PROC
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#EXTERNDEF FspApiCallingCheck:PROC
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ASM_GLOBAL ASM_PFX(FspImageSizeOffset)
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ASM_GLOBAL ASM_PFX(SecStartup)
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ASM_GLOBAL ASM_PFX(FspApiCallingCheck)
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#
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# Following functions will be provided in PlatformSecLib
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#
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#EXTERNDEF GetFspBaseAddress:PROC
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#EXTERNDEF GetBootFirmwareVolumeOffset:PROC
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#EXTERNDEF PlatformTempRamInit:PROC
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#EXTERNDEF Pei2LoaderSwitchStack:PROC
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#EXTERN FspSelfCheck(FspSelfCheckDflt):PROC
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#EXTERN PlatformBasicInit(PlatformBasicInitDflt):PROC
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ASM_GLOBAL ASM_PFX(GetBootFirmwareVolumeOffset)
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ASM_GLOBAL ASM_PFX(Pei2LoaderSwitchStack)
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#
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# Define the data length that we saved on the stack top
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@ -54,271 +183,270 @@ ASM_GLOBAL ASM_PFX(_gPcd_FixedAtBuild_PcdFspAreaSize)
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.equ DATA_LEN_OF_MCUD, 0x018
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.equ DATA_LEN_AT_STACK_TOP, (DATA_LEN_OF_PER0 + DATA_LEN_OF_MCUD + 4)
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#
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# Define SSE macros
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#
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.macro ENABLE_SSE
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movl %cr4, %eax
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orl $0x00000600,%eax # Set OSFXSR bit (bit #9) & OSXMMEXCPT bit (bit #10)
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movl %eax,%cr4
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.endm
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.macro SAVE_REGS
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movd %ebp, %xmm7
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pshufd $0x93, %xmm7, %xmm7
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movd %ebx, %xmm6
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por %xmm6, %xmm7
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pshufd $0x93, %xmm7, %xmm7
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movd %esi,%xmm6
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por %xmm6, %xmm7
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pshufd $0x93, %xmm7, %xmm7
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movd %edi, %xmm6
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por %xmm6, %xmm7
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movd %esp, %xmm6
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.endm
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.macro LOAD_REGS
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movd %xmm6, %esp
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movd %xmm7, %edi
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pshufd $0x39,%xmm7, %xmm7
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movd %xmm7, %esi
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pshufd $0x39,%xmm7, %xmm7
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movd %xmm7, %ebx
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pshufd $0x39, %xmm7, %xmm7
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movd %xmm7, %ebp
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.endm
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.macro LOAD_ESP
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movd %xmm6, %esp
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.endm
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#------------------------------------------------------------------------------
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# FspSelfCheckDflt
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# Inputs:
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# eax -> Return address
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# Outputs:
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# eax -> 0 - Successful, Non-zero - Failed.
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# Register Usage:
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# eax is cleared and ebp is used for return address.
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# All others reserved.
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#------------------------------------------------------------------------------
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ASM_GLOBAL ASM_PFX(FspSelfCheckDflt)
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ASM_PFX(FspSelfCheckDflt):
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# Inputs:
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# eax -> Return address
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# Outputs:
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# eax -> 0 - Successful, Non-zero - Failed.
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# Register Usage:
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# eax is cleared and ebp is used for return address.
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# All others reserved.
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#
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# Save return address to EBP
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#
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movl %eax, %ebp
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xorl %eax, %eax
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exit:
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jmp *%ebp
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#FspSelfCheckDflt ENDP
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FspSelfCheckDfltExit:
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jmp *%ebp
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#------------------------------------------------------------------------------
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# PlatformBasicInitDflt
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# Inputs:
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# eax -> Return address
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# Outputs:
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# eax -> 0 - Successful, Non-zero - Failed.
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# Register Usage:
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# eax is cleared and ebp is used for return address.
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# All others reserved.
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#------------------------------------------------------------------------------
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ASM_GLOBAL ASM_PFX(PlatformBasicInitDflt)
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ASM_PFX(PlatformBasicInitDflt):
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# Inputs:
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# eax -> Return address
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# Outputs:
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# eax -> 0 - Successful, Non-zero - Failed.
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# Register Usage:
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# eax is cleared and ebp is used for return address.
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# All others reserved.
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#
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# Save return address to EBP
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#
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movl %eax, %ebp
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xorl %eax, %eax
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exit2:
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jmp *%ebp
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#PlatformBasicInitDflt ENDP
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PlatformBasicInitDfltExit:
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jmp *%ebp
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#------------------------------------------------------------------------------
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# LoadUcode
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#
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# Inputs:
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# esp -> LOAD_UCODE_PARAMS pointer
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# Register Usage:
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# esp Preserved
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# All others destroyed
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# Assumptions:
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# No memory available, stack is hard-coded and used for return address
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# Executed by SBSP and NBSP
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# Beginning of microcode update region starts on paragraph boundary
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#------------------------------------------------------------------------------
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ASM_GLOBAL ASM_PFX(LoadUcode)
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ASM_PFX(LoadUcode):
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# Inputs:
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# esp -> LOAD_UCODE_PARAMS pointer
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# Register Usage:
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# esp Preserved
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# All others destroyed
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# Assumptions:
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# No memory available, stack is hard-coded and used for return address
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# Executed by SBSP and NBSP
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# Beginning of microcode update region starts on paragraph boundary
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#
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#
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# Save return address to EBP
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#
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movl %eax, %ebp
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cmpl $0, %esp
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jz paramerror
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cmpl $0x00, %esp
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jz ParamError
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movl (%esp), %eax #dword ptr [] Parameter pointer
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cmpl $0, %eax
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jz paramerror
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cmpl $0x00, %eax
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jz ParamError
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movl %eax, %esp
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movl (%esp), %esi #LOAD_UCODE_PARAMS.ucode_code_addr
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cmpl $0, %esi
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jnz L0
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movl LoadUcodeParamsUcodeCodeAddr(%esp), %esi #mov esi, [esp].LOAD_UCODE_PARAMS.ucode_code_addr
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cmpl $0x00, %esi
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jnz CheckMainHeader
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paramerror:
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ParamError:
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movl $0x080000002, %eax
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jmp exit4
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jmp LoadUcodeExit
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movl (%esp), %esi #.LOAD_UCODE_PARAMS.ucode_code_addr
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check_main_header:
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CheckMainHeader:
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#
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# Get processor signature and platform ID from the installed processor
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# and save into registers for later use
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# ebx = processor signature
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# edx = platform ID
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movl $1, %eax
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#
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movl $0x01, %eax
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cpuid
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movl %eax, %ebx
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movl MSR_IA32_PLATFORM_ID, %ecx
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movl $MSR_IA32_PLATFORM_ID, %ecx
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rdmsr
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movl %edx, %ecx
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#--------------------------------------------------------------------------------------------------------------------
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shrl $18, %ecx #($50-$32)
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andl $0x7, %ecx
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movl $1, %edx
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shrl $0x12, %ecx #($50-$32)
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andl $0x07, %ecx
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movl $0x01, %edx
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shll %cl,%edx
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#
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# Current register usage
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# esp -> stack with paramters
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# esi -> microcode update to check
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# ebx = processor signature
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# edx = platform ID
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#
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#
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# Check for valid microcode header
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# Minimal test checking for header version and loader version as 1
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movl $1, %eax
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cmpl %eax, (%esi) #.ucode_hdr.version
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jne advance_fixed_size
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cmpl %eax, 0x18(%esi) #.ucode_hdr.loader
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jne advance_fixed_size
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#
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movl $0x01, %eax
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cmpl %eax, UcodeHdrVersion(%esi) #cmp [esi].ucode_hdr.version, eax
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jne AdvanceFixedSize
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cmpl %eax, UcodeHdrLoader(%esi) #cmp [esi].ucode_hdr.loader, eax
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jne AdvanceFixedSize
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#
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# Check if signature and plaform ID match
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#--------------------------------------------------------------------------------------------------------------------------
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cmpl 0x10(%esi), %ebx #(%esi).ucode_hdr.processor
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jne L0
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testl 0x1c(%esi) , %edx #(%esi).ucode_hdr.flags
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jnz load_check # Jif signature and platform ID match
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#
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cmpl UcodeHdrProcessor(%esi), %ebx #cmp ebx, [esi].ucode_hdr.processor
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jne LoadUcodeL0
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testl UcodeHdrFlags(%esi), %edx #test edx, [esi].ucode_hdr.flags
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jnz LoadCheck #Jif signature and platform ID match
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L0:
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LoadUcodeL0:
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#
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# Check if extended header exists
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# First check if total_size and data_size are valid
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#
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xorl %eax, %eax
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cmpl %eax,0x24(%esi) #(%esi).ucode_hdr.total_size
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je next_microcode
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cmpl %eax,0x20(%esi) #(%esi) .ucode_hdr.data_size
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je next_microcode
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cmpl %eax, UcodeHdrTotalSize(%esi) #cmp [esi].ucode_hdr.total_size, eax
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je NextMicrocode
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cmpl %eax, UcodeHdrDataSize(%esi) #cmp [esi].ucode_hdr.data_size, eax
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je NextMicrocode
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#
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# Then verify total size - sizeof header > data size
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movl 0x24(%esi), %ecx #(%esi).ucode_hdr.total_size
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subl $0x30, %ecx #sizeof ucode_hdr = 48
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cmpl 0x20(%esi), %ecx #(%esi).ucode_hdr.data_size
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jz load_check
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jb next_microcode # Jif extended header does not exist
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# Check if total size fits in microcode region
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movl %esi , %edi
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addl 0x24(%esi), %edi # (%esi).ucode_hdr.total_size
|
||||
movl (%esp), %ecx # (%esp).LOAD_UCODE_PARAMS.ucode_code_addr
|
||||
addl 4(%esp), %ecx #.LOAD_UCODE_PARAMS.ucode_code_size
|
||||
cmpl %ecx , %edi
|
||||
xorl %eax, %eax
|
||||
ja exit4 # Jif address is outside of ucode region
|
||||
#
|
||||
movl UcodeHdrTotalSize(%esi), %ecx #mov ecx, [esi].ucode_hdr.total_size
|
||||
subl $UcodeHdrLength, %ecx #sub ecx, sizeof ucode_hdr
|
||||
cmpl UcodeHdrDataSize(%esi), %ecx #cmp ecx, [esi].ucode_hdr.data_size
|
||||
jle NextMicrocode
|
||||
|
||||
#
|
||||
# Set edi -> extended header
|
||||
movl %esi , %edi
|
||||
addl $0x30 , %edi #sizeof ucode_hdr = 48
|
||||
addl 0x20(%esi), %edi #%esi.ucode_hdr.data_size
|
||||
#
|
||||
movl %esi, %edi
|
||||
addl $UcodeHdrLength, %edi #add edi, sizeof ucode_hdr
|
||||
addl UcodeHdrDataSize(%esi), %edi #add edi, [esi].ucode_hdr.data_size
|
||||
|
||||
#
|
||||
# Get count of extended structures
|
||||
movl (%edi), %ecx #(%edi).ext_sig_hdr.count
|
||||
#
|
||||
movl ExtSigHdrCount(%edi), %ecx #mov ecx, [edi].ext_sig_hdr.count
|
||||
|
||||
#
|
||||
# Move pointer to first signature structure
|
||||
addl $0x20, %edi # sizeof ext_sig_hdr = 20
|
||||
#
|
||||
addl ExtSigHdrLength, %edi #add edi, sizeof ext_sig_hdr
|
||||
|
||||
check_ext_sig:
|
||||
CheckExtSig:
|
||||
#
|
||||
# Check if extended signature and platform ID match
|
||||
cmpl %ebx, (%edi) #[edi].ext_sig.processor
|
||||
jne L1
|
||||
test %edx, 4(%edi) #[edi].ext_sig.flags
|
||||
jnz load_check # Jif signature and platform ID match
|
||||
L9:
|
||||
#
|
||||
cmpl %ebx, ExtSigProcessor(%edi) #cmp [edi].ext_sig.processor, ebx
|
||||
jne LoadUcodeL1
|
||||
test %edx, ExtSigFlags(%edi) #test [edi].ext_sig.flags, edx
|
||||
jnz LoadCheck # Jif signature and platform ID match
|
||||
LoadUcodeL1:
|
||||
#
|
||||
# Check if any more extended signatures exist
|
||||
addl $0xc, %edi #sizeof ext_sig = 12
|
||||
loop check_ext_sig
|
||||
#
|
||||
addl $ExtSigLength, %edi #add edi, sizeof ext_sig
|
||||
loop CheckExtSig
|
||||
|
||||
next_microcode:
|
||||
NextMicrocode:
|
||||
#
|
||||
# Advance just after end of this microcode
|
||||
#
|
||||
xorl %eax, %eax
|
||||
cmpl %eax, 0x24(%esi) #(%esi).ucode_hdr.total_size
|
||||
je L2
|
||||
add 0x24(%esi) , %esi #(%esi).ucode_hdr.total_size
|
||||
jmp check_address
|
||||
L10:
|
||||
addl $0x800, %esi
|
||||
jmp check_address
|
||||
cmpl %eax, UcodeHdrTotalSize(%esi) #cmp [esi].ucode_hdr.total_size, eax
|
||||
je LoadUcodeL2
|
||||
addl UcodeHdrTotalSize(%esi), %esi #add esi, [esi].ucode_hdr.total_size
|
||||
jmp CheckAddress
|
||||
LoadUcodeL2:
|
||||
addl $0x800, %esi #add esi, dword ptr 2048
|
||||
jmp CheckAddress
|
||||
|
||||
advance_fixed_size:
|
||||
AdvanceFixedSize:
|
||||
#
|
||||
# Advance by 4X dwords
|
||||
addl $0x400, %esi
|
||||
#
|
||||
addl $0x400, %esi #add esi, dword ptr 1024
|
||||
|
||||
check_address:
|
||||
CheckAddress:
|
||||
#
|
||||
# Is valid Microcode start point ?
|
||||
cmp $0x0ffffffff , %esi
|
||||
jz done
|
||||
#
|
||||
cmpl $0x0ffffffff, UcodeHdrVersion(%esi)
|
||||
|
||||
#
|
||||
# Is automatic size detection ?
|
||||
#
|
||||
movl LoadUcodeParamsUcodeCodeSize(%esp), %eax
|
||||
cmpl $0x0ffffffff, %eax
|
||||
jz LoadUcodeL3
|
||||
#
|
||||
# Address >= microcode region address + microcode region size?
|
||||
movl (%esp), %eax #(%esp).LOAD_UCODE_PARAMS.ucode_code_addr
|
||||
addl 4(%esp), %eax #(%esp).LOAD_UCODE_PARAMS.ucode_code_size
|
||||
cmpl %eax, %esi
|
||||
jae done #Jif address is outside of ucode region
|
||||
jmp check_main_header
|
||||
#
|
||||
addl LoadUcodeParamsUcodeCodeAddr(%esp), %eax #mov eax, [esp].LOAD_UCODE_PARAMS.ucode_code_addr
|
||||
|
||||
load_check:
|
||||
cmpl %eax, %esi
|
||||
jae Done #Jif address is outside of ucode region
|
||||
jmp CheckMainHeader
|
||||
|
||||
LoadUcodeL3:
|
||||
LoadCheck:
|
||||
#
|
||||
# Get the revision of the current microcode update loaded
|
||||
movl MSR_IA32_BIOS_SIGN_ID, %ecx
|
||||
#
|
||||
movl $MSR_IA32_BIOS_SIGN_ID, %ecx
|
||||
xorl %eax, %eax # Clear EAX
|
||||
xorl %edx, %edx # Clear EDX
|
||||
wrmsr # Load 0 to MSR at 8Bh
|
||||
|
||||
movl $1, %eax
|
||||
movl $0x01, %eax
|
||||
cpuid
|
||||
movl MSR_IA32_BIOS_SIGN_ID, %ecx
|
||||
movl $MSR_IA32_BIOS_SIGN_ID, %ecx
|
||||
rdmsr # Get current microcode signature
|
||||
|
||||
#
|
||||
# Verify this microcode update is not already loaded
|
||||
cmpl %edx, 4(%esi) #(%esi).ucode_hdr.revision
|
||||
je continue
|
||||
#
|
||||
cmpl %edx, UcodeHdrRevision(%esi) #cmp [esi].ucode_hdr.revision, edx
|
||||
je Continue
|
||||
|
||||
load_microcode:
|
||||
LoadMicrocode:
|
||||
#
|
||||
# EAX contains the linear address of the start of the Update Data
|
||||
# EDX contains zero
|
||||
# ECX contains 79h (IA32_BIOS_UPDT_TRIG)
|
||||
# Start microcode load with wrmsr
|
||||
mov %esi, %eax
|
||||
add $0x30, %eax #sizeof ucode_hdr = 48
|
||||
#
|
||||
movl %esi, %eax
|
||||
addl $UcodeHdrLength, %eax #add eax, sizeof ucode_hdr
|
||||
xorl %edx, %edx
|
||||
mov MSR_IA32_BIOS_UPDT_TRIG,%ecx
|
||||
movl $MSR_IA32_BIOS_UPDT_TRIG, %ecx
|
||||
wrmsr
|
||||
mov $1, %eax
|
||||
movl $0x01, %eax
|
||||
cpuid
|
||||
|
||||
continue:
|
||||
jmp next_microcode
|
||||
Continue:
|
||||
jmp NextMicrocode
|
||||
|
||||
done:
|
||||
mov $1, %eax
|
||||
Done:
|
||||
movl $0x01, %eax
|
||||
cpuid
|
||||
mov MSR_IA32_BIOS_SIGN_ID, %ecx
|
||||
movl $MSR_IA32_BIOS_SIGN_ID, %ecx
|
||||
rdmsr # Get current microcode signature
|
||||
xorl %eax, %eax
|
||||
cmp $0 , %edx
|
||||
jnz exit4
|
||||
mov $0x08000000E, %eax
|
||||
cmpl $0x00, %edx
|
||||
jnz LoadUcodeExit
|
||||
movl $0x08000000E, %eax
|
||||
|
||||
exit4:
|
||||
LoadUcodeExit:
|
||||
jmp *%ebp
|
||||
|
||||
#LoadUcode ENDP
|
||||
|
||||
#----------------------------------------------------------------------------
|
||||
# TempRamInit API
|
||||
|
|
@ -344,47 +472,56 @@ ASM_PFX(TempRamInitApi):
|
|||
# Save timestamp into XMM4 & XMM5
|
||||
#
|
||||
rdtsc
|
||||
movd %edx, %xmm4
|
||||
movd %eax, %xmm5
|
||||
SAVE_EAX
|
||||
SAVE_EDX
|
||||
|
||||
#
|
||||
# Check Parameter
|
||||
#
|
||||
movl 4(%esp), %eax
|
||||
cmpl $0x00, %eax
|
||||
movl $0x80000002, %eax
|
||||
jz NemInitExit
|
||||
|
||||
#
|
||||
# CPUID/DeviceID check
|
||||
#
|
||||
movl L11, %eax
|
||||
jmp ASM_PFX(FspSelfCheck) # Note: ESP can not be changed.
|
||||
L11:
|
||||
cmpl $0, %eax
|
||||
movl $TempRamInitApiL0, %eax
|
||||
jmp ASM_PFX(FspSelfCheckDflt) # Note: ESP can not be changed.
|
||||
TempRamInitApiL0:
|
||||
cmpl $0x00, %eax
|
||||
jnz NemInitExit
|
||||
|
||||
#
|
||||
# Platform Basic Init.
|
||||
#
|
||||
movl L1, %eax
|
||||
movl $TempRamInitApiL1, %eax
|
||||
jmp ASM_PFX(PlatformBasicInitDflt)
|
||||
L1:
|
||||
cmp $0, %eax
|
||||
TempRamInitApiL1:
|
||||
cmpl $0x00, %eax
|
||||
jnz NemInitExit
|
||||
|
||||
#
|
||||
# Load microcode
|
||||
#
|
||||
movl L2, %eax
|
||||
addl $4, %esp
|
||||
movl $TempRamInitApiL2, %eax
|
||||
addl $0x04, %esp
|
||||
jmp LoadUcode
|
||||
L2:
|
||||
|
||||
TempRamInitApiL2:
|
||||
LOAD_ESP
|
||||
cmpl $0, %eax
|
||||
cmpl $0x00, %eax
|
||||
jnz NemInitExit
|
||||
|
||||
#
|
||||
# Call platform NEM init
|
||||
#-------------------------------------------------------------------------------------------------------------------------
|
||||
movl L3, %eax
|
||||
addl $4, %esp
|
||||
#
|
||||
movl $TempRamInitApiL3, %eax
|
||||
addl $0x04, %esp
|
||||
jmp ASM_PFX(PlatformTempRamInit)
|
||||
L3:
|
||||
subl $4, %esp
|
||||
cmpl $0, %eax
|
||||
TempRamInitApiL3:
|
||||
subl $0x04, %esp
|
||||
cmpl $0x00, %eax
|
||||
jnz NemInitExit
|
||||
|
||||
#
|
||||
|
|
@ -399,37 +536,29 @@ L3:
|
|||
addl ASM_PFX(_gPcd_FixedAtBuild_PcdTemporaryRamSize), %esp
|
||||
|
||||
pushl $DATA_LEN_OF_MCUD # Size of the data region
|
||||
pushl 0x4455434D # Signature of the data region 'MCUD'
|
||||
pushl 12(%edx) # Code size
|
||||
pushl 8(%edx) # Code base
|
||||
cmpl $0, %edx # Is parameter pointer valid ?
|
||||
jz InvalidMicrocodeRegion
|
||||
pushl $0x4455434D # Signature of the data region 'MCUD'
|
||||
pushl 4(%edx) # Microcode size
|
||||
pushl (%edx) # Microcode base
|
||||
jmp L4
|
||||
pushl 12(%edx) # Code size
|
||||
pushl 8(%edx) # Code base
|
||||
|
||||
InvalidMicrocodeRegion:
|
||||
pushl $0 # Microcode size
|
||||
pushl $0 # Microcode base
|
||||
|
||||
L4:
|
||||
#
|
||||
# Save API entry/exit timestamp into stack
|
||||
#
|
||||
pushl DATA_LEN_OF_PER0 # Size of the data region
|
||||
pushl 0x30524550 # Signature of the data region 'PER0'
|
||||
movd %xmm4, %eax
|
||||
pushl %eax
|
||||
movd %xmm5, %eax
|
||||
pushl %eax
|
||||
pushl $DATA_LEN_OF_PER0 # Size of the data region
|
||||
pushl $0x30524550 # Signature of the data region 'PER0'
|
||||
rdtsc
|
||||
pushl %edx
|
||||
pushl %eax
|
||||
LOAD_EAX
|
||||
LOAD_EDX
|
||||
pushl %edx
|
||||
pushl %eax
|
||||
|
||||
#
|
||||
# Terminator for the data on stack
|
||||
#
|
||||
pushl $0
|
||||
pushl $0x00
|
||||
|
||||
#
|
||||
# Set ECX/EDX to the bootloader temporary memory range
|
||||
|
|
@ -447,7 +576,7 @@ NemInitExit:
|
|||
#
|
||||
LOAD_REGS
|
||||
ret
|
||||
#TempRamInitApi ENDP
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------
|
||||
# FspInit API
|
||||
|
|
@ -463,48 +592,43 @@ ASM_PFX(FspInitApi):
|
|||
# Stack must be ready
|
||||
#
|
||||
pushl $0x087654321
|
||||
pop %eax
|
||||
popl %eax
|
||||
cmpl $0x087654321, %eax
|
||||
jz L5
|
||||
jz FspInitApiL0
|
||||
movl $0x080000003, %eax
|
||||
jmp exit3
|
||||
jmp FspInitApiexit
|
||||
|
||||
L5:
|
||||
FspInitApiL0:
|
||||
#
|
||||
# Additional check
|
||||
#
|
||||
pusha
|
||||
pushl $1
|
||||
pushl $0x01
|
||||
call ASM_PFX(FspApiCallingCheck)
|
||||
addl $4, %esp
|
||||
addl $0x04, %esp
|
||||
movl %eax, 28(%esp)
|
||||
popa
|
||||
cmpl $0 , %eax
|
||||
jz L6
|
||||
jmp exit3
|
||||
|
||||
L6:
|
||||
#
|
||||
# Save the Platform Data Pointer in EDI
|
||||
#
|
||||
movl 4(%esp), %edi
|
||||
cmpl $0x00, %eax
|
||||
jz FspInitApiL1
|
||||
jmp FspInitApiexit
|
||||
|
||||
FspInitApiL1:
|
||||
#
|
||||
# Store the address in FSP which will return control to the BL
|
||||
#
|
||||
pushl $exit3
|
||||
pushl $FspInitApiexit
|
||||
|
||||
#
|
||||
# Create a Task Frame in the stack for the Boot Loader
|
||||
#
|
||||
pushfl
|
||||
pushfl # 2 pushf for 4 byte alignment
|
||||
cli
|
||||
pushal
|
||||
|
||||
#
|
||||
# Reserve 8 bytes for IDT save/restore
|
||||
pushl $0
|
||||
pushl $0
|
||||
#
|
||||
subl $0x08, %esp
|
||||
sidt (%esp)
|
||||
|
||||
#
|
||||
|
|
@ -512,11 +636,9 @@ L6:
|
|||
#
|
||||
movl %esp, %eax
|
||||
movl ASM_PFX(_gPcd_FixedAtBuild_PcdTemporaryRamBase), %esp
|
||||
addl ASM_PFX(_gPcd_FixedAtBuild_PcdTemporaryRamSize) , %esp
|
||||
subl DATA_LEN_AT_STACK_TOP, %esp
|
||||
addl $0x0FFFFFFC0, %esp
|
||||
addl ASM_PFX(_gPcd_FixedAtBuild_PcdTemporaryRamSize), %esp
|
||||
subl $(DATA_LEN_AT_STACK_TOP + 0x40), %esp
|
||||
|
||||
#
|
||||
# Save the bootloader's stack pointer
|
||||
#
|
||||
pushl %eax
|
||||
|
|
@ -525,10 +647,11 @@ L6:
|
|||
# Pass entry point of the PEI core
|
||||
#
|
||||
call ASM_PFX(GetFspBaseAddress)
|
||||
movl %eax, %edi
|
||||
addl ASM_PFX(_gPcd_FixedAtBuild_PcdFspAreaSize), %edi
|
||||
movl ASM_PFX(FspImageSizeOffset), %edi
|
||||
movl (%eax, %edi), %edi
|
||||
addl %eax, %edi
|
||||
subl $0x20, %edi
|
||||
addl %ds:(%edi), %eax
|
||||
addl (%edi), %eax
|
||||
pushl %eax
|
||||
|
||||
#
|
||||
|
|
@ -558,10 +681,9 @@ L6:
|
|||
#
|
||||
call ASM_PFX(SecStartup)
|
||||
|
||||
exit3:
|
||||
FspInitApiexit:
|
||||
ret
|
||||
|
||||
# FspInitApi ENDP
|
||||
|
||||
#----------------------------------------------------------------------------
|
||||
# NotifyPhase API
|
||||
|
|
@ -576,36 +698,35 @@ ASM_PFX(NotifyPhaseApi):
|
|||
# Stack must be ready
|
||||
#
|
||||
pushl $0x0087654321
|
||||
pop %eax
|
||||
popl %eax
|
||||
cmpl $0x087654321, %eax
|
||||
jz L7
|
||||
jz NotifyPhaseApiL0
|
||||
movl $0x080000003, %eax
|
||||
jmp err_exit
|
||||
jmp NotifyPhaseApiErrExit
|
||||
|
||||
L7:
|
||||
NotifyPhaseApiL0:
|
||||
#
|
||||
# Verify the calling condition
|
||||
#
|
||||
pusha
|
||||
pushl $2
|
||||
pushl $0x02
|
||||
call ASM_PFX(FspApiCallingCheck)
|
||||
add $4, %esp
|
||||
mov %eax, 28(%esp)
|
||||
addl $0x04, %esp
|
||||
movl %eax, 28(%esp)
|
||||
popa
|
||||
|
||||
cmpl $0, %eax
|
||||
jz L8
|
||||
cmpl $0x00, %eax
|
||||
jz NotifyPhaseApiL1
|
||||
|
||||
#
|
||||
# Error return
|
||||
#
|
||||
err_exit:
|
||||
NotifyPhaseApiErrExit:
|
||||
ret
|
||||
|
||||
L8:
|
||||
NotifyPhaseApiL1:
|
||||
jmp ASM_PFX(Pei2LoaderSwitchStack)
|
||||
|
||||
#NotifyPhaseApi ENDP
|
||||
|
||||
|
||||
#END
|
||||
|
|
|
|||
Loading…
Reference in New Issue