mirror of https://github.com/acidanthera/audk.git
Vlv2TbltDevicePkg:Change flash layout to fix the Fv space is not enough.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: lushifex <shifeix.a.lu@intel.com> Reviewed-by: David Wei <david.wei@intel.com>
This commit is contained in:
parent
5e7520843d
commit
988715a3a7
|
@ -26,35 +26,35 @@ DEFINE FLASH_REGION_VLVMICROCODE_OFFSET = 0x00000000
|
|||
DEFINE FLASH_REGION_VLVMICROCODE_SIZE = 0x00040000
|
||||
DEFINE FLASH_REGION_VLVMICROCODE_BASE = 0xFFC00000
|
||||
|
||||
DEFINE FLASH_REGION_VPD_OFFSET = 0x00130000
|
||||
DEFINE FLASH_REGION_VPD_OFFSET = 0x00040000
|
||||
DEFINE FLASH_REGION_VPD_SIZE = 0x0003E000
|
||||
|
||||
DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_OFFSET = 0x0016E000
|
||||
DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_OFFSET = 0x0007E000
|
||||
DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_SIZE = 0x00002000
|
||||
|
||||
|
||||
DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_OFFSET = 0x00170000
|
||||
DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_OFFSET = 0x00080000
|
||||
DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_SIZE = 0x00040000
|
||||
|
||||
!if $(MINNOW2_FSP_BUILD) == TRUE
|
||||
DEFINE FLASH_REGION_FSPBIN_OFFSET = 0x001B0000
|
||||
DEFINE FLASH_REGION_FSPBIN_OFFSET = 0x000C0000
|
||||
DEFINE FLASH_REGION_FSPBIN_SIZE = 0x00048000
|
||||
DEFINE FLASH_REGION_FSPBIN_BASE = 0xFFDB0000
|
||||
DEFINE FLASH_REGION_FSPBIN_BASE = 0xFFCC0000
|
||||
|
||||
DEFINE FLASH_REGION_AZALIABIN_OFFSET = 0x001F8000
|
||||
DEFINE FLASH_REGION_AZALIABIN_OFFSET = 0x00108000
|
||||
DEFINE FLASH_REGION_AZALIABIN_SIZE = 0x00008000
|
||||
DEFINE FLASH_REGION_AZALIABIN_BASE = 0xFFDF8000
|
||||
DEFINE FLASH_REGION_AZALIABIN_BASE = 0xFFD08000
|
||||
|
||||
!endif
|
||||
|
||||
DEFINE FLASH_REGION_FVMAIN_OFFSET = 0x00200000
|
||||
DEFINE FLASH_REGION_FVMAIN_SIZE = 0x001A5000
|
||||
DEFINE FLASH_REGION_FVMAIN_OFFSET = 0x00110000
|
||||
DEFINE FLASH_REGION_FVMAIN_SIZE = 0x00210000
|
||||
|
||||
DEFINE FLASH_REGION_FV_RECOVERY2_OFFSET = 0x003A5000
|
||||
DEFINE FLASH_REGION_FV_RECOVERY2_SIZE = 0x0002B000
|
||||
DEFINE FLASH_REGION_FV_RECOVERY2_OFFSET = 0x00320000
|
||||
DEFINE FLASH_REGION_FV_RECOVERY2_SIZE = 0x00070000
|
||||
|
||||
DEFINE FLASH_REGION_FV_RECOVERY_OFFSET = 0x003D0000
|
||||
DEFINE FLASH_REGION_FV_RECOVERY_SIZE = 0x00030000
|
||||
DEFINE FLASH_REGION_FV_RECOVERY_OFFSET = 0x00390000
|
||||
DEFINE FLASH_REGION_FV_RECOVERY_SIZE = 0x00070000
|
||||
|
||||
################################################################################
|
||||
#
|
||||
|
|
|
@ -26,35 +26,35 @@ DEFINE FLASH_REGION_VLVMICROCODE_OFFSET = 0x00000000
|
|||
DEFINE FLASH_REGION_VLVMICROCODE_SIZE = 0x00040000
|
||||
DEFINE FLASH_REGION_VLVMICROCODE_BASE = 0xFFC00000
|
||||
|
||||
DEFINE FLASH_REGION_VPD_OFFSET = 0x00130000
|
||||
DEFINE FLASH_REGION_VPD_OFFSET = 0x00040000
|
||||
DEFINE FLASH_REGION_VPD_SIZE = 0x0003E000
|
||||
|
||||
DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_OFFSET = 0x0016E000
|
||||
DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_OFFSET = 0x0007E000
|
||||
DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_SIZE = 0x00002000
|
||||
|
||||
|
||||
DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_OFFSET = 0x00170000
|
||||
DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_OFFSET = 0x00080000
|
||||
DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_SIZE = 0x00040000
|
||||
|
||||
!if $(MINNOW2_FSP_BUILD) == TRUE
|
||||
DEFINE FLASH_REGION_FSPBIN_OFFSET = 0x001B0000
|
||||
DEFINE FLASH_REGION_FSPBIN_OFFSET = 0x000C0000
|
||||
DEFINE FLASH_REGION_FSPBIN_SIZE = 0x00048000
|
||||
DEFINE FLASH_REGION_FSPBIN_BASE = 0xFFDB0000
|
||||
DEFINE FLASH_REGION_FSPBIN_BASE = 0xFFCC0000
|
||||
|
||||
DEFINE FLASH_REGION_AZALIABIN_OFFSET = 0x001F8000
|
||||
DEFINE FLASH_REGION_AZALIABIN_OFFSET = 0x00108000
|
||||
DEFINE FLASH_REGION_AZALIABIN_SIZE = 0x00008000
|
||||
DEFINE FLASH_REGION_AZALIABIN_BASE = 0xFFDF8000
|
||||
DEFINE FLASH_REGION_AZALIABIN_BASE = 0xFFD08000
|
||||
|
||||
!endif
|
||||
|
||||
DEFINE FLASH_REGION_FVMAIN_OFFSET = 0x00200000
|
||||
DEFINE FLASH_REGION_FVMAIN_SIZE = 0x00196000
|
||||
DEFINE FLASH_REGION_FVMAIN_OFFSET = 0x00110000
|
||||
DEFINE FLASH_REGION_FVMAIN_SIZE = 0x00215000
|
||||
|
||||
DEFINE FLASH_REGION_FV_RECOVERY2_OFFSET = 0x00396000
|
||||
DEFINE FLASH_REGION_FV_RECOVERY2_SIZE = 0x0002C000
|
||||
DEFINE FLASH_REGION_FV_RECOVERY2_OFFSET = 0x00325000
|
||||
DEFINE FLASH_REGION_FV_RECOVERY2_SIZE = 0x0006B000
|
||||
|
||||
DEFINE FLASH_REGION_FV_RECOVERY_OFFSET = 0x003C2000
|
||||
DEFINE FLASH_REGION_FV_RECOVERY_SIZE = 0x0003E000
|
||||
DEFINE FLASH_REGION_FV_RECOVERY_OFFSET = 0x00390000
|
||||
DEFINE FLASH_REGION_FV_RECOVERY_SIZE = 0x00070000
|
||||
|
||||
################################################################################
|
||||
#
|
||||
|
|
|
@ -614,7 +614,7 @@
|
|||
# $(FLASH_AREA_SIZE)
|
||||
gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheSize|0x00800000
|
||||
# $(FLASH_REGION_FSPBIN_BASE)
|
||||
gFspWrapperTokenSpaceGuid.PcdFlashFvFspBase|0xFFDB0000
|
||||
gFspWrapperTokenSpaceGuid.PcdFlashFvFspBase|0xFFCC0000
|
||||
!endif
|
||||
|
||||
!if $(PERFORMANCE_ENABLE) == TRUE
|
||||
|
|
|
@ -614,7 +614,7 @@
|
|||
# $(FLASH_AREA_SIZE)
|
||||
gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheSize|0x00800000
|
||||
# $(FLASH_REGION_FSPBIN_BASE)
|
||||
gFspWrapperTokenSpaceGuid.PcdFlashFvFspBase|0xFFDB0000
|
||||
gFspWrapperTokenSpaceGuid.PcdFlashFvFspBase|0xFFCC0000
|
||||
!endif
|
||||
|
||||
!if $(PERFORMANCE_ENABLE) == TRUE
|
||||
|
|
|
@ -614,7 +614,7 @@
|
|||
# $(FLASH_AREA_SIZE)
|
||||
gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheSize|0x00800000
|
||||
# $(FLASH_REGION_FSPBIN_BASE)
|
||||
gFspWrapperTokenSpaceGuid.PcdFlashFvFspBase|0xFFDB0000
|
||||
gFspWrapperTokenSpaceGuid.PcdFlashFvFspBase|0xFFCC0000
|
||||
!endif
|
||||
|
||||
!if $(PERFORMANCE_ENABLE) == TRUE
|
||||
|
|
Loading…
Reference in New Issue