Introduce UefiCpuLib library class in UefiCpuPkg and add one instance of BaseUefiCpuLib. The major purpose of this library class / instance is to provide some routines that are generic for IA32 family CPU

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@9480 6f19259b-4bc3-4df7-8a09-765794883524

UefiCpuPkg/Include/Library/UefiCpuLib.h

@@ -0,0 +1,38 @@
+/** @file
+  Public header file for UEFI CPU library class.
+
+  This library class defines some routines that are generic for IA32 family CPU
+  to be UEFI specification compliant.
+
+  Copyright (c) 2009, Intel Corporation
+  All rights reserved. This program and the accompanying materials
+  are licensed and made available under the terms and conditions of the BSD License
+  which accompanies this distribution.  The full text of the license may be found at
+  http://opensource.org/licenses/bsd-license.php
+
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef __UEFI_CPU_LIB_H__
+#define __UEFI_CPU_LIB_H__
+
+
+
+/**
+  Initializes floating point units for requirement of UEFI specification.
+
+  This function initializes floating-point control word to 0x027F (all exceptions
+  masked,double-precision, round-to-nearest) and multimedia-extensions control word
+  (if supported) to 0x1F80 (all exceptions masked, round-to-nearest, flush to zero
+  for masked underflow).
+
+**/
+VOID
+EFIAPI
+InitializeFloatingPointUnits (
+  VOID
+  );
+
+#endif

UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.inf

@@ -0,0 +1,44 @@
+#/** @file
+#  This library defines some routines that are generic for IA32 family CPU
+#  to be UEFI specification compliant.
+#
+#  Copyright (c) 2009, Intel Corporation. <BR>
+#  All rights reserved. This program and the accompanying materials
+#  are licensed and made available under the terms and conditions of the BSD License
+#  which accompanies this distribution.  The full text of the license may be found at
+#  http://opensource.org/licenses/bsd-license.php
+#  
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#  
+#**/
+
+[Defines]
+  INF_VERSION                    = 0x00010005
+  BASE_NAME                      = BaseUefiCpuLib
+  FILE_GUID                      = 34C24FD7-7A90-45c2-89FD-946473D9CE98
+  MODULE_TYPE                    = BASE
+  VERSION_STRING                 = 1.0
+  LIBRARY_CLASS                  = UefiCpuLib 
+
+#
+# The following information is for reference only and not required by the build tools.
+#
+#  VALID_ARCHITECTURES           = IA32 X64
+#
+
+[Sources.IA32]
+  Ia32/InitializeFpu.asm
+  Ia32/InitializeFpu.S
+
+[Sources.X64]
+  X64/InitializeFpu.asm
+  X64/InitializeFpu.S
+
+[Packages]
+  MdePkg/MdePkg.dec
+  UefiCpuPkg/UefiCpuPkg.dec
+
+[LibraryClasses]
+  UefiCpuLib
+

UefiCpuPkg/Library/BaseUefiCpuLib/Ia32/InitializeFpu.S

@@ -0,0 +1,70 @@
+#------------------------------------------------------------------------------
+#*
+#*   Copyright 2009, Intel Corporation
+#*   All rights reserved. This program and the accompanying materials
+#*   are licensed and made available under the terms and conditions of the BSD License
+#*   which accompanies this distribution.  The full text of the license may be found at
+#*   http://opensource.org/licenses/bsd-license.php
+#*
+#*   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+#*   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#*
+#*
+#------------------------------------------------------------------------------
+
+
+
+#
+# Float control word initial value: 
+# all exceptions masked, double-precision, round-to-nearest
+#
+ASM_PFX(mFpuControlWord): .word     0x027F
+#
+# Multimedia-extensions control word:
+# all exceptions masked, round-to-nearest, flush to zero for masked underflow
+#
+ASM_PFX(mMmxControlWord): .long     0x01F80
+
+#
+# Initializes floating point units for requirement of UEFI specification.
+#
+# This function initializes floating-point control word to 0x027F (all exceptions
+# masked,double-precision, round-to-nearest) and multimedia-extensions control word
+# (if supported) to 0x1F80 (all exceptions masked, round-to-nearest, flush to zero
+# for masked underflow).
+#
+ASM_GLOBAL ASM_PFX(InitializeFloatingPointUnits)
+ASM_PFX(InitializeFloatingPointUnits):
+    #
+    # Initialize floating point units
+    #
+    finit
+    fldcw   ASM_PFX(mFpuControlWord)
+    
+    #
+    # Use CpuId instructuion (CPUID.01H:EDX.SSE[bit 25] = 1) to test
+    # whether the processor supports SSE instruction.
+    #
+    movl    $1,  %eax
+    cpuid
+    btl     $25, %edx
+    jnc     Done
+    
+    #
+    # Set OSFXSR bit 9 in CR4
+    #
+    movl    %cr4, %eax 
+    or      $200, %eax
+    movl    %eax, %cr4
+    
+    #
+    # The processor should support SSE instruction and we can use
+    # ldmxcsr instruction
+    #
+    ldmxcsr ASM_PFX(mMmxControlWord)
+
+Done:
+    ret
+
+#END
+

UefiCpuPkg/Library/BaseUefiCpuLib/Ia32/InitializeFpu.asm

@@ -0,0 +1,75 @@
+;------------------------------------------------------------------------------
+;*
+;*   Copyright 2009, Intel Corporation
+;*   All rights reserved. This program and the accompanying materials
+;*   are licensed and made available under the terms and conditions of the BSD License
+;*   which accompanies this distribution.  The full text of the license may be found at
+;*   http://opensource.org/licenses/bsd-license.php
+;*
+;*   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+;*   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;*
+;*    
+;------------------------------------------------------------------------------
+
+
+    .686
+    .model  flat,C
+    .const
+;
+; Float control word initial value: 
+; all exceptions masked, double-precision, round-to-nearest
+;
+mFpuControlWord       DW      027Fh
+;
+; Multimedia-extensions control word:
+; all exceptions masked, round-to-nearest, flush to zero for masked underflow
+;
+mMmxControlWord       DD      01F80h 
+
+    .xmm
+    .code
+
+;
+; Initializes floating point units for requirement of UEFI specification.
+;
+; This function initializes floating-point control word to 0x027F (all exceptions
+; masked,double-precision, round-to-nearest) and multimedia-extensions control word
+; (if supported) to 0x1F80 (all exceptions masked, round-to-nearest, flush to zero
+; for masked underflow).
+;
+InitializeFloatingPointUnits PROC PUBLIC
+    ;
+    ; Initialize floating point units
+    ;
+    finit
+    fldcw   mFpuControlWord
+    
+    ;
+    ; Use CpuId instructuion (CPUID.01H:EDX.SSE[bit 25] = 1) to test
+    ; whether the processor supports SSE instruction.
+    ;
+    mov     eax, 1
+    cpuid
+    bt      edx, 25
+    jnc     Done
+    
+    ;
+    ; Set OSFXSR bit 9 in CR4
+    ;
+    mov     eax, cr4
+    or      eax, BIT9
+    mov     cr4, eax
+    
+    ;
+    ; The processor should support SSE instruction and we can use
+    ; ldmxcsr instruction
+    ;
+    ldmxcsr mMmxControlWord
+Done:
+
+    ret
+
+InitializeFloatingPointUnits ENDP
+
+END

UefiCpuPkg/Library/BaseUefiCpuLib/X64/InitializeFpu.S

@@ -0,0 +1,54 @@
+#------------------------------------------------------------------------------
+#*
+#*   Copyright 2009, Intel Corporation
+#*   All rights reserved. This program and the accompanying materials
+#*   are licensed and made available under the terms and conditions of the BSD License
+#*   which accompanies this distribution.  The full text of the license may be found at
+#*   http://opensource.org/licenses/bsd-license.php
+#*
+#*   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+#*   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#*
+#*
+#------------------------------------------------------------------------------
+
+
+#
+# Float control word initial value: 
+# all exceptions masked, double-precision, round-to-nearest
+#
+ASM_PFX(mFpuControlWord): .word     0x027F
+#
+# Multimedia-extensions control word:
+# all exceptions masked, round-to-nearest, flush to zero for masked underflow
+#
+ASM_PFX(mMmxControlWord): .long     0x01F80
+
+#
+# Initializes floating point units for requirement of UEFI specification.
+#
+# This function initializes floating-point control word to 0x027F (all exceptions
+# masked,double-precision, round-to-nearest) and multimedia-extensions control word
+# (if supported) to 0x1F80 (all exceptions masked, round-to-nearest, flush to zero
+# for masked underflow).
+#
+ASM_GLOBAL ASM_PFX(InitializeFloatingPointUnits)
+ASM_PFX(InitializeFloatingPointUnits):
+
+    #
+    # Initialize floating point units
+    #
+    finit
+    fldcw   ASM_PFX(mFpuControlWord)
+    
+    #
+    # Set OSFXSR bit 9 in CR4
+    #
+    movq    %cr4, %rax 
+    or      $200, %rax
+    movq    %rax, %cr4
+    
+    ldmxcsr ASM_PFX(mMmxControlWord)
+    
+    ret
+

UefiCpuPkg/Library/BaseUefiCpuLib/X64/InitializeFpu.asm

@@ -0,0 +1,59 @@
+;------------------------------------------------------------------------------
+;*
+;*   Copyright 2009, Intel Corporation
+;*   All rights reserved. This program and the accompanying materials
+;*   are licensed and made available under the terms and conditions of the BSD License
+;*   which accompanies this distribution.  The full text of the license may be found at
+;*   http://opensource.org/licenses/bsd-license.php
+;*
+;*   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+;*   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;*
+;*
+;------------------------------------------------------------------------------
+
+
+.const
+;
+; Float control word initial value: 
+; all exceptions masked, double-precision, round-to-nearest
+;
+mFpuControlWord       DW      027Fh
+;
+; Multimedia-extensions control word:
+; all exceptions masked, round-to-nearest, flush to zero for masked underflow
+;
+mMmxControlWord       DD      01F80h 
+
+.code
+
+
+;
+; Initializes floating point units for requirement of UEFI specification.
+;
+; This function initializes floating-point control word to 0x027F (all exceptions
+; masked,double-precision, round-to-nearest) and multimedia-extensions control word
+; (if supported) to 0x1F80 (all exceptions masked, round-to-nearest, flush to zero
+; for masked underflow).
+;
+InitializeFloatingPointUnits PROC PUBLIC
+
+    ;
+    ; Initialize floating point units
+    ;
+    finit
+    fldcw   mFpuControlWord
+    
+    ;
+    ; Set OSFXSR bit 9 in CR4
+    ;
+    mov     rax, cr4
+    or      rax, BIT9
+    mov     cr4, rax
+
+    ldmxcsr mMmxControlWord
+    
+    ret
+InitializeFloatingPointUnits ENDP
+
+END

UefiCpuPkg/UefiCpuPkg.dec

@@ -24,3 +24,8 @@
 [Includes.common]
   Include
 
+[LibraryClasses]
+  ##  @libraryclass  Defines some routines that are generic for IA32 family CPU
+  ##                 to be UEFI specification compliant.
+  ##
+  UefiCpuLib|Include/Library/UefiCpuLib.h

UefiCpuPkg/UefiCpuPkg.dsc

@@ -50,4 +50,4 @@
 
 [Components.common]
   UefiCpuPkg/CpuIoDxe/CpuIo.inf
-
+  UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.inf