mirror of https://github.com/acidanthera/audk.git
Pass X64 GCC building
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@7741 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
klu2
parent
b0e441b554
commit
99032c4556
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@ -45,7 +45,8 @@
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[Sources.X64]
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X64/CpuInterrupt.asm | INTEL
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X64/CpuInterrupt.asm | MSFT
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X64/CpuInterrupt.S |GCC
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[Sources.common]
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Cpu.c
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CpuDxe.h
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@ -0,0 +1,866 @@
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#------------------------------------------------------------------------------
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#*
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#* Copyright 2006, Intel Corporation
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#* All rights reserved. This program and the accompanying materials
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#* are licensed and made available under the terms and conditions of the BSD License
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#* which accompanies this distribution. The full text of the license may be found at
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#* http://opensource.org/licenses/bsd-license.php
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#*
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#* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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#* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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#*
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#* CpuInterrupt.S
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#*
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#* Abstract:
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#*
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#------------------------------------------------------------------------------
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#PUBLIC SystemTimerHandler
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#PUBLIC SystemExceptionHandler
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#EXTERNDEF mExceptionCodeSize:DWORD
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#EXTERN TimerHandler: NEAR
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#EXTERN ExceptionHandler: NEAR
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#EXTERN mTimerVector: DWORD
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.data
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.globl ASM_PFX(mExceptionCodeSize)
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ASM_PFX(mExceptionCodeSize): .long 9
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.text
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.globl ASM_PFX(InitDescriptor)
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ASM_PFX(InitDescriptor):
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movq $GDT_BASE,%rax # EAX=PHYSICAL address of gdt
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movq %rax, gdtr + 2 # Put address of gdt into the gdtr
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lgdt gdtr
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movq $0x18, %rax
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movq %rax, %gs
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movq %rax, %fs
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movq $IDT_BASE,%rax # EAX=PHYSICAL address of idt
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movq %rax, idtr + 2 # Put address of idt into the idtr
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lidt idtr
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ret
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# VOID
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# InstallInterruptHandler (
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# UINTN Vector,
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# VOID (*Handler)(VOID)
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# )
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.globl ASM_PFX(InstallInterruptHandler)
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ASM_PFX(InstallInterruptHandler):
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# Vector:DWORD @ 4(%esp)
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# Handler:DWORD @ 8(%esp)
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push %rbx
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pushfq # save eflags
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cli # turn off interrupts
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subq $0x10, %rsp # open some space on the stack
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movq %rsp, %rbx
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sidt (%rbx) # get fword address of IDT
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movq 2(%rbx), %rbx # move offset of IDT into RBX
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addq $0x10, %rsp # correct stack
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movq %rcx, %rax # Get vector number
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shlq $4, %rax # multiply by 16 to get offset
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addq %rax, %rbx # add to IDT base to get entry
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movq %rdx, %rax # load new address into IDT entry
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movw %ax, (%rbx) # write bits 15..0 of offset
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shrq $16, %rax # use ax to copy 31..16 to descriptors
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movw %ax, 6(%rbx) # write bits 31..16 of offset
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shrq $16, %rax # use eax to copy 63..32 to descriptors
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movl %eax, 8(%rbx) # write bits 63..32 of offset
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popfq # restore flags (possible enabling interrupts)
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pop %rbx
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ret
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.macro JmpCommonIdtEntry
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# jmp commonIdtEntry - this must be hand coded to keep the assembler from
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# using a 8 bit reletive jump when the entries are
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# within 255 bytes of the common entry. This must
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# be done to maintain the consistency of the size
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# of entry points...
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.byte 0xe9 # jmp 16 bit reletive
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.long commonIdtEntry - . - 4 # offset to jump to
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.endm
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.align 2
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.globl ASM_PFX(SystemExceptionHandler)
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ASM_PFX(SystemExceptionHandler):
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INT0:
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push $0x0 # push error code place holder on the stack
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push $0x0
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JmpCommonIdtEntry
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# db 0e9h # jmp 16 bit reletive
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# dd commonIdtEntry - $ - 4 # offset to jump to
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INT1:
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push $0x0 # push error code place holder on the stack
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push $0x1
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JmpCommonIdtEntry
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INT2:
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push $0x0 # push error code place holder on the stack
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push $0x2
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JmpCommonIdtEntry
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INT3:
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push $0x0 # push error code place holder on the stack
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push $0x3
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JmpCommonIdtEntry
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INT4:
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push $0x0 # push error code place holder on the stack
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push $0x4
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JmpCommonIdtEntry
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INT5:
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push $0x0 # push error code place holder on the stack
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push $0x5
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JmpCommonIdtEntry
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INT6:
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push $0x0 # push error code place holder on the stack
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push $0x6
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JmpCommonIdtEntry
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INT7:
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push $0x0 # push error code place holder on the stack
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push $0x7
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JmpCommonIdtEntry
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INT8:
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# Double fault causes an error code to be pushed so no phony push necessary
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nop
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nop
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push $0x8
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JmpCommonIdtEntry
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INT9:
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push $0x0 # push error code place holder on the stack
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push $0x9
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JmpCommonIdtEntry
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INT10:
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# Invalid TSS causes an error code to be pushed so no phony push necessary
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nop
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nop
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push $10
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JmpCommonIdtEntry
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INT11:
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# Segment Not Present causes an error code to be pushed so no phony push necessary
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nop
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nop
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push $11
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JmpCommonIdtEntry
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INT12:
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# Stack fault causes an error code to be pushed so no phony push necessary
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nop
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nop
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push $12
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JmpCommonIdtEntry
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INT13:
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# GP fault causes an error code to be pushed so no phony push necessary
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nop
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nop
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push $13
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JmpCommonIdtEntry
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INT14:
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# Page fault causes an error code to be pushed so no phony push necessary
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nop
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nop
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push $14
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JmpCommonIdtEntry
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INT15:
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push $0x0 # push error code place holder on the stack
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push $15
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JmpCommonIdtEntry
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INT16:
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push $0x0 # push error code place holder on the stack
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push $16
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JmpCommonIdtEntry
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INT17:
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# Alignment check causes an error code to be pushed so no phony push necessary
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nop
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nop
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push $17
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JmpCommonIdtEntry
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INT18:
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push $0x0 # push error code place holder on the stack
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push $18
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JmpCommonIdtEntry
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INT19:
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push $0x0 # push error code place holder on the stack
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push $19
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JmpCommonIdtEntry
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INTUnknown:
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.rept (32 - 20)
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push $0x0 # push error code place holder on the stack
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# push xxh # push vector number
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.byte 0x6a
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.byte ( . - INTUnknown - 3 ) / 9 + 20 # vector number
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JmpCommonIdtEntry
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.endr
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.globl ASM_PFX(SystemTimerHandler)
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ASM_PFX(SystemTimerHandler):
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push $0
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push $ASM_PFX(mTimerVector)
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JmpCommonIdtEntry
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commonIdtEntry:
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# +---------------------+
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# + EFlags +
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# +---------------------+
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# + CS +
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# +---------------------+
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# + EIP +
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# +---------------------+
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# + Error Code +
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# +---------------------+
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# + Vector Number +
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# +---------------------+
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# + EBP +
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# +---------------------+ <-- EBP
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cli
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push %rbp
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movq %rsp,%rbp
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#
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# Since here the stack pointer is 16-byte aligned, so
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# EFI_FX_SAVE_STATE_X64 of EFI_SYSTEM_CONTEXT_x64
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# is 16-byte aligned
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#
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## UINT64 Rdi, Rsi, Rbp, Rsp, Rbx, Rdx, Rcx, Rax#
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## UINT64 R8, R9, R10, R11, R12, R13, R14, R15#
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push %r15
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push %r14
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push %r13
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push %r12
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push %r11
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push %r10
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push %r9
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push %r8
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push %rax
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push %rcx
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push %rdx
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push %rbx
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push 6*8(%rbp)
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push (%rbp)
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push %rsi
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push %rdi
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## UINT64 Gs, Fs, Es, Ds, Cs, Ss# insure high 16 bits of each is zero
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movzx 7*8(%rbp), %rax
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push %rax # for ss
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movzx 4*8(%rbp), %rax
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push %rax # for cs
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movq %ds, %rax
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push %rax
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movq %es, %rax
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push %rax
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movq %fs, %rax
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push %rax
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movq %gs, %rax
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push %rax
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## UINT64 Rip#
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push 3*8(%rbp)
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## UINT64 Gdtr[2], Idtr[2]#
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subq $16, %rsp
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sidt (%rsp)
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subq $16, %rsp
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sgdt (%rsp)
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## UINT64 Ldtr, Tr#
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xorq %rax, %rax
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str %ax
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push %rax
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sldt %ax
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push %rax
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## UINT64 RFlags#
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push 5*8(%rbp)
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## UINT64 Cr0, Cr1, Cr2, Cr3, Cr4, Cr8#
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movq %cr8, %rax
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push %rax
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movq %cr4, %rax
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orq $0x208, %rax
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movq %rax, %cr4
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push %rax
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movq %cr3, %rax
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push %rax
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movq %cr2, %rax
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push %rax
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xorq %rax, %rax
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push %rax
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movq %cr0, %rax
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push %rax
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## UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7#
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movq %dr7, %rax
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push %rax
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## clear Dr7 while executing debugger itself
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xorq %rax, %rax
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movq %rax, %dr7
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movq %dr6, %rax
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push %rax
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## insure all status bits in dr6 are clear...
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xorq %rax, %rax
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movq %rax, %dr6
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movq %dr3, %rax
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push %rax
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movq %dr2, %rax
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push %rax
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movq %dr1, %rax
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push %rax
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movq %dr0, %rax
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push %rax
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## FX_SAVE_STATE_X64 FxSaveState#
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subq $512, %rsp
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movq %rsp, %rdi
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fxsave (%rdi)
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## UINT64 ExceptionData#
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push 2*8 (%rbp)
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## call into exception handler
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## Prepare parameter and call
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movq 1*8(%rbp), %rcx
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movq %rsp, %rdx
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#
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# Per X64 calling convention, allocate maximum parameter stack space
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# and make sure RSP is 16-byte aligned
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#
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subq $(4*8+8), %rsp
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cmpq $32, %rcx
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jb CallException
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call ASM_PFX(TimerHandler)
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jmp ExceptionDone
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CallException:
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call ASM_PFX(ExceptionHandler)
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ExceptionDone:
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addq $(4*8+8), %rsp
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cli
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## UINT64 ExceptionData#
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addq $8, %rsp
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## FX_SAVE_STATE_X64 FxSaveState#
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movq %rsp, %rsi
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fxrstor (%esi)
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addq $512, %rsp
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## UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7#
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pop %rax
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movq %rax, %dr0
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pop %rax
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movq %rax, %dr1
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pop %rax
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movq %rax, %dr2
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pop %rax
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movq %rax, %dr3
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## skip restore of dr6. We cleared dr6 during the context save.
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addq $8, %rsp
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pop %rax
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movq %rax, %dr7
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## UINT64 Cr0, Cr1, Cr2, Cr3, Cr4, Cr8#
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pop %rax
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movq %rax, %cr0
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addq $8, %rsp # not for Cr1
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pop %rax
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movq %rax, %cr2
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pop %rax
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movq %rax, %cr3
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pop %rax
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movq %rax, %cr4
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pop %rax
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mov %rax, %cr8
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## UINT64 RFlags#
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pop 5*8(%rbp)
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## UINT64 Ldtr, Tr#
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## UINT64 Gdtr[2], Idtr[2]#
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## Best not let anyone mess with these particular registers...
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addq $48, %rsp
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## UINT64 Rip#
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pop 3*8(%rbp)
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|
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## UINT64 Gs, Fs, Es, Ds, Cs, Ss#
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pop %rax
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# mov gs, rax # not for gs
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pop %rax
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# mov fs, rax # not for fs
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# (X64 will not use fs and gs, so we do not restore it)
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pop %rax
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movq %rax, %es
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pop %rax
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movq %rax, %ds
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pop 4*8(%rbp) # for cs
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pop 7*8(%rbp) # for ss
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||||
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## UINT64 Rdi, Rsi, Rbp, Rsp, Rbx, Rdx, Rcx, Rax#
|
||||
## UINT64 R8, R9, R10, R11, R12, R13, R14, R15#
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pop %rdi
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pop %rsi
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addq $8, %rsp # not for rbp
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||||
pop 6*8(%rbp) # for rsp
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||||
pop %rbx
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pop %rdx
|
||||
pop %rcx
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||||
pop %rax
|
||||
pop %r8
|
||||
pop %r9
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||||
pop %r10
|
||||
pop %r11
|
||||
pop %r12
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||||
pop %r13
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||||
pop %r14
|
||||
pop %r15
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||||
|
||||
movq %rbp, %rsp
|
||||
pop %rbp
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||||
addq $16, %rsp
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||||
iretq
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||||
|
||||
|
||||
##############################################################################
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||||
# data
|
||||
##############################################################################
|
||||
|
||||
.data
|
||||
.align 0x10
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||||
|
||||
gdtr: .short GDT_END - GDT_BASE - 1 # GDT limit
|
||||
.quad 0 # (GDT base gets set above)
|
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##############################################################################
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# global descriptor table (GDT)
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||||
##############################################################################
|
||||
|
||||
.align 0x10
|
||||
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||||
GDT_BASE:
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# null descriptor
|
||||
NULL_SEL = .-GDT_BASE
|
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.short 0 # limit 15:0
|
||||
.short 0 # base 15:0
|
||||
.byte 0 # base 23:16
|
||||
.byte 0 # type
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||||
.byte 0 # limit 19:16, flags
|
||||
.byte 0 # base 31:24
|
||||
|
||||
# linear data segment descriptor
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||||
LINEAR_SEL = .-GDT_BASE
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||||
.short 0x0FFFF # limit 0xFFFFF
|
||||
.short 0 # base 0
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||||
.byte 0
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||||
.byte 0x092 # present, ring 0, data, expand-up, writable
|
||||
.byte 0x0CF # page-granular, 32-bit
|
||||
.byte 0
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||||
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# linear code segment descriptor
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||||
LINEAR_CODE_SEL = .-GDT_BASE
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||||
.short 0x0FFFF # limit 0xFFFFF
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||||
.short 0 # base 0
|
||||
.byte 0
|
||||
.byte 0x09A # present, ring 0, data, expand-up, writable
|
||||
.byte 0x0CF # page-granular, 32-bit
|
||||
.byte 0
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||||
|
||||
# system data segment descriptor
|
||||
SYS_DATA_SEL = .-GDT_BASE
|
||||
.short 0x0FFFF # limit 0xFFFFF
|
||||
.short 0 # base 0
|
||||
.byte 0
|
||||
.byte 0x092 # present, ring 0, data, expand-up, writable
|
||||
.byte 0x0CF # page-granular, 32-bit
|
||||
.byte 0
|
||||
|
||||
# system code segment descriptor
|
||||
SYS_CODE_SEL = .-GDT_BASE
|
||||
.short 0x0FFFF # limit 0xFFFFF
|
||||
.short 0 # base 0
|
||||
.byte 0
|
||||
.byte 0x09A # present, ring 0, data, expand-up, writable
|
||||
.byte 0x0CF # page-granular, 32-bit
|
||||
.byte 0
|
||||
|
||||
# spare segment descriptor
|
||||
SPARE3_SEL = .-GDT_BASE
|
||||
.short 0 # limit 0xFFFFF
|
||||
.short 0 # base 0
|
||||
.byte 0
|
||||
.byte 0 # present, ring 0, data, expand-up, writable
|
||||
.byte 0 # page-granular, 32-bit
|
||||
.byte 0
|
||||
|
||||
# spare segment descriptor
|
||||
SPARE4_SEL = .-GDT_BASE
|
||||
.short 0 # limit 0xFFFFF
|
||||
.short 0 # base 0
|
||||
.byte 0
|
||||
.byte 0 # present, ring 0, data, expand-up, writable
|
||||
.byte 0 # page-granular, 32-bit
|
||||
.byte 0
|
||||
|
||||
# spare segment descriptor
|
||||
SPARE5_SEL = .-GDT_BASE
|
||||
.short 0 # limit 0xFFFFF
|
||||
.short 0 # base 0
|
||||
.byte 0
|
||||
.byte 0 # present, ring 0, data, expand-up, writable
|
||||
.byte 0 # page-granular, 32-bit
|
||||
.byte 0
|
||||
|
||||
GDT_END:
|
||||
|
||||
.align 0x4
|
||||
|
||||
|
||||
|
||||
idtr: .short IDT_END - IDT_BASE - 1 # IDT limit
|
||||
.quad 0 # (IDT base gets set above)
|
||||
##############################################################################
|
||||
# interrupt descriptor table (IDT)
|
||||
#
|
||||
# Note: The hardware IRQ's specified in this table are the normal PC/AT IRQ
|
||||
# mappings. This implementation only uses the system timer and all other
|
||||
# IRQs will remain masked. The descriptors for vectors 33+ are provided
|
||||
# for convenience.
|
||||
##############################################################################
|
||||
|
||||
#idt_tag .byte "IDT",0
|
||||
.align 0x4
|
||||
|
||||
IDT_BASE:
|
||||
# divide by zero (INT 0)
|
||||
DIV_ZERO_SEL = .-IDT_BASE
|
||||
.short 0 # offset 15:0
|
||||
.short SYS_CODE_SEL # selector 15:0
|
||||
.byte 0 # 0 for interrupt gate
|
||||
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
||||
.short 0 # offset 31:16
|
||||
|
||||
# debug exception (INT 1)
|
||||
DEBUG_EXCEPT_SEL = .-IDT_BASE
|
||||
.short 0 # offset 15:0
|
||||
.short SYS_CODE_SEL # selector 15:0
|
||||
.byte 0 # 0 for interrupt gate
|
||||
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
||||
.short 0 # offset 31:16
|
||||
|
||||
# NMI (INT 2)
|
||||
NMI_SEL = .-IDT_BASE
|
||||
.short 0 # offset 15:0
|
||||
.short SYS_CODE_SEL # selector 15:0
|
||||
.byte 0 # 0 for interrupt gate
|
||||
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
||||
.short 0 # offset 31:16
|
||||
|
||||
# soft breakpoint (INT 3)
|
||||
BREAKPOINT_SEL = .-IDT_BASE
|
||||
.short 0 # offset 15:0
|
||||
.short SYS_CODE_SEL # selector 15:0
|
||||
.byte 0 # 0 for interrupt gate
|
||||
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
||||
.short 0 # offset 31:16
|
||||
|
||||
# overflow (INT 4)
|
||||
OVERFLOW_SEL = .-IDT_BASE
|
||||
.short 0 # offset 15:0
|
||||
.short SYS_CODE_SEL # selector 15:0
|
||||
.byte 0 # 0 for interrupt gate
|
||||
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
||||
.short 0 # offset 31:16
|
||||
|
||||
# bounds check (INT 5)
|
||||
BOUNDS_CHECK_SEL = .-IDT_BASE
|
||||
.short 0 # offset 15:0
|
||||
.short SYS_CODE_SEL # selector 15:0
|
||||
.byte 0 # 0 for interrupt gate
|
||||
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
||||
.short 0 # offset 31:16
|
||||
|
||||
# invalid opcode (INT 6)
|
||||
INVALID_OPCODE_SEL = .-IDT_BASE
|
||||
.short 0 # offset 15:0
|
||||
.short SYS_CODE_SEL # selector 15:0
|
||||
.byte 0 # 0 for interrupt gate
|
||||
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
||||
.short 0 # offset 31:16
|
||||
|
||||
# device not available (INT 7)
|
||||
DEV_NOT_AVAIL_SEL = .-IDT_BASE
|
||||
.short 0 # offset 15:0
|
||||
.short SYS_CODE_SEL # selector 15:0
|
||||
.byte 0 # 0 for interrupt gate
|
||||
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
||||
.short 0 # offset 31:16
|
||||
|
||||
# double fault (INT 8)
|
||||
DOUBLE_FAULT_SEL = .-IDT_BASE
|
||||
.short 0 # offset 15:0
|
||||
.short SYS_CODE_SEL # selector 15:0
|
||||
.byte 0 # 0 for interrupt gate
|
||||
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
||||
.short 0 # offset 31:16
|
||||
|
||||
# Coprocessor segment overrun - reserved (INT 9)
|
||||
RSVD_INTR_SEL1 = .-IDT_BASE
|
||||
.short 0 # offset 15:0
|
||||
.short SYS_CODE_SEL # selector 15:0
|
||||
.byte 0 # 0 for interrupt gate
|
||||
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
||||
.short 0 # offset 31:16
|
||||
|
||||
# invalid TSS (INT 0ah)
|
||||
INVALID_TSS_SEL = .-IDT_BASE
|
||||
.short 0 # offset 15:0
|
||||
.short SYS_CODE_SEL # selector 15:0
|
||||
.byte 0 # 0 for interrupt gate
|
||||
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
||||
.short 0 # offset 31:16
|
||||
|
||||
# segment not present (INT 0bh)
|
||||
SEG_NOT_PRESENT_SEL = .-IDT_BASE
|
||||
.short 0 # offset 15:0
|
||||
.short SYS_CODE_SEL # selector 15:0
|
||||
.byte 0 # 0 for interrupt gate
|
||||
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
||||
.short 0 # offset 31:16
|
||||
|
||||
# stack fault (INT 0ch)
|
||||
STACK_FAULT_SEL = .-IDT_BASE
|
||||
.short 0 # offset 15:0
|
||||
.short SYS_CODE_SEL # selector 15:0
|
||||
.byte 0 # 0 for interrupt gate
|
||||
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
||||
.short 0 # offset 31:16
|
||||
|
||||
# general protection (INT 0dh)
|
||||
GP_FAULT_SEL = .-IDT_BASE
|
||||
.short 0 # offset 15:0
|
||||
.short SYS_CODE_SEL # selector 15:0
|
||||
.byte 0 # 0 for interrupt gate
|
||||
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
||||
.short 0 # offset 31:16
|
||||
|
||||
# page fault (INT 0eh)
|
||||
PAGE_FAULT_SEL = .-IDT_BASE
|
||||
.short 0 # offset 15:0
|
||||
.short SYS_CODE_SEL # selector 15:0
|
||||
.byte 0 # 0 for interrupt gate
|
||||
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
||||
.short 0 # offset 31:16
|
||||
|
||||
# Intel reserved - do not use (INT 0fh)
|
||||
RSVD_INTR_SEL2 = .-IDT_BASE
|
||||
.short 0 # offset 15:0
|
||||
.short SYS_CODE_SEL # selector 15:0
|
||||
.byte 0 # 0 for interrupt gate
|
||||
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
||||
.short 0 # offset 31:16
|
||||
|
||||
# floating point error (INT 0x10)
|
||||
FLT_POINT_ERR_SEL = .-IDT_BASE
|
||||
.short 0 # offset 15:0
|
||||
.short SYS_CODE_SEL # selector 15:0
|
||||
.byte 0 # 0 for interrupt gate
|
||||
.byte 0x0e | 0x80 # type = 386 interrupt gate, present
|
||||
.short 0 # offset 31:16
|
||||
|
||||
# alignment check (INT 0x11)
|
||||
ALIGNMENT_CHECK_SEL = .-IDT_BASE
|
||||
.short 0 # offset 15:0
|
||||
.short SYS_CODE_SEL # selector 15:0
|
||||
.byte 0 # 0 for interrupt gate
|
||||
.byte 0x0e | 0x80 # (10001110)type = 386 interrupt gate, present
|
||||
.short 0 # offset 31:16
|
||||
|
||||
# machine check (INT 0x12)
|
||||
MACHINE_CHECK_SEL = .-IDT_BASE
|
||||
.short 0 # offset 15:0
|
||||
.short SYS_CODE_SEL # selector 15:0
|
||||
.byte 0 # 0 for interrupt gate
|
||||
.byte 0x0e | 0x80 # (10001110)type = 386 interrupt gate, present
|
||||
.short 0 # offset 31:16
|
||||
|
||||
# SIMD floating-point exception (INT 0x13)
|
||||
SIMD_EXCEPTION_SEL = .-IDT_BASE
|
||||
.short 0 # offset 15:0
|
||||
.short SYS_CODE_SEL # selector 15:0
|
||||
.byte 0 # 0 for interrupt gate
|
||||
.byte 0x0e | 0x80 # (10001110)type = 386 interrupt gate, present
|
||||
.short 0 # offset 31:16
|
||||
|
||||
.rept (32 - 20)
|
||||
.short 0 # offset 15:0
|
||||
.short SYS_CODE_SEL # selector 15:0
|
||||
.byte 0 # 0 for interrupt gate
|
||||
.byte 0x0e | 0x80 # (10001110)type = 386 interrupt gate, present
|
||||
.short 0 # offset 31:16
|
||||
.endr
|
||||
|
||||
# 72 unspecified descriptors
|
||||
.rept 72 * 8
|
||||
.byte 0
|
||||
.endr
|
||||
|
||||
# IRQ 0 (System timer) - (INT 0x68)
|
||||
IRQ0_SEL = .-IDT_BASE
|
||||
.short 0 # offset 15:0
|
||||
.short SYS_CODE_SEL # selector 15:0
|
||||
.byte 0 # 0 for interrupt gate
|
||||
.byte 0x0e | 0x80 # (10001110)type = 386 interrupt gate, present
|
||||
.short 0 # offset 31:16
|
||||
|
||||
# IRQ 1 (8042 Keyboard controller) - (INT 0x69)
|
||||
IRQ1_SEL = .-IDT_BASE
|
||||
.short 0 # offset 15:0
|
||||
.short SYS_CODE_SEL # selector 15:0
|
||||
.byte 0 # 0 for interrupt gate
|
||||
.byte 0x0e | 0x80 # (10001110)type = 386 interrupt gate, present
|
||||
.short 0 # offset 31:16
|
||||
|
||||
# Reserved - IRQ 2 redirect (IRQ 2) - DO NOT USE!!! - (INT 6ah)
|
||||
IRQ2_SEL = .-IDT_BASE
|
||||
.short 0 # offset 15:0
|
||||
.short SYS_CODE_SEL # selector 15:0
|
||||
.byte 0 # 0 for interrupt gate
|
||||
.byte 0x0e | 0x80 # (10001110)type = 386 interrupt gate, present
|
||||
.short 0 # offset 31:16
|
||||
|
||||
# IRQ 3 (COM 2) - (INT 6bh)
|
||||
IRQ3_SEL = .-IDT_BASE
|
||||
.short 0 # offset 15:0
|
||||
.short SYS_CODE_SEL # selector 15:0
|
||||
.byte 0 # 0 for interrupt gate
|
||||
.byte 0x0e | 0x80 # (10001110)type = 386 interrupt gate, present
|
||||
.short 0 # offset 31:16
|
||||
|
||||
# IRQ 4 (COM 1) - (INT 6ch)
|
||||
IRQ4_SEL = .-IDT_BASE
|
||||
.short 0 # offset 15:0
|
||||
.short SYS_CODE_SEL # selector 15:0
|
||||
.byte 0 # 0 for interrupt gate
|
||||
.byte 0x0e | 0x80 # (10001110)type = 386 interrupt gate, present
|
||||
.short 0 # offset 31:16
|
||||
|
||||
# IRQ 5 (LPT 2) - (INT 6dh)
|
||||
IRQ5_SEL = .-IDT_BASE
|
||||
.short 0 # offset 15:0
|
||||
.short SYS_CODE_SEL # selector 15:0
|
||||
.byte 0 # 0 for interrupt gate
|
||||
.byte 0x0e | 0x80 # (10001110)type = 386 interrupt gate, present
|
||||
.short 0 # offset 31:16
|
||||
|
||||
# IRQ 6 (Floppy controller) - (INT 6eh)
|
||||
IRQ6_SEL = .-IDT_BASE
|
||||
.short 0 # offset 15:0
|
||||
.short SYS_CODE_SEL # selector 15:0
|
||||
.byte 0 # 0 for interrupt gate
|
||||
.byte 0x0e | 0x80 # (10001110)type = 386 interrupt gate, present
|
||||
.short 0 # offset 31:16
|
||||
|
||||
# IRQ 7 (LPT 1) - (INT 6fh)
|
||||
IRQ7_SEL = .-IDT_BASE
|
||||
.short 0 # offset 15:0
|
||||
.short SYS_CODE_SEL # selector 15:0
|
||||
.byte 0 # 0 for interrupt gate
|
||||
.byte 0x0e | 0x80 # (10001110)type = 386 interrupt gate, present
|
||||
.short 0 # offset 31:16
|
||||
|
||||
# IRQ 8 (RTC Alarm) - (INT 0x70)
|
||||
IRQ8_SEL = .-IDT_BASE
|
||||
.short 0 # offset 15:0
|
||||
.short SYS_CODE_SEL # selector 15:0
|
||||
.byte 0 # 0 for interrupt gate
|
||||
.byte 0x0e | 0x80 # (10001110)type = 386 interrupt gate, present
|
||||
.short 0 # offset 31:16
|
||||
|
||||
# IRQ 9 - (INT 0x71)
|
||||
IRQ9_SEL = .-IDT_BASE
|
||||
.short 0 # offset 15:0
|
||||
.short SYS_CODE_SEL # selector 15:0
|
||||
.byte 0 # 0 for interrupt gate
|
||||
.byte 0x0e | 0x80 # (10001110)type = 386 interrupt gate, present
|
||||
.short 0 # offset 31:16
|
||||
|
||||
# IRQ 10 - (INT 0x72)
|
||||
IRQ10_SEL = .-IDT_BASE
|
||||
.short 0 # offset 15:0
|
||||
.short SYS_CODE_SEL # selector 15:0
|
||||
.byte 0 # 0 for interrupt gate
|
||||
.byte 0x0e | 0x80 # (10001110)type = 386 interrupt gate, present
|
||||
.short 0 # offset 31:16
|
||||
|
||||
# IRQ 11 - (INT 0x73)
|
||||
IRQ11_SEL = .-IDT_BASE
|
||||
.short 0 # offset 15:0
|
||||
.short SYS_CODE_SEL # selector 15:0
|
||||
.byte 0 # 0 for interrupt gate
|
||||
.byte 0x0e | 0x80 # (10001110)type = 386 interrupt gate, present
|
||||
.short 0 # offset 31:16
|
||||
|
||||
# IRQ 12 (PS/2 mouse) - (INT 0x74)
|
||||
IRQ12_SEL = .-IDT_BASE
|
||||
.short 0 # offset 15:0
|
||||
.short SYS_CODE_SEL # selector 15:0
|
||||
.byte 0 # 0 for interrupt gate
|
||||
.byte 0x0e | 0x80 # (10001110)type = 386 interrupt gate, present
|
||||
.short 0 # offset 31:16
|
||||
|
||||
# IRQ 13 (Floating point error) - (INT 0x75)
|
||||
IRQ13_SEL = .-IDT_BASE
|
||||
.short 0 # offset 15:0
|
||||
.short SYS_CODE_SEL # selector 15:0
|
||||
.byte 0 # 0 for interrupt gate
|
||||
.byte 0x0e | 0x80 # (10001110)type = 386 interrupt gate, present
|
||||
.short 0 # offset 31:16
|
||||
|
||||
# IRQ 14 (Secondary IDE) - (INT 0x76)
|
||||
IRQ14_SEL = .-IDT_BASE
|
||||
.short 0 # offset 15:0
|
||||
.short SYS_CODE_SEL # selector 15:0
|
||||
.byte 0 # 0 for interrupt gate
|
||||
.byte 0x0e | 0x80 # (10001110)type = 386 interrupt gate, present
|
||||
.short 0 # offset 31:16
|
||||
|
||||
# IRQ 15 (Primary IDE) - (INT 0x77)
|
||||
IRQ15_SEL = .-IDT_BASE
|
||||
.short 0 # offset 15:0
|
||||
.short SYS_CODE_SEL # selector 15:0
|
||||
.byte 0 # 0 for interrupt gate
|
||||
.byte 0x0e | 0x80 # (10001110)type = 386 interrupt gate, present
|
||||
.short 0 # offset 31:16
|
||||
|
||||
.rept 1 * 16
|
||||
.byte 0
|
||||
.endr
|
||||
|
||||
IDT_END:
|
||||
|
||||
|
|
@ -630,7 +630,7 @@ ScanPciRootBridgeForRoms(
|
|||
//
|
||||
// Find Memory Descriptors that are less than 4GB, so the PPB Memory Window can be used for downstream devices
|
||||
//
|
||||
if (Descriptors->AddrRangeMax < 0x100000000) {
|
||||
if (Descriptors->AddrRangeMax < 0x100000000ULL) {
|
||||
//
|
||||
// Find the largest Non-Prefetchable Memory Descriptor that is less than 4GB
|
||||
//
|
||||
|
|
|
|||
Loading…
Reference in New Issue